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Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM SoC fixes from Olof Johansson:
"The first real batch of fixes for this release cycle, so there are a
few more than usual.

Most of these are fixes and tweaks to board support (DT bugfixes,
etc). I've also picked up a couple of small cleanups that seemed
innocent enough that there was little reason to wait (const/
__initconst and Kconfig deps).

Quite a bit of the changes on OMAP were due to fixes to no longer
write to rodata from assembly when ARM_KERNMEM_PERMS was enabled, but
there were also other fixes.

Kirkwood had a bunch of gpio fixes for some boards. OMAP had RTC
fixes on OMAP5, and Nomadik had changes to MMC parameters in DT.

All in all, mostly the usual mix of various fixes"

* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (46 commits)
ARM: multi_v7_defconfig: enable DW_WATCHDOG
ARM: nomadik: fix up SD/MMC DT settings
ARM64: tegra: Add chosen node for tegra132 norrin
ARM: realview: use "depends on" instead of "if" after prompt
ARM: tango: use "depends on" instead of "if" after prompt
ARM: tango: use const and __initconst for smp_operations
ARM: realview: use const and __initconst for smp_operations
bus: uniphier-system-bus: revive tristate prompt
arm64: dts: Add missing DMA Abort interrupt to Juno
bus: vexpress-config: Add missing of_node_put
ARM: dts: am57xx: sbc-am57x: correct Eth PHY settings
ARM: dts: am57xx: cl-som-am57x: fix CPSW EMAC pinmux
ARM: dts: am57xx: sbc-am57x: fix UART3 pinmux
ARM: dts: am57xx: cl-som-am57x: update SPI Flash frequency
ARM: dts: am57xx: cl-som-am57x: set HOST mode for USB2
ARM: dts: am57xx: sbc-am57x: fix SB-SOM EEPROM I2C address
ARM: dts: LogicPD Torpedo: Revert Duplicative Entries
ARM: dts: am437x: pixcir_tangoc: use correct flags for irq types
ARM: dts: am4372: fix irq type for arm twd and global timer
ARM: dts: at91: sama5d4 xplained: fix phy0 IRQ type
...

+230 -149
+1
arch/arm/boot/dts/am33xx.dtsi
··· 439 439 ti,mbox-num-users = <4>; 440 440 ti,mbox-num-fifos = <8>; 441 441 mbox_wkupm3: wkup_m3 { 442 + ti,mbox-send-noirq; 442 443 ti,mbox-tx = <0 0 0>; 443 444 ti,mbox-rx = <0 0 3>; 444 445 };
+3 -2
arch/arm/boot/dts/am4372.dtsi
··· 73 73 global_timer: timer@48240200 { 74 74 compatible = "arm,cortex-a9-global-timer"; 75 75 reg = <0x48240200 0x100>; 76 - interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>; 76 + interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>; 77 77 interrupt-parent = <&gic>; 78 78 clocks = <&mpu_periphclk>; 79 79 }; ··· 81 81 local_timer: timer@48240600 { 82 82 compatible = "arm,cortex-a9-twd-timer"; 83 83 reg = <0x48240600 0x100>; 84 - interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>; 84 + interrupts = <GIC_PPI 13 IRQ_TYPE_EDGE_RISING>; 85 85 interrupt-parent = <&gic>; 86 86 clocks = <&mpu_periphclk>; 87 87 }; ··· 290 290 ti,mbox-num-users = <4>; 291 291 ti,mbox-num-fifos = <8>; 292 292 mbox_wkupm3: wkup_m3 { 293 + ti,mbox-send-noirq; 293 294 ti,mbox-tx = <0 0 0>; 294 295 ti,mbox-rx = <0 0 3>; 295 296 };
+1 -3
arch/arm/boot/dts/am437x-gp-evm.dts
··· 590 590 pinctrl-names = "default"; 591 591 pinctrl-0 = <&pixcir_ts_pins>; 592 592 reg = <0x5c>; 593 - interrupt-parent = <&gpio3>; 594 - interrupts = <22 0>; 595 593 596 594 attb-gpio = <&gpio3 22 GPIO_ACTIVE_HIGH>; 597 595 ··· 597 599 * 0x264 represents the offset of padconf register of 598 600 * gpio3_22 from am43xx_pinmux base. 599 601 */ 600 - interrupts-extended = <&gpio3 22 IRQ_TYPE_NONE>, 602 + interrupts-extended = <&gpio3 22 IRQ_TYPE_EDGE_FALLING>, 601 603 <&am43xx_pinmux 0x264>; 602 604 interrupt-names = "tsc", "wakeup"; 603 605
+1 -1
arch/arm/boot/dts/am43x-epos-evm.dts
··· 491 491 pinctrl-0 = <&pixcir_ts_pins>; 492 492 reg = <0x5c>; 493 493 interrupt-parent = <&gpio1>; 494 - interrupts = <17 0>; 494 + interrupts = <17 IRQ_TYPE_EDGE_FALLING>; 495 495 496 496 attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>; 497 497
+6 -6
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
··· 167 167 DRA7XX_CORE_IOPAD(0x35b8, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */ 168 168 DRA7XX_CORE_IOPAD(0x35bc, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */ 169 169 DRA7XX_CORE_IOPAD(0x35c0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */ 170 - DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLUP | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 170 + DRA7XX_CORE_IOPAD(0x35c4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */ 171 171 >; 172 172 }; 173 173 ··· 492 492 pinctrl-names = "default"; 493 493 pinctrl-0 = <&qspi1_pins>; 494 494 495 - spi-max-frequency = <20000000>; 495 + spi-max-frequency = <48000000>; 496 496 497 497 spi_flash: spi_flash@0 { 498 498 #address-cells = <1>; 499 499 #size-cells = <1>; 500 500 compatible = "spansion,m25p80", "jedec,spi-nor"; 501 501 reg = <0>; /* CS0 */ 502 - spi-max-frequency = <20000000>; 502 + spi-max-frequency = <48000000>; 503 503 504 504 partition@0 { 505 505 label = "uboot"; ··· 559 559 560 560 &cpsw_emac0 { 561 561 phy_id = <&davinci_mdio>, <0>; 562 - phy-mode = "rgmii"; 562 + phy-mode = "rgmii-txid"; 563 563 dual_emac_res_vlan = <0>; 564 564 }; 565 565 566 566 &cpsw_emac1 { 567 567 phy_id = <&davinci_mdio>, <1>; 568 - phy-mode = "rgmii"; 568 + phy-mode = "rgmii-txid"; 569 569 dual_emac_res_vlan = <1>; 570 570 }; 571 571 ··· 588 588 }; 589 589 590 590 &usb2 { 591 - dr_mode = "peripheral"; 591 + dr_mode = "host"; 592 592 }; 593 593 594 594 &mcasp3 {
+4 -4
arch/arm/boot/dts/am57xx-sbc-am57x.dts
··· 25 25 &dra7_pmx_core { 26 26 uart3_pins_default: uart3_pins_default { 27 27 pinctrl-single,pins = < 28 - DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_SLEW | MUX_MODE2) /* uart2_ctsn.uart3_rxd */ 29 - DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_SLEW | MUX_MODE1) /* uart2_rtsn.uart3_txd */ 28 + DRA7XX_CORE_IOPAD(0x3648, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ 29 + DRA7XX_CORE_IOPAD(0x364c, PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ 30 30 >; 31 31 }; 32 32 ··· 108 108 pinctrl-0 = <&i2c5_pins_default>; 109 109 clock-frequency = <400000>; 110 110 111 - eeprom_base: atmel@50 { 111 + eeprom_base: atmel@54 { 112 112 compatible = "atmel,24c08"; 113 - reg = <0x50>; 113 + reg = <0x54>; 114 114 pagesize = <16>; 115 115 }; 116 116
+1
arch/arm/boot/dts/armada-xp-lenovo-ix4-300d.dts
··· 152 152 nand-on-flash-bbt; 153 153 154 154 partitions { 155 + compatible = "fixed-partitions"; 155 156 #address-cells = <1>; 156 157 #size-cells = <1>; 157 158
+11 -1
arch/arm/boot/dts/at91-sama5d2_xplained.dts
··· 114 114 115 115 macb0: ethernet@f8008000 { 116 116 pinctrl-names = "default"; 117 - pinctrl-0 = <&pinctrl_macb0_default>; 117 + pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>; 118 118 phy-mode = "rmii"; 119 119 status = "okay"; 120 + 121 + ethernet-phy@1 { 122 + reg = <0x1>; 123 + interrupt-parent = <&pioA>; 124 + interrupts = <73 IRQ_TYPE_LEVEL_LOW>; 125 + }; 120 126 }; 121 127 122 128 pdmic@f8018000 { ··· 304 298 <PIN_PB22__GMDC>, 305 299 <PIN_PB23__GMDIO>; 306 300 bias-disable; 301 + }; 302 + 303 + pinctrl_macb0_phy_irq: macb0_phy_irq { 304 + pinmux = <PIN_PC9__GPIO>; 307 305 }; 308 306 309 307 pinctrl_pdmic_default: pdmic_default {
+7 -1
arch/arm/boot/dts/at91-sama5d4_xplained.dts
··· 86 86 macb0: ethernet@f8020000 { 87 87 phy-mode = "rmii"; 88 88 status = "okay"; 89 + pinctrl-names = "default"; 90 + pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; 89 91 90 92 phy0: ethernet-phy@1 { 91 93 interrupt-parent = <&pioE>; 92 - interrupts = <1 IRQ_TYPE_EDGE_FALLING>; 94 + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 93 95 reg = <1>; 94 96 }; 95 97 }; ··· 153 151 pinctrl_key_gpio: key_gpio_0 { 154 152 atmel,pins = 155 153 <AT91_PIOE 8 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 154 + }; 155 + pinctrl_macb0_phy_irq: macb0_phy_irq_0 { 156 + atmel,pins = 157 + <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>; 156 158 }; 157 159 }; 158 160 };
+11
arch/arm/boot/dts/at91-sama5d4ek.dts
··· 160 160 }; 161 161 162 162 macb0: ethernet@f8020000 { 163 + pinctrl-0 = <&pinctrl_macb0_rmii &pinctrl_macb0_phy_irq>; 163 164 phy-mode = "rmii"; 164 165 status = "okay"; 166 + 167 + ethernet-phy@1 { 168 + reg = <0x1>; 169 + interrupt-parent = <&pioE>; 170 + interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 171 + }; 165 172 }; 166 173 167 174 mmc1: mmc@fc000000 { ··· 200 193 201 194 pinctrl@fc06a000 { 202 195 board { 196 + pinctrl_macb0_phy_irq: macb0_phy_irq { 197 + atmel,pins = 198 + <AT91_PIOE 1 AT91_PERIPH_GPIO AT91_PINCTRL_NONE>; 199 + }; 203 200 pinctrl_mmc0_cd: mmc0_cd { 204 201 atmel,pins = 205 202 <AT91_PIOE 5 AT91_PERIPH_GPIO AT91_PINCTRL_PULL_UP_DEGLITCH>;
+1 -1
arch/arm/boot/dts/at91sam9n12ek.dts
··· 215 215 }; 216 216 217 217 panel: panel { 218 - compatible = "qd,qd43003c0-40", "simple-panel"; 218 + compatible = "qiaodian,qd43003c0-40", "simple-panel"; 219 219 backlight = <&backlight>; 220 220 power-supply = <&panel_reg>; 221 221 #address-cells = <1>;
+13 -12
arch/arm/boot/dts/kirkwood-lswvl.dts
··· 1 1 /* 2 2 * Device Tree file for Buffalo Linkstation LS-WVL/VL 3 3 * 4 - * Copyright (C) 2015, rogershimizu@gmail.com 4 + * Copyright (C) 2015, 2016 5 + * Roger Shimizu <rogershimizu@gmail.com> 5 6 * 6 7 * This program is free software; you can redistribute it and/or 7 8 * modify it under the terms of the GNU General Public License ··· 157 156 button@1 { 158 157 label = "Function Button"; 159 158 linux,code = <KEY_OPTION>; 160 - gpios = <&gpio0 45 GPIO_ACTIVE_LOW>; 159 + gpios = <&gpio1 13 GPIO_ACTIVE_LOW>; 161 160 }; 162 161 163 162 button@2 { 164 163 label = "Power-on Switch"; 165 164 linux,code = <KEY_RESERVED>; 166 165 linux,input-type = <5>; 167 - gpios = <&gpio0 46 GPIO_ACTIVE_LOW>; 166 + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>; 168 167 }; 169 168 170 169 button@3 { 171 170 label = "Power-auto Switch"; 172 171 linux,code = <KEY_ESC>; 173 172 linux,input-type = <5>; 174 - gpios = <&gpio0 47 GPIO_ACTIVE_LOW>; 173 + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>; 175 174 }; 176 175 }; 177 176 ··· 186 185 187 186 led@1 { 188 187 label = "lswvl:red:alarm"; 189 - gpios = <&gpio0 36 GPIO_ACTIVE_LOW>; 188 + gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>; 190 189 }; 191 190 192 191 led@2 { 193 192 label = "lswvl:red:func"; 194 - gpios = <&gpio0 37 GPIO_ACTIVE_LOW>; 193 + gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; 195 194 }; 196 195 197 196 led@3 { 198 197 label = "lswvl:amber:info"; 199 - gpios = <&gpio0 38 GPIO_ACTIVE_LOW>; 198 + gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>; 200 199 }; 201 200 202 201 led@4 { 203 202 label = "lswvl:blue:func"; 204 - gpios = <&gpio0 39 GPIO_ACTIVE_LOW>; 203 + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 205 204 }; 206 205 207 206 led@5 { 208 207 label = "lswvl:blue:power"; 209 - gpios = <&gpio0 40 GPIO_ACTIVE_LOW>; 208 + gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 210 209 default-state = "keep"; 211 210 }; 212 211 213 212 led@6 { 214 213 label = "lswvl:red:hdderr0"; 215 - gpios = <&gpio0 34 GPIO_ACTIVE_LOW>; 214 + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 216 215 }; 217 216 218 217 led@7 { 219 218 label = "lswvl:red:hdderr1"; 220 - gpios = <&gpio0 35 GPIO_ACTIVE_LOW>; 219 + gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>; 221 220 }; 222 221 }; 223 222 ··· 234 233 3250 1 235 234 5000 0>; 236 235 237 - alarm-gpios = <&gpio0 43 GPIO_ACTIVE_HIGH>; 236 + alarm-gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; 238 237 }; 239 238 240 239 restart_poweroff {
+16 -15
arch/arm/boot/dts/kirkwood-lswxl.dts
··· 1 1 /* 2 2 * Device Tree file for Buffalo Linkstation LS-WXL/WSXL 3 3 * 4 - * Copyright (C) 2015, rogershimizu@gmail.com 4 + * Copyright (C) 2015, 2016 5 + * Roger Shimizu <rogershimizu@gmail.com> 5 6 * 6 7 * This program is free software; you can redistribute it and/or 7 8 * modify it under the terms of the GNU General Public License ··· 157 156 button@1 { 158 157 label = "Function Button"; 159 158 linux,code = <KEY_OPTION>; 160 - gpios = <&gpio1 41 GPIO_ACTIVE_LOW>; 159 + gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; 161 160 }; 162 161 163 162 button@2 { 164 163 label = "Power-on Switch"; 165 164 linux,code = <KEY_RESERVED>; 166 165 linux,input-type = <5>; 167 - gpios = <&gpio1 42 GPIO_ACTIVE_LOW>; 166 + gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; 168 167 }; 169 168 170 169 button@3 { 171 170 label = "Power-auto Switch"; 172 171 linux,code = <KEY_ESC>; 173 172 linux,input-type = <5>; 174 - gpios = <&gpio1 43 GPIO_ACTIVE_LOW>; 173 + gpios = <&gpio1 11 GPIO_ACTIVE_LOW>; 175 174 }; 176 175 }; 177 176 ··· 186 185 187 186 led@1 { 188 187 label = "lswxl:blue:func"; 189 - gpios = <&gpio1 36 GPIO_ACTIVE_LOW>; 188 + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; 190 189 }; 191 190 192 191 led@2 { 193 192 label = "lswxl:red:alarm"; 194 - gpios = <&gpio1 49 GPIO_ACTIVE_LOW>; 193 + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>; 195 194 }; 196 195 197 196 led@3 { ··· 201 200 202 201 led@4 { 203 202 label = "lswxl:blue:power"; 204 - gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; 203 + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 204 + default-state = "keep"; 205 205 }; 206 206 207 207 led@5 { 208 208 label = "lswxl:red:func"; 209 - gpios = <&gpio1 5 GPIO_ACTIVE_LOW>; 210 - default-state = "keep"; 209 + gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>; 211 210 }; 212 211 213 212 led@6 { 214 213 label = "lswxl:red:hdderr0"; 215 - gpios = <&gpio1 2 GPIO_ACTIVE_LOW>; 214 + gpios = <&gpio0 8 GPIO_ACTIVE_HIGH>; 216 215 }; 217 216 218 217 led@7 { 219 218 label = "lswxl:red:hdderr1"; 220 - gpios = <&gpio1 3 GPIO_ACTIVE_LOW>; 219 + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>; 221 220 }; 222 221 }; 223 222 ··· 226 225 pinctrl-0 = <&pmx_fan_low &pmx_fan_high &pmx_fan_lock>; 227 226 pinctrl-names = "default"; 228 227 229 - gpios = <&gpio0 47 GPIO_ACTIVE_LOW 230 - &gpio0 48 GPIO_ACTIVE_LOW>; 228 + gpios = <&gpio1 16 GPIO_ACTIVE_LOW 229 + &gpio1 15 GPIO_ACTIVE_LOW>; 231 230 232 231 gpio-fan,speed-map = <0 3 233 232 1500 2 234 233 3250 1 235 234 5000 0>; 236 235 237 - alarm-gpios = <&gpio1 49 GPIO_ACTIVE_HIGH>; 236 + alarm-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>; 238 237 }; 239 238 240 239 restart_poweroff { ··· 257 256 enable-active-high; 258 257 regulator-always-on; 259 258 regulator-boot-on; 260 - gpio = <&gpio0 37 GPIO_ACTIVE_HIGH>; 259 + gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>; 261 260 }; 262 261 hdd_power0: regulator@2 { 263 262 compatible = "regulator-fixed";
+1
arch/arm/boot/dts/kirkwood-pogoplug-series-4.dts
··· 131 131 chip-delay = <40>; 132 132 status = "okay"; 133 133 partitions { 134 + compatible = "fixed-partitions"; 134 135 #address-cells = <1>; 135 136 #size-cells = <1>; 136 137
+1 -8
arch/arm/boot/dts/logicpd-torpedo-som.dtsi
··· 112 112 clock-frequency = <400000>; 113 113 }; 114 114 115 - &i2c2 { 116 - clock-frequency = <400000>; 117 - }; 118 - 119 - &i2c3 { 120 - clock-frequency = <400000>; 121 - }; 122 - 123 115 /* 124 116 * Only found on the wireless SOM. For the SOM without wireless, the pins for 125 117 * MMC3 can be routed with jumpers to the second MMC slot on the devkit and ··· 135 143 interrupt-parent = <&gpio5>; 136 144 interrupts = <24 IRQ_TYPE_LEVEL_HIGH>; /* gpio 152 */ 137 145 ref-clock-frequency = <26000000>; 146 + tcxo-clock-frequency = <26000000>; 138 147 }; 139 148 }; 140 149
+33
arch/arm/boot/dts/omap5-board-common.dtsi
··· 130 130 }; 131 131 }; 132 132 133 + &gpio8 { 134 + /* TI trees use GPIO instead of msecure, see also muxing */ 135 + p234 { 136 + gpio-hog; 137 + gpios = <10 GPIO_ACTIVE_HIGH>; 138 + output-high; 139 + line-name = "gpio8_234/msecure"; 140 + }; 141 + }; 142 + 133 143 &omap5_pmx_core { 134 144 pinctrl-names = "default"; 135 145 pinctrl-0 = < ··· 223 213 >; 224 214 }; 225 215 216 + /* TI trees use GPIO mode; msecure mode does not work reliably? */ 217 + palmas_msecure_pins: palmas_msecure_pins { 218 + pinctrl-single,pins = < 219 + OMAP5_IOPAD(0x180, PIN_OUTPUT | MUX_MODE6) /* gpio8_234 */ 220 + >; 221 + }; 222 + 226 223 usbhost_pins: pinmux_usbhost_pins { 227 224 pinctrl-single,pins = < 228 225 OMAP5_IOPAD(0x0c4, PIN_INPUT | MUX_MODE0) /* usbb2_hsic_strobe */ ··· 294 277 pinctrl-0 = < 295 278 &usbhost_wkup_pins 296 279 >; 280 + 281 + palmas_sys_nirq_pins: pinmux_palmas_sys_nirq_pins { 282 + pinctrl-single,pins = < 283 + OMAP5_IOPAD(0x068, PIN_INPUT_PULLUP | MUX_MODE0) /* sys_nirq1 */ 284 + >; 285 + }; 297 286 298 287 usbhost_wkup_pins: pinmux_usbhost_wkup_pins { 299 288 pinctrl-single,pins = < ··· 368 345 interrupt-controller; 369 346 #interrupt-cells = <2>; 370 347 ti,system-power-controller; 348 + pinctrl-names = "default"; 349 + pinctrl-0 = <&palmas_sys_nirq_pins &palmas_msecure_pins>; 371 350 372 351 extcon_usb3: palmas_usb { 373 352 compatible = "ti,palmas-usb-vid"; ··· 381 356 clk32kgaudio: palmas_clk32k@1 { 382 357 compatible = "ti,palmas-clk32kgaudio"; 383 358 #clock-cells = <0>; 359 + }; 360 + 361 + rtc { 362 + compatible = "ti,palmas-rtc"; 363 + interrupt-parent = <&palmas>; 364 + interrupts = <8 IRQ_TYPE_NONE>; 365 + ti,backup-battery-chargeable; 366 + ti,backup-battery-charge-high-current; 384 367 }; 385 368 386 369 palmas_pmic {
+4 -4
arch/arm/boot/dts/orion5x-linkstation-lswtgl.dts
··· 1 1 /* 2 2 * Device Tree file for Buffalo Linkstation LS-WTGL 3 3 * 4 - * Copyright (C) 2015, Roger Shimizu <rogershimizu@gmail.com> 4 + * Copyright (C) 2015, 2016 5 + * Roger Shimizu <rogershimizu@gmail.com> 5 6 * 6 7 * This file is dual-licensed: you can use it either under the terms 7 8 * of the GPL or the X11 license, at your option. Note that this dual ··· 70 69 71 70 internal-regs { 72 71 pinctrl: pinctrl@10000 { 73 - pinctrl-0 = <&pmx_usb_power &pmx_power_hdd 74 - &pmx_fan_low &pmx_fan_high &pmx_fan_lock>; 75 72 pinctrl-names = "default"; 76 73 77 74 pmx_led_power: pmx-leds { ··· 161 162 led@1 { 162 163 label = "lswtgl:blue:power"; 163 164 gpios = <&gpio0 0 GPIO_ACTIVE_LOW>; 165 + default-state = "keep"; 164 166 }; 165 167 166 168 led@2 { ··· 188 188 3250 1 189 189 5000 0>; 190 190 191 - alarm-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>; 191 + alarm-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 192 192 }; 193 193 194 194 restart_poweroff {
+1 -1
arch/arm/boot/dts/sama5d4.dtsi
··· 1342 1342 dbgu: serial@fc069000 { 1343 1343 compatible = "atmel,at91sam9260-dbgu", "atmel,at91sam9260-usart"; 1344 1344 reg = <0xfc069000 0x200>; 1345 - interrupts = <2 IRQ_TYPE_LEVEL_HIGH 7>; 1345 + interrupts = <45 IRQ_TYPE_LEVEL_HIGH 7>; 1346 1346 pinctrl-names = "default"; 1347 1347 pinctrl-0 = <&pinctrl_dbgu>; 1348 1348 clocks = <&dbgu_clk>;
+20 -17
arch/arm/boot/dts/ste-nomadik-stn8815.dtsi
··· 127 127 }; 128 128 mmcsd_default_mode: mmcsd_default { 129 129 mmcsd_default_cfg1 { 130 - /* MCCLK */ 131 - pins = "GPIO8_B10"; 132 - ste,output = <0>; 133 - }; 134 - mmcsd_default_cfg2 { 135 - /* MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 */ 136 - pins = "GPIO10_C11", "GPIO15_A12", 137 - "GPIO16_C13", "GPIO23_D15"; 138 - ste,output = <1>; 139 - }; 140 - mmcsd_default_cfg3 { 141 - /* MCCMD, MCDAT3-0, MCMSFBCLK */ 142 - pins = "GPIO9_A10", "GPIO11_B11", 143 - "GPIO12_A11", "GPIO13_C12", 144 - "GPIO14_B12", "GPIO24_C15"; 145 - ste,input = <1>; 130 + /* 131 + * MCCLK, MCCMDDIR, MCDAT0DIR, MCDAT31DIR, MCDATDIR2 132 + * MCCMD, MCDAT3-0, MCMSFBCLK 133 + */ 134 + pins = "GPIO8_B10", "GPIO9_A10", "GPIO10_C11", "GPIO11_B11", 135 + "GPIO12_A11", "GPIO13_C12", "GPIO14_B12", "GPIO15_A12", 136 + "GPIO16_C13", "GPIO23_D15", "GPIO24_C15"; 137 + ste,output = <2>; 146 138 }; 147 139 }; 148 140 }; ··· 794 802 clock-names = "mclk", "apb_pclk"; 795 803 interrupt-parent = <&vica>; 796 804 interrupts = <22>; 797 - max-frequency = <48000000>; 805 + max-frequency = <400000>; 798 806 bus-width = <4>; 799 807 cap-mmc-highspeed; 800 808 cap-sd-highspeed; 809 + full-pwr-cycle; 810 + /* 811 + * The STw4811 circuit used with the Nomadik strictly 812 + * requires that all of these signal direction pins be 813 + * routed and used for its 4-bit levelshifter. 814 + */ 815 + st,sig-dir-dat0; 816 + st,sig-dir-dat2; 817 + st,sig-dir-dat31; 818 + st,sig-dir-cmd; 819 + st,sig-pin-fbclk; 801 820 pinctrl-names = "default"; 802 821 pinctrl-0 = <&mmcsd_default_mux>, <&mmcsd_default_mode>; 803 822 vmmc-supply = <&vmmc_regulator>;
+1
arch/arm/configs/multi_v7_defconfig
··· 426 426 CONFIG_IMX2_WDT=y 427 427 CONFIG_TEGRA_WATCHDOG=m 428 428 CONFIG_MESON_WATCHDOG=y 429 + CONFIG_DW_WATCHDOG=y 429 430 CONFIG_DIGICOLOR_WATCHDOG=y 430 431 CONFIG_MFD_AS3711=y 431 432 CONFIG_MFD_AS3722=y
+10
arch/arm/configs/omap2plus_defconfig
··· 50 50 CONFIG_SOC_AM43XX=y 51 51 CONFIG_SOC_DRA7XX=y 52 52 CONFIG_ARM_THUMBEE=y 53 + CONFIG_ARM_KERNMEM_PERMS=y 53 54 CONFIG_ARM_ERRATA_411920=y 54 55 CONFIG_ARM_ERRATA_430973=y 55 56 CONFIG_SMP=y ··· 178 177 CONFIG_AT803X_PHY=y 179 178 CONFIG_SMSC_PHY=y 180 179 CONFIG_USB_USBNET=m 180 + CONFIG_USB_NET_SMSC75XX=m 181 181 CONFIG_USB_NET_SMSC95XX=m 182 182 CONFIG_USB_ALI_M5632=y 183 183 CONFIG_USB_AN2720=y ··· 356 354 CONFIG_USB_INVENTRA_DMA=y 357 355 CONFIG_USB_TI_CPPI41_DMA=y 358 356 CONFIG_USB_DWC3=m 357 + CONFIG_USB_SERIAL=m 358 + CONFIG_USB_SERIAL_GENERIC=y 359 + CONFIG_USB_SERIAL_SIMPLE=m 360 + CONFIG_USB_SERIAL_FTDI_SIO=m 361 + CONFIG_USB_SERIAL_PL2303=m 359 362 CONFIG_USB_TEST=m 360 363 CONFIG_AM335X_PHY_USB=y 361 364 CONFIG_USB_GADGET=m ··· 394 387 CONFIG_LEDS_CLASS=m 395 388 CONFIG_LEDS_GPIO=m 396 389 CONFIG_LEDS_PWM=m 390 + CONFIG_LEDS_PCA963X=m 397 391 CONFIG_LEDS_TRIGGERS=y 398 392 CONFIG_LEDS_TRIGGER_TIMER=m 399 393 CONFIG_LEDS_TRIGGER_ONESHOT=m ··· 457 449 CONFIG_NLS_ISO8859_1=y 458 450 CONFIG_PRINTK_TIME=y 459 451 CONFIG_DEBUG_INFO=y 452 + CONFIG_DEBUG_INFO_SPLIT=y 453 + CONFIG_DEBUG_INFO_DWARF4=y 460 454 CONFIG_MAGIC_SYSRQ=y 461 455 CONFIG_SCHEDSTATS=y 462 456 CONFIG_TIMER_STATS=y
-28
arch/arm/mach-omap2/devices.c
··· 18 18 #include <linux/slab.h> 19 19 #include <linux/of.h> 20 20 #include <linux/pinctrl/machine.h> 21 - #include <linux/platform_data/mailbox-omap.h> 22 21 23 22 #include <asm/mach-types.h> 24 23 #include <asm/mach/map.h> ··· 64 65 return PTR_ERR_OR_ZERO(pdev); 65 66 } 66 67 omap_postcore_initcall(omap3_l3_init); 67 - 68 - #if defined(CONFIG_OMAP2PLUS_MBOX) || defined(CONFIG_OMAP2PLUS_MBOX_MODULE) 69 - static inline void __init omap_init_mbox(void) 70 - { 71 - struct omap_hwmod *oh; 72 - struct platform_device *pdev; 73 - struct omap_mbox_pdata *pdata; 74 - 75 - oh = omap_hwmod_lookup("mailbox"); 76 - if (!oh) { 77 - pr_err("%s: unable to find hwmod\n", __func__); 78 - return; 79 - } 80 - if (!oh->dev_attr) { 81 - pr_err("%s: hwmod doesn't have valid attrs\n", __func__); 82 - return; 83 - } 84 - 85 - pdata = (struct omap_mbox_pdata *)oh->dev_attr; 86 - pdev = omap_device_build("omap-mailbox", -1, oh, pdata, sizeof(*pdata)); 87 - WARN(IS_ERR(pdev), "%s: could not build device, err %ld\n", 88 - __func__, PTR_ERR(pdev)); 89 - } 90 - #else 91 - static inline void omap_init_mbox(void) { } 92 - #endif /* CONFIG_OMAP2PLUS_MBOX */ 93 68 94 69 static inline void omap_init_sti(void) {} 95 70 ··· 202 229 * please keep these calls, and their implementations above, 203 230 * in alphabetical order so they're easier to sort through. 204 231 */ 205 - omap_init_mbox(); 206 232 omap_init_mcspi(); 207 233 omap_init_sham(); 208 234 omap_init_aes();
+23
arch/arm/mach-omap2/pdata-quirks.c
··· 23 23 #include <linux/platform_data/pinctrl-single.h> 24 24 #include <linux/platform_data/iommu-omap.h> 25 25 #include <linux/platform_data/wkup_m3.h> 26 + #include <linux/platform_data/pwm_omap_dmtimer.h> 27 + #include <plat/dmtimer.h> 26 28 27 29 #include "common.h" 28 30 #include "common-board-devices.h" ··· 451 449 dev->platform_data = &twl_gpio_auxdata; 452 450 } 453 451 452 + /* Dual mode timer PWM callbacks platdata */ 453 + #if IS_ENABLED(CONFIG_OMAP_DM_TIMER) 454 + struct pwm_omap_dmtimer_pdata pwm_dmtimer_pdata = { 455 + .request_by_node = omap_dm_timer_request_by_node, 456 + .free = omap_dm_timer_free, 457 + .enable = omap_dm_timer_enable, 458 + .disable = omap_dm_timer_disable, 459 + .get_fclk = omap_dm_timer_get_fclk, 460 + .start = omap_dm_timer_start, 461 + .stop = omap_dm_timer_stop, 462 + .set_load = omap_dm_timer_set_load, 463 + .set_match = omap_dm_timer_set_match, 464 + .set_pwm = omap_dm_timer_set_pwm, 465 + .set_prescaler = omap_dm_timer_set_prescaler, 466 + .write_counter = omap_dm_timer_write_counter, 467 + }; 468 + #endif 469 + 454 470 /* 455 471 * Few boards still need auxdata populated before we populate 456 472 * the dev entries in of_platform_populate(). ··· 521 501 OF_DEV_AUXDATA("ti,am437-padconf", 0x44e10800, "44e10800.pinmux", &pcs_pdata), 522 502 OF_DEV_AUXDATA("ti,am4372-wkup-m3", 0x44d00000, "44d00000.wkup_m3", 523 503 &wkup_m3_data), 504 + #endif 505 + #if IS_ENABLED(CONFIG_OMAP_DM_TIMER) 506 + OF_DEV_AUXDATA("ti,omap-dmtimer-pwm", 0, NULL, &pwm_dmtimer_pdata), 524 507 #endif 525 508 #if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) 526 509 OF_DEV_AUXDATA("ti,omap4-iommu", 0x4a066000, "4a066000.mmu",
+30 -31
arch/arm/mach-omap2/sleep34xx.S
··· 86 86 stmfd sp!, {lr} @ save registers on stack 87 87 /* Setup so that we will disable and enable l2 */ 88 88 mov r1, #0x1 89 - adrl r2, l2dis_3630 @ may be too distant for plain adr 90 - str r1, [r2] 89 + adrl r3, l2dis_3630_offset @ may be too distant for plain adr 90 + ldr r2, [r3] @ value for offset 91 + str r1, [r2, r3] @ write to l2dis_3630 91 92 ldmfd sp!, {pc} @ restore regs and return 92 93 ENDPROC(enable_omap3630_toggle_l2_on_restore) 93 94 94 - .text 95 - /* Function to call rom code to save secure ram context */ 95 + /* 96 + * Function to call rom code to save secure ram context. This gets 97 + * relocated to SRAM, so it can be all in .data section. Otherwise 98 + * we need to initialize api_params separately. 99 + */ 100 + .data 96 101 .align 3 97 102 ENTRY(save_secure_ram_context) 98 103 stmfd sp!, {r4 - r11, lr} @ save registers on stack ··· 130 125 ENDPROC(save_secure_ram_context) 131 126 ENTRY(save_secure_ram_context_sz) 132 127 .word . - save_secure_ram_context 128 + 129 + .text 133 130 134 131 /* 135 132 * ====================== ··· 296 289 bic r5, r5, #0x40 297 290 str r5, [r4] 298 291 299 - /* 300 - * PC-relative stores lead to undefined behaviour in Thumb-2: use a r7 as a 301 - * base instead. 302 - * Be careful not to clobber r7 when maintaing this code. 303 - */ 304 - 305 292 is_dll_in_lock_mode: 306 293 /* Is dll in lock mode? */ 307 294 ldr r4, sdrc_dlla_ctrl ··· 303 302 tst r5, #0x4 304 303 bne exit_nonoff_modes @ Return if locked 305 304 /* wait till dll locks */ 306 - adr r7, kick_counter 307 305 wait_dll_lock_timed: 308 - ldr r4, wait_dll_lock_counter 309 - add r4, r4, #1 310 - str r4, [r7, #wait_dll_lock_counter - kick_counter] 311 306 ldr r4, sdrc_dlla_status 312 307 /* Wait 20uS for lock */ 313 308 mov r6, #8 ··· 327 330 orr r6, r6, #(1<<3) @ enable dll 328 331 str r6, [r4] 329 332 dsb 330 - ldr r4, kick_counter 331 - add r4, r4, #1 332 - str r4, [r7] @ kick_counter 333 333 b wait_dll_lock_timed 334 334 335 335 exit_nonoff_modes: ··· 354 360 .word SDRC_DLLA_STATUS_V 355 361 sdrc_dlla_ctrl: 356 362 .word SDRC_DLLA_CTRL_V 357 - /* 358 - * When exporting to userspace while the counters are in SRAM, 359 - * these 2 words need to be at the end to facilitate retrival! 360 - */ 361 - kick_counter: 362 - .word 0 363 - wait_dll_lock_counter: 364 - .word 0 365 - 366 363 ENTRY(omap3_do_wfi_sz) 367 364 .word . - omap3_do_wfi 368 365 ··· 422 437 cmp r2, #0x0 @ Check if target power state was OFF or RET 423 438 bne logic_l1_restore 424 439 425 - ldr r0, l2dis_3630 440 + adr r1, l2dis_3630_offset @ address for offset 441 + ldr r0, [r1] @ value for offset 442 + ldr r0, [r1, r0] @ value at l2dis_3630 426 443 cmp r0, #0x1 @ should we disable L2 on 3630? 427 444 bne skipl2dis 428 445 mrc p15, 0, r0, c1, c0, 1 ··· 436 449 and r1, #0x700 437 450 cmp r1, #0x300 438 451 beq l2_inv_gp 452 + adr r0, l2_inv_api_params_offset 453 + ldr r3, [r0] 454 + add r3, r3, r0 @ r3 points to dummy parameters 439 455 mov r0, #40 @ set service ID for PPA 440 456 mov r12, r0 @ copy secure Service ID in r12 441 457 mov r1, #0 @ set task id for ROM code in r1 442 458 mov r2, #4 @ set some flags in r2, r6 443 459 mov r6, #0xff 444 - adr r3, l2_inv_api_params @ r3 points to dummy parameters 445 460 dsb @ data write barrier 446 461 dmb @ data memory barrier 447 462 smc #1 @ call SMI monitor (smi #1) ··· 477 488 b logic_l1_restore 478 489 479 490 .align 480 - l2_inv_api_params: 481 - .word 0x1, 0x00 491 + l2_inv_api_params_offset: 492 + .long l2_inv_api_params - . 482 493 l2_inv_gp: 483 494 /* Execute smi to invalidate L2 cache */ 484 495 mov r12, #0x1 @ set up to invalidate L2 ··· 495 506 mov r12, #0x2 496 507 smc #0 @ Call SMI monitor (smieq) 497 508 logic_l1_restore: 498 - ldr r1, l2dis_3630 509 + adr r0, l2dis_3630_offset @ adress for offset 510 + ldr r1, [r0] @ value for offset 511 + ldr r1, [r0, r1] @ value at l2dis_3630 499 512 cmp r1, #0x1 @ Test if L2 re-enable needed on 3630 500 513 bne skipl2reen 501 514 mrc p15, 0, r1, c1, c0, 1 ··· 526 535 .word CONTROL_STAT 527 536 control_mem_rta: 528 537 .word CONTROL_MEM_RTA_CTRL 538 + l2dis_3630_offset: 539 + .long l2dis_3630 - . 540 + 541 + .data 529 542 l2dis_3630: 530 543 .word 0 544 + 545 + .data 546 + l2_inv_api_params: 547 + .word 0x1, 0x00 531 548 532 549 /* 533 550 * Internal functions
+17 -8
arch/arm/mach-omap2/sleep44xx.S
··· 29 29 dsb 30 30 .endm 31 31 32 - ppa_zero_params: 33 - .word 0x0 34 - 35 - ppa_por_params: 36 - .word 1, 0 37 - 38 32 #ifdef CONFIG_ARCH_OMAP4 39 33 40 34 /* ··· 260 266 beq skip_ns_smp_enable 261 267 ppa_actrl_retry: 262 268 mov r0, #OMAP4_PPA_CPU_ACTRL_SMP_INDEX 263 - adr r3, ppa_zero_params @ Pointer to parameters 269 + adr r1, ppa_zero_params_offset 270 + ldr r3, [r1] 271 + add r3, r3, r1 @ Pointer to ppa_zero_params 264 272 mov r1, #0x0 @ Process ID 265 273 mov r2, #0x4 @ Flag 266 274 mov r6, #0xff ··· 299 303 ldr r0, =OMAP4_PPA_L2_POR_INDEX 300 304 ldr r1, =OMAP44XX_SAR_RAM_BASE 301 305 ldr r4, [r1, #L2X0_PREFETCH_CTRL_OFFSET] 302 - adr r3, ppa_por_params 306 + adr r1, ppa_por_params_offset 307 + ldr r3, [r1] 308 + add r3, r3, r1 @ Pointer to ppa_por_params 303 309 str r4, [r3, #0x04] 304 310 mov r1, #0x0 @ Process ID 305 311 mov r2, #0x4 @ Flag ··· 326 328 #endif 327 329 328 330 b cpu_resume @ Jump to generic resume 331 + ppa_por_params_offset: 332 + .long ppa_por_params - . 329 333 ENDPROC(omap4_cpu_resume) 330 334 #endif /* CONFIG_ARCH_OMAP4 */ 331 335 ··· 380 380 nop 381 381 382 382 ldmfd sp!, {pc} 383 + ppa_zero_params_offset: 384 + .long ppa_zero_params - . 383 385 ENDPROC(omap_do_wfi) 386 + 387 + .data 388 + ppa_zero_params: 389 + .word 0 390 + 391 + ppa_por_params: 392 + .word 1, 0
+2 -1
arch/arm/mach-realview/Kconfig
··· 1 1 menuconfig ARCH_REALVIEW 2 - bool "ARM Ltd. RealView family" if ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 2 + bool "ARM Ltd. RealView family" 3 + depends on ARCH_MULTI_V5 || ARCH_MULTI_V6 || ARCH_MULTI_V7 3 4 select ARM_AMBA 4 5 select ARM_TIMER_SP804 5 6 select COMMON_CLK_VERSATILE
+1 -1
arch/arm/mach-realview/platsmp-dt.c
··· 80 80 virt_to_phys(versatile_secondary_startup)); 81 81 } 82 82 83 - struct smp_operations realview_dt_smp_ops __initdata = { 83 + static const struct smp_operations realview_dt_smp_ops __initconst = { 84 84 .smp_prepare_cpus = realview_smp_prepare_cpus, 85 85 .smp_secondary_init = versatile_secondary_init, 86 86 .smp_boot_secondary = versatile_boot_secondary,
+2 -1
arch/arm/mach-tango/Kconfig
··· 1 1 config ARCH_TANGO 2 - bool "Sigma Designs Tango4 (SMP87xx)" if ARCH_MULTI_V7 2 + bool "Sigma Designs Tango4 (SMP87xx)" 3 + depends on ARCH_MULTI_V7 3 4 # Cortex-A9 MPCore r3p0, PL310 r3p2 4 5 select ARCH_HAS_HOLES_MEMORYMODEL 5 6 select ARM_ERRATA_754322
+1 -1
arch/arm/mach-tango/platsmp.c
··· 9 9 return 0; 10 10 } 11 11 12 - static struct smp_operations tango_smp_ops __initdata = { 12 + static const struct smp_operations tango_smp_ops __initconst = { 13 13 .smp_boot_secondary = tango_boot_secondary, 14 14 }; 15 15
+1
arch/arm64/boot/dts/arm/juno-base.dtsi
··· 115 115 <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>, 116 116 <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>, 117 117 <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, 118 + <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, 118 119 <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>, 119 120 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 120 121 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>,
+2
arch/arm64/boot/dts/nvidia/tegra132-norrin.dts
··· 12 12 rtc1 = "/rtc@0,7000e000"; 13 13 }; 14 14 15 + chosen { }; 16 + 15 17 memory { 16 18 device_type = "memory"; 17 19 reg = <0x0 0x80000000 0x0 0x80000000>;
+1 -1
drivers/bus/Kconfig
··· 132 132 and AC100/AC200 ICs. 133 133 134 134 config UNIPHIER_SYSTEM_BUS 135 - bool "UniPhier System Bus driver" 135 + tristate "UniPhier System Bus driver" 136 136 depends on ARCH_UNIPHIER && OF 137 137 default y 138 138 help
+3 -1
drivers/bus/vexpress-config.c
··· 192 192 /* Need the config devices early, before the "normal" devices... */ 193 193 for_each_compatible_node(node, NULL, "arm,vexpress,config-bus") { 194 194 err = vexpress_config_populate(node); 195 - if (err) 195 + if (err) { 196 + of_node_put(node); 196 197 break; 198 + } 197 199 } 198 200 199 201 return err;