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Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6

* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6:
drm/i915/lvds: Only act on lid notify when the device is on
drm/i915: fix intel_crtc_clock_get pipe reads after "cleanup cleanup"
drm/i915: Only enable the plane after setting the fb base (pre-ILK)
drm/i915/dp: Be paranoid in case we disable a DP before it is attached
drm/i915: Release object along create user fb error path

+23 -7
+5 -5
drivers/gpu/drm/i915/intel_display.c
··· 5154 5154 5155 5155 I915_WRITE(DSPCNTR(plane), dspcntr); 5156 5156 POSTING_READ(DSPCNTR(plane)); 5157 - if (!HAS_PCH_SPLIT(dev)) 5158 - intel_enable_plane(dev_priv, plane, pipe); 5159 5157 5160 5158 ret = intel_pipe_set_base(crtc, x, y, old_fb); 5161 5159 ··· 5603 5605 intel_clock_t clock; 5604 5606 5605 5607 if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0) 5606 - fp = FP0(pipe); 5608 + fp = I915_READ(FP0(pipe)); 5607 5609 else 5608 - fp = FP1(pipe); 5610 + fp = I915_READ(FP1(pipe)); 5609 5611 5610 5612 clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT; 5611 5613 if (IS_PINEVIEW(dev)) { ··· 6577 6579 return ERR_PTR(-ENOENT); 6578 6580 6579 6581 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL); 6580 - if (!intel_fb) 6582 + if (!intel_fb) { 6583 + drm_gem_object_unreference_unlocked(&obj->base); 6581 6584 return ERR_PTR(-ENOMEM); 6585 + } 6582 6586 6583 6587 ret = intel_framebuffer_init(dev, intel_fb, mode_cmd, obj); 6584 6588 if (ret) {
+15 -2
drivers/gpu/drm/i915/intel_dp.c
··· 1470 1470 1471 1471 if (!HAS_PCH_CPT(dev) && 1472 1472 I915_READ(intel_dp->output_reg) & DP_PIPEB_SELECT) { 1473 - struct intel_crtc *intel_crtc = to_intel_crtc(intel_dp->base.base.crtc); 1473 + struct drm_crtc *crtc = intel_dp->base.base.crtc; 1474 + 1474 1475 /* Hardware workaround: leaving our transcoder select 1475 1476 * set to transcoder B while it's off will prevent the 1476 1477 * corresponding HDMI output on transcoder A. ··· 1486 1485 /* Changes to enable or select take place the vblank 1487 1486 * after being written. 1488 1487 */ 1489 - intel_wait_for_vblank(dev, intel_crtc->pipe); 1488 + if (crtc == NULL) { 1489 + /* We can arrive here never having been attached 1490 + * to a CRTC, for instance, due to inheriting 1491 + * random state from the BIOS. 1492 + * 1493 + * If the pipe is not running, play safe and 1494 + * wait for the clocks to stabilise before 1495 + * continuing. 1496 + */ 1497 + POSTING_READ(intel_dp->output_reg); 1498 + msleep(50); 1499 + } else 1500 + intel_wait_for_vblank(dev, to_intel_crtc(crtc)->pipe); 1490 1501 } 1491 1502 1492 1503 I915_WRITE(intel_dp->output_reg, DP & ~DP_PORT_EN);
+3
drivers/gpu/drm/i915/intel_lvds.c
··· 539 539 struct drm_device *dev = dev_priv->dev; 540 540 struct drm_connector *connector = dev_priv->int_lvds_connector; 541 541 542 + if (dev->switch_power_state != DRM_SWITCH_POWER_ON) 543 + return NOTIFY_OK; 544 + 542 545 /* 543 546 * check and update the status of LVDS connector after receiving 544 547 * the LID nofication event.