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Add tegra264 audio device tree support

Merge series from "Sheetal ." <sheetal@nvidia.com>:

Add device tree support for tegra264 audio subsystem including:
- Binding update for
- 64-channel ADMA controller
- 32 RX/TX ADMAIF channels
- tegra264-agic binding for arm,gic
- Add device tree nodes for
- APE subsystem (ACONNECT, AGIC, ADMA, AHUB and children (ADMAIF, I2S,
DMIC, DSPK, MVC, SFC, ASRC, AMX, ADX, OPE and Mixer) nodes
- HDA controller
- sound

Note:
The change is dependent on https://patchwork.ozlabs.org/project/linux-tegra/patch/20250818135241.3407180-1-thierry.reding@gmail.com/

...
Changes in V2:
- Update the allOf condition in Patch 2/4.

sheetal (4):
dt-bindings: dma: Update ADMA bindings for tegra264
dt-bindings: sound: Update ADMAIF bindings for tegra264
dt-bindings: interrupt-controller: arm,gic: Add tegra264-agic
arm64: tegra: Add tegra264 audio support

.../bindings/dma/nvidia,tegra210-adma.yaml | 15 +-
.../interrupt-controller/arm,gic.yaml | 1 +
.../sound/nvidia,tegra210-admaif.yaml | 106 +-
.../arm64/boot/dts/nvidia/tegra264-p3971.dtsi | 106 +
arch/arm64/boot/dts/nvidia/tegra264.dtsi | 3190 +++++++++++++++++
5 files changed, 3377 insertions(+), 41 deletions(-)

--
2.34.1

+64 -38
+64 -38
Documentation/devicetree/bindings/sound/nvidia,tegra210-admaif.yaml
··· 67 67 $ref: audio-graph-port.yaml# 68 68 unevaluatedProperties: false 69 69 70 - if: 71 - properties: 72 - compatible: 73 - contains: 74 - const: nvidia,tegra210-admaif 70 + allOf: 71 + - if: 72 + properties: 73 + compatible: 74 + contains: 75 + const: nvidia,tegra210-admaif 76 + then: 77 + properties: 78 + dmas: 79 + description: 80 + DMA channel specifiers, equally divided for Tx and Rx. 81 + minItems: 1 82 + maxItems: 20 83 + dma-names: 84 + items: 85 + pattern: "^[rt]x(10|[1-9])$" 86 + description: 87 + Should be "rx1", "rx2" ... "rx10" for DMA Rx channel 88 + Should be "tx1", "tx2" ... "tx10" for DMA Tx channel 89 + minItems: 1 90 + maxItems: 20 91 + interconnects: false 92 + interconnect-names: false 93 + iommus: false 75 94 76 - then: 77 - properties: 78 - dmas: 79 - description: 80 - DMA channel specifiers, equally divided for Tx and Rx. 81 - minItems: 1 82 - maxItems: 20 83 - dma-names: 84 - items: 85 - pattern: "^[rt]x(10|[1-9])$" 86 - description: 87 - Should be "rx1", "rx2" ... "rx10" for DMA Rx channel 88 - Should be "tx1", "tx2" ... "tx10" for DMA Tx channel 89 - minItems: 1 90 - maxItems: 20 91 - interconnects: false 92 - interconnect-names: false 93 - iommus: false 95 + - if: 96 + properties: 97 + compatible: 98 + contains: 99 + const: nvidia,tegra186-admaif 100 + then: 101 + properties: 102 + dmas: 103 + description: 104 + DMA channel specifiers, equally divided for Tx and Rx. 105 + minItems: 1 106 + maxItems: 40 107 + dma-names: 108 + items: 109 + pattern: "^[rt]x(1[0-9]|[1-9]|20)$" 110 + description: 111 + Should be "rx1", "rx2" ... "rx20" for DMA Rx channel 112 + Should be "tx1", "tx2" ... "tx20" for DMA Tx channel 113 + minItems: 1 114 + maxItems: 40 94 115 95 - else: 96 - properties: 97 - dmas: 98 - description: 99 - DMA channel specifiers, equally divided for Tx and Rx. 100 - minItems: 1 101 - maxItems: 40 102 - dma-names: 103 - items: 104 - pattern: "^[rt]x(1[0-9]|[1-9]|20)$" 105 - description: 106 - Should be "rx1", "rx2" ... "rx20" for DMA Rx channel 107 - Should be "tx1", "tx2" ... "tx20" for DMA Tx channel 108 - minItems: 1 109 - maxItems: 40 116 + - if: 117 + properties: 118 + compatible: 119 + contains: 120 + const: nvidia,tegra264-admaif 121 + then: 122 + properties: 123 + dmas: 124 + description: 125 + DMA channel specifiers, equally divided for Tx and Rx. 126 + minItems: 1 127 + maxItems: 64 128 + dma-names: 129 + items: 130 + pattern: "^[rt]x(3[0-2]|[1-2][0-9]|[1-9])$" 131 + description: 132 + Should be "rx1", "rx2" ... "rx32" for DMA Rx channel 133 + Should be "tx1", "tx2" ... "tx32" for DMA Tx channel 134 + minItems: 1 135 + maxItems: 64 110 136 111 137 required: 112 138 - compatible