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irqchip/sg2042-msi: Set irq type according to DT configuration

Read the device tree configuration and use it to set the interrupt type.

Signed-off-by: Chen Wang <unicorn_wang@outlook.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Inochi Amaoto <inochiama@gmail.com> # Sophgo SRD3-10
Link: https://lore.kernel.org/all/b22d2b0a00a96161253435d17b3c66538f3ba1c2.1756953919.git.unicorn_wang@outlook.com

authored by

Chen Wang and committed by
Thomas Gleixner
c2616c56 8aefd272

+5 -2
+5 -2
drivers/irqchip/irq-sg2042-msi.c
··· 30 30 * @doorbell_addr: see TRM, 10.1.32, GP_INTR0_SET 31 31 * @irq_first: First vectors number that MSIs starts 32 32 * @num_irqs: Number of vectors for MSIs 33 + * @irq_type: IRQ type for MSIs 33 34 * @msi_map: mapping for allocated MSI vectors. 34 35 * @msi_map_lock: Lock for msi_map 35 36 * @chip_info: chip specific infomations ··· 42 41 43 42 u32 irq_first; 44 43 u32 num_irqs; 44 + unsigned int irq_type; 45 45 46 46 unsigned long *msi_map; 47 47 struct mutex msi_map_lock; ··· 139 137 fwspec.fwnode = domain->parent->fwnode; 140 138 fwspec.param_count = 2; 141 139 fwspec.param[0] = data->irq_first + hwirq; 142 - fwspec.param[1] = IRQ_TYPE_EDGE_RISING; 140 + fwspec.param[1] = data->irq_type; 143 141 144 142 ret = irq_domain_alloc_irqs_parent(domain, virq, 1, &fwspec); 145 143 if (ret) 146 144 return ret; 147 145 148 146 d = irq_domain_get_irq_data(domain->parent, virq); 149 - return d->chip->irq_set_type(d, IRQ_TYPE_EDGE_RISING); 147 + return d->chip->irq_set_type(d, data->irq_type); 150 148 } 151 149 152 150 static int sg204x_msi_middle_domain_alloc(struct irq_domain *domain, unsigned int virq, ··· 300 298 } 301 299 302 300 data->irq_first = (u32)args.args[0]; 301 + data->irq_type = (unsigned int)args.args[1]; 303 302 data->num_irqs = (u32)args.args[args.nargs - 1]; 304 303 305 304 mutex_init(&data->msi_map_lock);