Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/msm/a6xx: Fix HLSQ register dumping
Fix the bitfield offset of HLSQ_READ_SEL state-type bitfield. Otherwise
we are always reading TP state when we wanted SP or HLSQ state.
Reported-by: Connor Abbott <cwabbott0@gmail.com>
Suggested-by: Connor Abbott <cwabbott0@gmail.com>
Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state")
Signed-off-by: Rob Clark <robin.clark@oss.qualcomm.com>
Patchwork: https://patchwork.freedesktop.org/patch/714236/
Message-ID: <20260325184043.1259312-1-robin.clark@oss.qualcomm.com>
+1
-1
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
+1
-1
drivers/gpu/drm/msm/adreno/a6xx_gpu_state.c
···
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u64 out = dumper->iova + A6XX_CD_DATA_OFFSET;
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int i, regcount = 0;
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1016
-
in += CRASHDUMP_WRITE(in, REG_A6XX_HLSQ_DBG_READ_SEL, regs->val1);
1016
+
in += CRASHDUMP_WRITE(in, REG_A6XX_HLSQ_DBG_READ_SEL, (regs->val1 & 0xff) << 8);
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for (i = 0; i < regs->count; i += 2) {
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u32 count = RANGE(regs->registers, i);