Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.10
1. Google GS101: Minor cleanup and add fake regulators to USB phy, to
satisfy dtbs_check. The PMIC providing these regulators is not yet
implemented.
2. Exynos850: Add True Random Number Generator.
* tag 'samsung-dt64-6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos850: Enable TRNG
arm64: dts: exynos: gs101-oriole: add placeholder regulators for USB phy
arm64: dts: exynos: gs101: reorder properties as per guidelines
Link: https://lore.kernel.org/r/20240702063514.6215-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
+27
-12
+8
arch/arm64/boot/dts/exynos/exynos850.dtsi
+8
arch/arm64/boot/dts/exynos/exynos850.dtsi
···
416
416
interrupts = <GIC_SPI 451 IRQ_TYPE_LEVEL_HIGH>;
417
417
};
418
418
419
+
trng: rng@12081400 {
420
+
compatible = "samsung,exynos850-trng";
421
+
reg = <0x12081400 0x100>;
422
+
clocks = <&cmu_core CLK_GOUT_SSS_ACLK>,
423
+
<&cmu_core CLK_GOUT_SSS_PCLK>;
424
+
clock-names = "secss", "pclk";
425
+
};
426
+
419
427
pinctrl_hsi: pinctrl@13430000 {
420
428
compatible = "samsung,exynos850-pinctrl";
421
429
reg = <0x13430000 0x1000>;
+8
-1
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
+8
-1
arch/arm64/boot/dts/exynos/google/gs101-oriole.dts
···
131
131
};
132
132
133
133
&usbdrd31 {
134
-
status = "okay";
135
134
vdd10-supply = <®_placeholder>;
136
135
vdd33-supply = <®_placeholder>;
136
+
status = "okay";
137
137
};
138
138
139
139
&usbdrd31_dwc3 {
···
145
145
};
146
146
147
147
&usbdrd31_phy {
148
+
/* TODO: Update these once PMIC is implemented */
149
+
pll-supply = <®_placeholder>;
150
+
dvdd-usb20-supply = <®_placeholder>;
151
+
vddh-usb20-supply = <®_placeholder>;
152
+
vdd33-usb20-supply = <®_placeholder>;
153
+
vdda-usbdp-supply = <®_placeholder>;
154
+
vddh-usbdp-supply = <®_placeholder>;
148
155
status = "okay";
149
156
};
150
157
+11
-11
arch/arm64/boot/dts/exynos/google/gs101.dtsi
+11
-11
arch/arm64/boot/dts/exynos/google/gs101.dtsi
···
213
213
214
214
pmu-3 {
215
215
compatible = "arm,dsu-pmu";
216
-
interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
217
216
cpus = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>,
218
217
<&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
218
+
interrupts = <GIC_SPI 257 IRQ_TYPE_LEVEL_HIGH 0>;
219
219
};
220
220
221
221
psci {
···
288
288
compatible = "google,gs101-mct",
289
289
"samsung,exynos4210-mct";
290
290
reg = <0x10050000 0x800>;
291
+
clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>;
292
+
clock-names = "fin_pll", "mct";
291
293
interrupts = <GIC_SPI 753 IRQ_TYPE_LEVEL_HIGH 0>,
292
294
<GIC_SPI 754 IRQ_TYPE_LEVEL_HIGH 0>,
293
295
<GIC_SPI 755 IRQ_TYPE_LEVEL_HIGH 0>,
···
302
300
<GIC_SPI 762 IRQ_TYPE_LEVEL_HIGH 0>,
303
301
<GIC_SPI 763 IRQ_TYPE_LEVEL_HIGH 0>,
304
302
<GIC_SPI 764 IRQ_TYPE_LEVEL_HIGH 0>;
305
-
clocks = <&ext_24_5m>, <&cmu_misc CLK_GOUT_MISC_MCT_PCLK>;
306
-
clock-names = "fin_pll", "mct";
307
303
};
308
304
309
305
watchdog_cl0: watchdog@10060000 {
310
306
compatible = "google,gs101-wdt";
311
307
reg = <0x10060000 0x100>;
312
-
interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>;
313
308
clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER0_PCLK>,
314
309
<&ext_24_5m>;
315
310
clock-names = "watchdog", "watchdog_src";
311
+
interrupts = <GIC_SPI 765 IRQ_TYPE_LEVEL_HIGH 0>;
316
312
samsung,syscon-phandle = <&pmu_system_controller>;
317
313
samsung,cluster-index = <0>;
318
314
status = "disabled";
···
319
319
watchdog_cl1: watchdog@10070000 {
320
320
compatible = "google,gs101-wdt";
321
321
reg = <0x10070000 0x100>;
322
-
interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>;
323
322
clocks = <&cmu_misc CLK_GOUT_MISC_WDT_CLUSTER1_PCLK>,
324
323
<&ext_24_5m>;
325
324
clock-names = "watchdog", "watchdog_src";
325
+
interrupts = <GIC_SPI 766 IRQ_TYPE_LEVEL_HIGH 0>;
326
326
samsung,syscon-phandle = <&pmu_system_controller>;
327
327
samsung,cluster-index = <1>;
328
328
status = "disabled";
···
776
776
compatible = "google,gs101-hsi2c",
777
777
"samsung,exynosautov9-hsi2c";
778
778
reg = <0x10970000 0xc0>;
779
-
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
780
779
#address-cells = <1>;
781
780
#size-cells = <0>;
782
781
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_IPCLK_7>,
783
782
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP0_PCLK_7>;
784
783
clock-names = "hsi2c", "hsi2c_pclk";
784
+
interrupts = <GIC_SPI 642 IRQ_TYPE_LEVEL_HIGH 0>;
785
785
pinctrl-0 = <&hsi2c8_bus>;
786
786
pinctrl-names = "default";
787
787
status = "disabled";
···
831
831
serial_0: serial@10a00000 {
832
832
compatible = "google,gs101-uart";
833
833
reg = <0x10a00000 0xc0>;
834
-
interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
835
834
clocks = <&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_PCLK_0>,
836
835
<&cmu_peric0 CLK_GOUT_PERIC0_PERIC0_TOP1_IPCLK_0>;
837
836
clock-names = "uart", "clk_uart_baud0";
837
+
interrupts = <GIC_SPI 634 IRQ_TYPE_LEVEL_HIGH 0>;
838
838
pinctrl-0 = <&uart0_bus>;
839
839
pinctrl-names = "default";
840
840
samsung,uart-fifosize = <256>;
···
1157
1157
compatible = "google,gs101-hsi2c",
1158
1158
"samsung,exynosautov9-hsi2c";
1159
1159
reg = <0x10d50000 0xc0>;
1160
-
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
1161
1160
#address-cells = <1>;
1162
1161
#size-cells = <0>;
1163
1162
clocks = <&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_IPCLK_5>,
1164
1163
<&cmu_peric1 CLK_GOUT_PERIC1_PERIC1_TOP0_PCLK_5>;
1165
1164
clock-names = "hsi2c", "hsi2c_pclk";
1165
+
interrupts = <GIC_SPI 655 IRQ_TYPE_LEVEL_HIGH 0>;
1166
1166
pinctrl-0 = <&hsi2c12_bus>;
1167
1167
pinctrl-names = "default";
1168
1168
status = "disabled";
···
1277
1277
<&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_CTRL_PCLK>,
1278
1278
<&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USBDPPHY_SCL_APB_PCLK>;
1279
1279
clock-names = "phy", "ref", "ctrl_aclk", "ctrl_pclk", "scl_pclk";
1280
-
samsung,pmu-syscon = <&pmu_system_controller>;
1281
1280
#phy-cells = <1>;
1281
+
samsung,pmu-syscon = <&pmu_system_controller>;
1282
1282
status = "disabled";
1283
1283
};
1284
1284
1285
1285
usbdrd31: usb@11110000 {
1286
1286
compatible = "google,gs101-dwusb3";
1287
+
ranges = <0x0 0x11110000 0x10000>;
1287
1288
clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_BUS_CLK_EARLY>,
1288
1289
<&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_SUSPEND_CLK_26>,
1289
1290
<&cmu_hsi0 CLK_GOUT_HSI0_UASC_HSI0_LINK_ACLK>,
···
1292
1291
clock-names = "bus_early", "susp_clk", "link_aclk", "link_pclk";
1293
1292
#address-cells = <1>;
1294
1293
#size-cells = <1>;
1295
-
ranges = <0x0 0x11110000 0x10000>;
1296
1294
status = "disabled";
1297
1295
1298
1296
usbdrd31_dwc3: usb@0 {
1299
1297
compatible = "snps,dwc3";
1298
+
reg = <0x0 0x10000>;
1300
1299
clocks = <&cmu_hsi0 CLK_GOUT_HSI0_USB31DRD_I_USB31DRD_REF_CLK_40>;
1301
1300
clock-names = "ref";
1302
-
reg = <0x0 0x10000>;
1303
1301
interrupts = <GIC_SPI 463 IRQ_TYPE_LEVEL_HIGH 0>;
1304
1302
phys = <&usbdrd31_phy 0>, <&usbdrd31_phy 1>;
1305
1303
phy-names = "usb2-phy", "usb3-phy";