+12 -4

drivers/net/ethernet/hisilicon/hns3/hnae3.h

reviewed

··· 339 339 HNAE3_DBG_CMD_UNKNOWN, 340 340 }; 341 341 342 342 + #define hnae3_seq_file_to_ae_dev(s) (dev_get_drvdata((s)->private)) 343 343 + #define hnae3_seq_file_to_handle(s) \ 344 344 + (((struct hnae3_ae_dev *)hnae3_seq_file_to_ae_dev(s))->handle) 345 345 + 342 346 enum hnae3_tc_map_mode { 343 347 HNAE3_TC_MAP_MODE_PRIO, 344 348 HNAE3_TC_MAP_MODE_DSCP, ··· 438 434 u32 dev_version; 439 435 DECLARE_BITMAP(caps, HNAE3_DEV_CAPS_MAX_NUM); 440 436 void *priv; 437 437 + struct hnae3_handle *handle; 441 438 }; 439 439 + 440 440 + typedef int (*read_func)(struct seq_file *s, void *data); 442 441 443 442 /* This struct defines the operation on the handle. 444 443 * ··· 587 580 * Delete clsflower rule 588 581 * cls_flower_active 589 582 * Check if any cls flower rule exist 590 590 - * dbg_read_cmd 591 591 - * Execute debugfs read command. 592 583 * set_tx_hwts_info 593 584 * Save information for 1588 tx packet 594 585 * get_rx_hwts ··· 599 594 * Get wake on lan info 600 595 * set_wol 601 596 * Config wake on lan 597 597 + * dbg_get_read_func 598 598 + * Return the read func for debugfs seq file 602 599 */ 603 600 struct hnae3_ae_ops { 604 601 int (*init_ae_dev)(struct hnae3_ae_dev *ae_dev); ··· 755 748 void (*enable_fd)(struct hnae3_handle *handle, bool enable); 756 749 int (*add_arfs_entry)(struct hnae3_handle *handle, u16 queue_id, 757 750 u16 flow_id, struct flow_keys *fkeys); 758 758 - int (*dbg_read_cmd)(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, 759 759 - char *buf, int len); 760 751 pci_ers_result_t (*handle_hw_ras_error)(struct hnae3_ae_dev *ae_dev); 761 752 bool (*get_hw_reset_stat)(struct hnae3_handle *handle); 762 753 bool (*ae_dev_resetting)(struct hnae3_handle *handle); ··· 801 796 struct ethtool_wolinfo *wol); 802 797 int (*set_wol)(struct hnae3_handle *handle, 803 798 struct ethtool_wolinfo *wol); 799 799 + int (*dbg_get_read_func)(struct hnae3_handle *handle, 800 800 + enum hnae3_dbg_cmd cmd, 801 801 + read_func *func); 804 802 }; 805 803 806 804 struct hnae3_dcb_ops {

+300 -742

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c

reviewed

··· 3 3 4 4 #include <linux/debugfs.h> 5 5 #include <linux/device.h> 6 6 + #include <linux/seq_file.h> 6 7 #include <linux/string_choices.h> 7 8 8 9 #include "hnae3.h" ··· 41 40 }; 42 41 43 42 static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd); 44 44 - static int hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd); 43 43 + static int hns3_dbg_common_init_t1(struct hnae3_handle *handle, u32 cmd); 44 44 + static int hns3_dbg_common_init_t2(struct hnae3_handle *handle, u32 cmd); 45 45 46 46 static struct hns3_dbg_cmd_info hns3_dbg_cmd[] = { 47 47 { 48 48 .name = "tm_nodes", 49 49 .cmd = HNAE3_DBG_CMD_TM_NODES, 50 50 .dentry = HNS3_DBG_DENTRY_TM, 51 51 - .buf_len = HNS3_DBG_READ_LEN, 52 52 - .init = hns3_dbg_common_file_init, 51 51 + .init = hns3_dbg_common_init_t2, 53 52 }, 54 53 { 55 54 .name = "tm_priority", 56 55 .cmd = HNAE3_DBG_CMD_TM_PRI, 57 56 .dentry = HNS3_DBG_DENTRY_TM, 58 58 - .buf_len = HNS3_DBG_READ_LEN, 59 59 - .init = hns3_dbg_common_file_init, 57 57 + .init = hns3_dbg_common_init_t2, 60 58 }, 61 59 { 62 60 .name = "tm_qset", 63 61 .cmd = HNAE3_DBG_CMD_TM_QSET, 64 62 .dentry = HNS3_DBG_DENTRY_TM, 65 65 - .buf_len = HNS3_DBG_READ_LEN_1MB, 66 66 - .init = hns3_dbg_common_file_init, 63 63 + .init = hns3_dbg_common_init_t2, 67 64 }, 68 65 { 69 66 .name = "tm_map", 70 67 .cmd = HNAE3_DBG_CMD_TM_MAP, 71 68 .dentry = HNS3_DBG_DENTRY_TM, 72 72 - .buf_len = HNS3_DBG_READ_LEN_1MB, 73 73 - .init = hns3_dbg_common_file_init, 69 69 + .init = hns3_dbg_common_init_t2, 74 70 }, 75 71 { 76 72 .name = "tm_pg", 77 73 .cmd = HNAE3_DBG_CMD_TM_PG, 78 74 .dentry = HNS3_DBG_DENTRY_TM, 79 79 - .buf_len = HNS3_DBG_READ_LEN, 80 80 - .init = hns3_dbg_common_file_init, 75 75 + .init = hns3_dbg_common_init_t2, 81 76 }, 82 77 { 83 78 .name = "tm_port", 84 79 .cmd = HNAE3_DBG_CMD_TM_PORT, 85 80 .dentry = HNS3_DBG_DENTRY_TM, 86 86 - .buf_len = HNS3_DBG_READ_LEN, 87 87 - .init = hns3_dbg_common_file_init, 81 81 + .init = hns3_dbg_common_init_t2, 88 82 }, 89 83 { 90 84 .name = "tc_sch_info", 91 85 .cmd = HNAE3_DBG_CMD_TC_SCH_INFO, 92 86 .dentry = HNS3_DBG_DENTRY_TM, 93 93 - .buf_len = HNS3_DBG_READ_LEN, 94 94 - .init = hns3_dbg_common_file_init, 87 87 + .init = hns3_dbg_common_init_t2, 95 88 }, 96 89 { 97 90 .name = "qos_pause_cfg", 98 91 .cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG, 99 92 .dentry = HNS3_DBG_DENTRY_TM, 100 100 - .buf_len = HNS3_DBG_READ_LEN, 101 101 - .init = hns3_dbg_common_file_init, 93 93 + .init = hns3_dbg_common_init_t2, 102 94 }, 103 95 { 104 96 .name = "qos_pri_map", 105 97 .cmd = HNAE3_DBG_CMD_QOS_PRI_MAP, 106 98 .dentry = HNS3_DBG_DENTRY_TM, 107 107 - .buf_len = HNS3_DBG_READ_LEN, 108 108 - .init = hns3_dbg_common_file_init, 99 99 + .init = hns3_dbg_common_init_t2, 109 100 }, 110 101 { 111 102 .name = "qos_dscp_map", 112 103 .cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP, 113 104 .dentry = HNS3_DBG_DENTRY_TM, 114 114 - .buf_len = HNS3_DBG_READ_LEN, 115 115 - .init = hns3_dbg_common_file_init, 105 105 + .init = hns3_dbg_common_init_t2, 116 106 }, 117 107 { 118 108 .name = "qos_buf_cfg", 119 109 .cmd = HNAE3_DBG_CMD_QOS_BUF_CFG, 120 110 .dentry = HNS3_DBG_DENTRY_TM, 121 121 - .buf_len = HNS3_DBG_READ_LEN, 122 122 - .init = hns3_dbg_common_file_init, 111 111 + .init = hns3_dbg_common_init_t2, 123 112 }, 124 113 { 125 114 .name = "dev_info", 126 115 .cmd = HNAE3_DBG_CMD_DEV_INFO, 127 116 .dentry = HNS3_DBG_DENTRY_COMMON, 128 128 - .buf_len = HNS3_DBG_READ_LEN, 129 129 - .init = hns3_dbg_common_file_init, 117 117 + .init = hns3_dbg_common_init_t1, 130 118 }, 131 119 { 132 120 .name = "tx_bd_queue", 133 121 .cmd = HNAE3_DBG_CMD_TX_BD, 134 122 .dentry = HNS3_DBG_DENTRY_TX_BD, 135 135 - .buf_len = HNS3_DBG_READ_LEN_5MB, 136 123 .init = hns3_dbg_bd_file_init, 137 124 }, 138 125 { 139 126 .name = "rx_bd_queue", 140 127 .cmd = HNAE3_DBG_CMD_RX_BD, 141 128 .dentry = HNS3_DBG_DENTRY_RX_BD, 142 142 - .buf_len = HNS3_DBG_READ_LEN_4MB, 143 129 .init = hns3_dbg_bd_file_init, 144 130 }, 145 131 { 146 132 .name = "uc", 147 133 .cmd = HNAE3_DBG_CMD_MAC_UC, 148 134 .dentry = HNS3_DBG_DENTRY_MAC, 149 149 - .buf_len = HNS3_DBG_READ_LEN_128KB, 150 150 - .init = hns3_dbg_common_file_init, 135 135 + .init = hns3_dbg_common_init_t2, 151 136 }, 152 137 { 153 138 .name = "mc", 154 139 .cmd = HNAE3_DBG_CMD_MAC_MC, 155 140 .dentry = HNS3_DBG_DENTRY_MAC, 156 156 - .buf_len = HNS3_DBG_READ_LEN, 157 157 - .init = hns3_dbg_common_file_init, 141 141 + .init = hns3_dbg_common_init_t2, 158 142 }, 159 143 { 160 144 .name = "mng_tbl", 161 145 .cmd = HNAE3_DBG_CMD_MNG_TBL, 162 146 .dentry = HNS3_DBG_DENTRY_COMMON, 163 163 - .buf_len = HNS3_DBG_READ_LEN, 164 164 - .init = hns3_dbg_common_file_init, 147 147 + .init = hns3_dbg_common_init_t2, 165 148 }, 166 149 { 167 150 .name = "loopback", 168 151 .cmd = HNAE3_DBG_CMD_LOOPBACK, 169 152 .dentry = HNS3_DBG_DENTRY_COMMON, 170 170 - .buf_len = HNS3_DBG_READ_LEN, 171 171 - .init = hns3_dbg_common_file_init, 153 153 + .init = hns3_dbg_common_init_t2, 172 154 }, 173 155 { 174 156 .name = "interrupt_info", 175 157 .cmd = HNAE3_DBG_CMD_INTERRUPT_INFO, 176 158 .dentry = HNS3_DBG_DENTRY_COMMON, 177 177 - .buf_len = HNS3_DBG_READ_LEN, 178 178 - .init = hns3_dbg_common_file_init, 159 159 + .init = hns3_dbg_common_init_t2, 179 160 }, 180 161 { 181 162 .name = "reset_info", 182 163 .cmd = HNAE3_DBG_CMD_RESET_INFO, 183 164 .dentry = HNS3_DBG_DENTRY_COMMON, 184 184 - .buf_len = HNS3_DBG_READ_LEN, 185 185 - .init = hns3_dbg_common_file_init, 165 165 + .init = hns3_dbg_common_init_t2, 186 166 }, 187 167 { 188 168 .name = "imp_info", 189 169 .cmd = HNAE3_DBG_CMD_IMP_INFO, 190 170 .dentry = HNS3_DBG_DENTRY_COMMON, 191 191 - .buf_len = HNS3_DBG_READ_LEN, 192 192 - .init = hns3_dbg_common_file_init, 171 171 + .init = hns3_dbg_common_init_t2, 193 172 }, 194 173 { 195 174 .name = "ncl_config", 196 175 .cmd = HNAE3_DBG_CMD_NCL_CONFIG, 197 176 .dentry = HNS3_DBG_DENTRY_COMMON, 198 198 - .buf_len = HNS3_DBG_READ_LEN_128KB, 199 199 - .init = hns3_dbg_common_file_init, 177 177 + .init = hns3_dbg_common_init_t2, 200 178 }, 201 179 { 202 180 .name = "mac_tnl_status", 203 181 .cmd = HNAE3_DBG_CMD_MAC_TNL_STATUS, 204 182 .dentry = HNS3_DBG_DENTRY_COMMON, 205 205 - .buf_len = HNS3_DBG_READ_LEN, 206 206 - .init = hns3_dbg_common_file_init, 183 183 + .init = hns3_dbg_common_init_t2, 207 184 }, 208 185 { 209 186 .name = "bios_common", 210 187 .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON, 211 188 .dentry = HNS3_DBG_DENTRY_REG, 212 212 - .buf_len = HNS3_DBG_READ_LEN, 213 213 - .init = hns3_dbg_common_file_init, 189 189 + .init = hns3_dbg_common_init_t2, 214 190 }, 215 191 { 216 192 .name = "ssu", 217 193 .cmd = HNAE3_DBG_CMD_REG_SSU, 218 194 .dentry = HNS3_DBG_DENTRY_REG, 219 219 - .buf_len = HNS3_DBG_READ_LEN, 220 220 - .init = hns3_dbg_common_file_init, 195 195 + .init = hns3_dbg_common_init_t2, 221 196 }, 222 197 { 223 198 .name = "igu_egu", 224 199 .cmd = HNAE3_DBG_CMD_REG_IGU_EGU, 225 200 .dentry = HNS3_DBG_DENTRY_REG, 226 226 - .buf_len = HNS3_DBG_READ_LEN, 227 227 - .init = hns3_dbg_common_file_init, 201 201 + .init = hns3_dbg_common_init_t2, 228 202 }, 229 203 { 230 204 .name = "rpu", 231 205 .cmd = HNAE3_DBG_CMD_REG_RPU, 232 206 .dentry = HNS3_DBG_DENTRY_REG, 233 233 - .buf_len = HNS3_DBG_READ_LEN, 234 234 - .init = hns3_dbg_common_file_init, 207 207 + .init = hns3_dbg_common_init_t2, 235 208 }, 236 209 { 237 210 .name = "ncsi", 238 211 .cmd = HNAE3_DBG_CMD_REG_NCSI, 239 212 .dentry = HNS3_DBG_DENTRY_REG, 240 240 - .buf_len = HNS3_DBG_READ_LEN, 241 241 - .init = hns3_dbg_common_file_init, 213 213 + .init = hns3_dbg_common_init_t2, 242 214 }, 243 215 { 244 216 .name = "rtc", 245 217 .cmd = HNAE3_DBG_CMD_REG_RTC, 246 218 .dentry = HNS3_DBG_DENTRY_REG, 247 247 - .buf_len = HNS3_DBG_READ_LEN, 248 248 - .init = hns3_dbg_common_file_init, 219 219 + .init = hns3_dbg_common_init_t2, 249 220 }, 250 221 { 251 222 .name = "ppp", 252 223 .cmd = HNAE3_DBG_CMD_REG_PPP, 253 224 .dentry = HNS3_DBG_DENTRY_REG, 254 254 - .buf_len = HNS3_DBG_READ_LEN, 255 255 - .init = hns3_dbg_common_file_init, 225 225 + .init = hns3_dbg_common_init_t2, 256 226 }, 257 227 { 258 228 .name = "rcb", 259 229 .cmd = HNAE3_DBG_CMD_REG_RCB, 260 230 .dentry = HNS3_DBG_DENTRY_REG, 261 261 - .buf_len = HNS3_DBG_READ_LEN, 262 262 - .init = hns3_dbg_common_file_init, 231 231 + .init = hns3_dbg_common_init_t2, 263 232 }, 264 233 { 265 234 .name = "tqp", 266 235 .cmd = HNAE3_DBG_CMD_REG_TQP, 267 236 .dentry = HNS3_DBG_DENTRY_REG, 268 268 - .buf_len = HNS3_DBG_READ_LEN_128KB, 269 269 - .init = hns3_dbg_common_file_init, 237 237 + .init = hns3_dbg_common_init_t2, 270 238 }, 271 239 { 272 240 .name = "mac", 273 241 .cmd = HNAE3_DBG_CMD_REG_MAC, 274 242 .dentry = HNS3_DBG_DENTRY_REG, 275 275 - .buf_len = HNS3_DBG_READ_LEN, 276 276 - .init = hns3_dbg_common_file_init, 243 243 + .init = hns3_dbg_common_init_t2, 277 244 }, 278 245 { 279 246 .name = "dcb", 280 247 .cmd = HNAE3_DBG_CMD_REG_DCB, 281 248 .dentry = HNS3_DBG_DENTRY_REG, 282 282 - .buf_len = HNS3_DBG_READ_LEN, 283 283 - .init = hns3_dbg_common_file_init, 249 249 + .init = hns3_dbg_common_init_t2, 284 250 }, 285 251 { 286 252 .name = "queue_map", 287 253 .cmd = HNAE3_DBG_CMD_QUEUE_MAP, 288 254 .dentry = HNS3_DBG_DENTRY_QUEUE, 289 289 - .buf_len = HNS3_DBG_READ_LEN, 290 290 - .init = hns3_dbg_common_file_init, 255 255 + .init = hns3_dbg_common_init_t1, 291 256 }, 292 257 { 293 258 .name = "rx_queue_info", 294 259 .cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO, 295 260 .dentry = HNS3_DBG_DENTRY_QUEUE, 296 296 - .buf_len = HNS3_DBG_READ_LEN_1MB, 297 297 - .init = hns3_dbg_common_file_init, 261 261 + .init = hns3_dbg_common_init_t1, 298 262 }, 299 263 { 300 264 .name = "tx_queue_info", 301 265 .cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO, 302 266 .dentry = HNS3_DBG_DENTRY_QUEUE, 303 303 - .buf_len = HNS3_DBG_READ_LEN_1MB, 304 304 - .init = hns3_dbg_common_file_init, 267 267 + .init = hns3_dbg_common_init_t1, 305 268 }, 306 269 { 307 270 .name = "fd_tcam", 308 271 .cmd = HNAE3_DBG_CMD_FD_TCAM, 309 272 .dentry = HNS3_DBG_DENTRY_FD, 310 310 - .buf_len = HNS3_DBG_READ_LEN_1MB, 311 311 - .init = hns3_dbg_common_file_init, 273 273 + .init = hns3_dbg_common_init_t2, 312 274 }, 313 275 { 314 276 .name = "service_task_info", 315 277 .cmd = HNAE3_DBG_CMD_SERV_INFO, 316 278 .dentry = HNS3_DBG_DENTRY_COMMON, 317 317 - .buf_len = HNS3_DBG_READ_LEN, 318 318 - .init = hns3_dbg_common_file_init, 279 279 + .init = hns3_dbg_common_init_t2, 319 280 }, 320 281 { 321 282 .name = "vlan_config", 322 283 .cmd = HNAE3_DBG_CMD_VLAN_CONFIG, 323 284 .dentry = HNS3_DBG_DENTRY_COMMON, 324 324 - .buf_len = HNS3_DBG_READ_LEN, 325 325 - .init = hns3_dbg_common_file_init, 285 285 + .init = hns3_dbg_common_init_t2, 326 286 }, 327 287 { 328 288 .name = "ptp_info", 329 289 .cmd = HNAE3_DBG_CMD_PTP_INFO, 330 290 .dentry = HNS3_DBG_DENTRY_COMMON, 331 331 - .buf_len = HNS3_DBG_READ_LEN, 332 332 - .init = hns3_dbg_common_file_init, 291 291 + .init = hns3_dbg_common_init_t2, 333 292 }, 334 293 { 335 294 .name = "fd_counter", 336 295 .cmd = HNAE3_DBG_CMD_FD_COUNTER, 337 296 .dentry = HNS3_DBG_DENTRY_FD, 338 338 - .buf_len = HNS3_DBG_READ_LEN, 339 339 - .init = hns3_dbg_common_file_init, 297 297 + .init = hns3_dbg_common_init_t2, 340 298 }, 341 299 { 342 300 .name = "umv_info", 343 301 .cmd = HNAE3_DBG_CMD_UMV_INFO, 344 302 .dentry = HNS3_DBG_DENTRY_COMMON, 345 345 - .buf_len = HNS3_DBG_READ_LEN, 346 346 - .init = hns3_dbg_common_file_init, 303 303 + .init = hns3_dbg_common_init_t2, 347 304 }, 348 305 { 349 306 .name = "page_pool_info", 350 307 .cmd = HNAE3_DBG_CMD_PAGE_POOL_INFO, 351 308 .dentry = HNS3_DBG_DENTRY_COMMON, 352 352 - .buf_len = HNS3_DBG_READ_LEN, 353 353 - .init = hns3_dbg_common_file_init, 309 309 + .init = hns3_dbg_common_init_t1, 354 310 }, 355 311 { 356 312 .name = "coalesce_info", 357 313 .cmd = HNAE3_DBG_CMD_COAL_INFO, 358 314 .dentry = HNS3_DBG_DENTRY_COMMON, 359 359 - .buf_len = HNS3_DBG_READ_LEN_1MB, 360 360 - .init = hns3_dbg_common_file_init, 315 315 + .init = hns3_dbg_common_init_t1, 361 316 }, 362 317 }; 363 318 ··· 378 421 } 379 422 }; 380 423 381 381 - static const struct hns3_dbg_item coal_info_items[] = { 382 382 - { "VEC_ID", 2 }, 383 383 - { "ALGO_STATE", 2 }, 384 384 - { "PROFILE_ID", 2 }, 385 385 - { "CQE_MODE", 2 }, 386 386 - { "TUNE_STATE", 2 }, 387 387 - { "STEPS_LEFT", 2 }, 388 388 - { "STEPS_RIGHT", 2 }, 389 389 - { "TIRED", 2 }, 390 390 - { "SW_GL", 2 }, 391 391 - { "SW_QL", 2 }, 392 392 - { "HW_GL", 2 }, 393 393 - { "HW_QL", 2 }, 394 394 - }; 395 395 - 396 424 static const char * const dim_cqe_mode_str[] = { "EQE", "CQE" }; 397 425 static const char * const dim_state_str[] = { "START", "IN_PROG", "APPLY" }; 398 426 static const char * const 399 427 dim_tune_stat_str[] = { "ON_TOP", "TIRED", "RIGHT", "LEFT" }; 400 428 401 401 - static void hns3_dbg_fill_content(char *content, u16 len, 402 402 - const struct hns3_dbg_item *items, 403 403 - const char **result, u16 size) 404 404 - { 405 405 - #define HNS3_DBG_LINE_END_LEN 2 406 406 - char *pos = content; 407 407 - u16 item_len; 408 408 - u16 i; 409 409 - 410 410 - if (!len) { 411 411 - return; 412 412 - } else if (len <= HNS3_DBG_LINE_END_LEN) { 413 413 - *pos++ = '\0'; 414 414 - return; 415 415 - } 416 416 - 417 417 - memset(content, ' ', len); 418 418 - len -= HNS3_DBG_LINE_END_LEN; 419 419 - 420 420 - for (i = 0; i < size; i++) { 421 421 - item_len = strlen(items[i].name) + items[i].interval; 422 422 - if (len < item_len) 423 423 - break; 424 424 - 425 425 - if (result) { 426 426 - if (item_len < strlen(result[i])) 427 427 - break; 428 428 - memcpy(pos, result[i], strlen(result[i])); 429 429 - } else { 430 430 - memcpy(pos, items[i].name, strlen(items[i].name)); 431 431 - } 432 432 - pos += item_len; 433 433 - len -= item_len; 434 434 - } 435 435 - *pos++ = '\n'; 436 436 - *pos++ = '\0'; 437 437 - } 438 438 - 439 429 static void hns3_get_coal_info(struct hns3_enet_tqp_vector *tqp_vector, 440 440 - char **result, int i, bool is_tx) 430 430 + struct seq_file *s, int i, bool is_tx) 441 431 { 442 432 unsigned int gl_offset, ql_offset; 443 433 struct hns3_enet_coalesce *coal; 444 434 unsigned int reg_val; 445 445 - unsigned int j = 0; 446 435 struct dim *dim; 447 436 bool ql_enable; 448 437 ··· 406 503 ql_enable = tqp_vector->rx_group.coal.ql_enable; 407 504 } 408 505 409 409 - sprintf(result[j++], "%d", i); 410 410 - sprintf(result[j++], "%s", dim->state < ARRAY_SIZE(dim_state_str) ? 411 411 - dim_state_str[dim->state] : "unknown"); 412 412 - sprintf(result[j++], "%u", dim->profile_ix); 413 413 - sprintf(result[j++], "%s", dim->mode < ARRAY_SIZE(dim_cqe_mode_str) ? 414 414 - dim_cqe_mode_str[dim->mode] : "unknown"); 415 415 - sprintf(result[j++], "%s", 416 416 - dim->tune_state < ARRAY_SIZE(dim_tune_stat_str) ? 417 417 - dim_tune_stat_str[dim->tune_state] : "unknown"); 418 418 - sprintf(result[j++], "%u", dim->steps_left); 419 419 - sprintf(result[j++], "%u", dim->steps_right); 420 420 - sprintf(result[j++], "%u", dim->tired); 421 421 - sprintf(result[j++], "%u", coal->int_gl); 422 422 - sprintf(result[j++], "%u", coal->int_ql); 506 506 + seq_printf(s, "%-8d", i); 507 507 + seq_printf(s, "%-12s", dim->state < ARRAY_SIZE(dim_state_str) ? 508 508 + dim_state_str[dim->state] : "unknown"); 509 509 + seq_printf(s, "%-12u", dim->profile_ix); 510 510 + seq_printf(s, "%-10s", dim->mode < ARRAY_SIZE(dim_cqe_mode_str) ? 511 511 + dim_cqe_mode_str[dim->mode] : "unknown"); 512 512 + seq_printf(s, "%-12s", dim->tune_state < ARRAY_SIZE(dim_tune_stat_str) ? 513 513 + dim_tune_stat_str[dim->tune_state] : "unknown"); 514 514 + seq_printf(s, "%-12u%-13u%-7u%-7u%-7u", dim->steps_left, 515 515 + dim->steps_right, dim->tired, coal->int_gl, coal->int_ql); 423 516 reg_val = readl(tqp_vector->mask_addr + gl_offset) & 424 517 HNS3_VECTOR_GL_MASK; 425 425 - sprintf(result[j++], "%u", reg_val); 518 518 + seq_printf(s, "%-7u", reg_val); 426 519 if (ql_enable) { 427 520 reg_val = readl(tqp_vector->mask_addr + ql_offset) & 428 521 HNS3_VECTOR_QL_MASK; 429 429 - sprintf(result[j++], "%u", reg_val); 522 522 + seq_printf(s, "%u\n", reg_val); 430 523 } else { 431 431 - sprintf(result[j++], "NA"); 524 524 + seq_puts(s, "NA\n"); 432 525 } 433 526 } 434 527 435 435 - static void hns3_dump_coal_info(struct hnae3_handle *h, char *buf, int len, 436 436 - int *pos, bool is_tx) 528 528 + static void hns3_dump_coal_info(struct seq_file *s, bool is_tx) 437 529 { 438 438 - char data_str[ARRAY_SIZE(coal_info_items)][HNS3_DBG_DATA_STR_LEN]; 439 439 - char *result[ARRAY_SIZE(coal_info_items)]; 530 530 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 440 531 struct hns3_enet_tqp_vector *tqp_vector; 441 532 struct hns3_nic_priv *priv = h->priv; 442 442 - char content[HNS3_DBG_INFO_LEN]; 443 533 unsigned int i; 444 534 445 445 - for (i = 0; i < ARRAY_SIZE(coal_info_items); i++) 446 446 - result[i] = &data_str[i][0]; 535 535 + seq_printf(s, "%s interrupt coalesce info:\n", is_tx ? "tx" : "rx"); 447 536 448 448 - *pos += scnprintf(buf + *pos, len - *pos, 449 449 - "%s interrupt coalesce info:\n", 450 450 - is_tx ? "tx" : "rx"); 451 451 - hns3_dbg_fill_content(content, sizeof(content), coal_info_items, 452 452 - NULL, ARRAY_SIZE(coal_info_items)); 453 453 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 537 537 + seq_puts(s, "VEC_ID ALGO_STATE PROFILE_ID CQE_MODE TUNE_STATE "); 538 538 + seq_puts(s, "STEPS_LEFT STEPS_RIGHT TIRED SW_GL SW_QL "); 539 539 + seq_puts(s, "HW_GL HW_QL\n"); 454 540 455 541 for (i = 0; i < priv->vector_num; i++) { 456 542 tqp_vector = &priv->tqp_vector[i]; 457 457 - hns3_get_coal_info(tqp_vector, result, i, is_tx); 458 458 - hns3_dbg_fill_content(content, sizeof(content), coal_info_items, 459 459 - (const char **)result, 460 460 - ARRAY_SIZE(coal_info_items)); 461 461 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 543 543 + hns3_get_coal_info(tqp_vector, s, i, is_tx); 462 544 } 463 545 } 464 546 465 465 - static int hns3_dbg_coal_info(struct hnae3_handle *h, char *buf, int len) 547 547 + static int hns3_dbg_coal_info(struct seq_file *s, void *data) 466 548 { 467 467 - int pos = 0; 468 468 - 469 469 - hns3_dump_coal_info(h, buf, len, &pos, true); 470 470 - pos += scnprintf(buf + pos, len - pos, "\n"); 471 471 - hns3_dump_coal_info(h, buf, len, &pos, false); 549 549 + hns3_dump_coal_info(s, true); 550 550 + seq_puts(s, "\n"); 551 551 + hns3_dump_coal_info(s, false); 472 552 473 553 return 0; 474 554 } 475 555 476 476 - static const struct hns3_dbg_item tx_spare_info_items[] = { 477 477 - { "QUEUE_ID", 2 }, 478 478 - { "COPYBREAK", 2 }, 479 479 - { "LEN", 7 }, 480 480 - { "NTU", 4 }, 481 481 - { "NTC", 4 }, 482 482 - { "LTC", 4 }, 483 483 - { "DMA", 17 }, 484 484 - }; 485 485 - 486 486 - static void hns3_dbg_tx_spare_info(struct hns3_enet_ring *ring, char *buf, 487 487 - int len, u32 ring_num, int *pos) 488 488 - { 489 489 - char data_str[ARRAY_SIZE(tx_spare_info_items)][HNS3_DBG_DATA_STR_LEN]; 490 490 - struct hns3_tx_spare *tx_spare = ring->tx_spare; 491 491 - char *result[ARRAY_SIZE(tx_spare_info_items)]; 492 492 - char content[HNS3_DBG_INFO_LEN]; 493 493 - u32 i, j; 494 494 - 495 495 - if (!tx_spare) { 496 496 - *pos += scnprintf(buf + *pos, len - *pos, 497 497 - "tx spare buffer is not enabled\n"); 498 498 - return; 499 499 - } 500 500 - 501 501 - for (i = 0; i < ARRAY_SIZE(tx_spare_info_items); i++) 502 502 - result[i] = &data_str[i][0]; 503 503 - 504 504 - *pos += scnprintf(buf + *pos, len - *pos, "tx spare buffer info\n"); 505 505 - hns3_dbg_fill_content(content, sizeof(content), tx_spare_info_items, 506 506 - NULL, ARRAY_SIZE(tx_spare_info_items)); 507 507 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 508 508 - 509 509 - for (i = 0; i < ring_num; i++) { 510 510 - j = 0; 511 511 - sprintf(result[j++], "%u", i); 512 512 - sprintf(result[j++], "%u", ring->tx_copybreak); 513 513 - sprintf(result[j++], "%u", tx_spare->len); 514 514 - sprintf(result[j++], "%u", tx_spare->next_to_use); 515 515 - sprintf(result[j++], "%u", tx_spare->next_to_clean); 516 516 - sprintf(result[j++], "%u", tx_spare->last_to_clean); 517 517 - sprintf(result[j++], "%pad", &tx_spare->dma); 518 518 - hns3_dbg_fill_content(content, sizeof(content), 519 519 - tx_spare_info_items, 520 520 - (const char **)result, 521 521 - ARRAY_SIZE(tx_spare_info_items)); 522 522 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 523 523 - } 524 524 - } 525 525 - 526 526 - static const struct hns3_dbg_item rx_queue_info_items[] = { 527 527 - { "QUEUE_ID", 2 }, 528 528 - { "BD_NUM", 2 }, 529 529 - { "BD_LEN", 2 }, 530 530 - { "TAIL", 2 }, 531 531 - { "HEAD", 2 }, 532 532 - { "FBDNUM", 2 }, 533 533 - { "PKTNUM", 5 }, 534 534 - { "COPYBREAK", 2 }, 535 535 - { "RING_EN", 2 }, 536 536 - { "RX_RING_EN", 2 }, 537 537 - { "BASE_ADDR", 10 }, 538 538 - }; 539 539 - 540 556 static void hns3_dump_rx_queue_info(struct hns3_enet_ring *ring, 541 541 - struct hnae3_ae_dev *ae_dev, char **result, 542 542 - u32 index) 557 557 + struct seq_file *s, u32 index) 543 558 { 559 559 + struct hnae3_ae_dev *ae_dev = hnae3_seq_file_to_ae_dev(s); 560 560 + void __iomem *base = ring->tqp->io_base; 544 561 u32 base_add_l, base_add_h; 545 545 - u32 j = 0; 546 562 547 547 - sprintf(result[j++], "%u", index); 548 548 - 549 549 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 550 550 - HNS3_RING_RX_RING_BD_NUM_REG)); 551 551 - 552 552 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 553 553 - HNS3_RING_RX_RING_BD_LEN_REG)); 554 554 - 555 555 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 556 556 - HNS3_RING_RX_RING_TAIL_REG)); 557 557 - 558 558 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 559 559 - HNS3_RING_RX_RING_HEAD_REG)); 560 560 - 561 561 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 562 562 - HNS3_RING_RX_RING_FBDNUM_REG)); 563 563 - 564 564 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 565 565 - HNS3_RING_RX_RING_PKTNUM_RECORD_REG)); 566 566 - sprintf(result[j++], "%u", ring->rx_copybreak); 567 567 - 568 568 - sprintf(result[j++], "%s", 569 569 - str_on_off(readl_relaxed(ring->tqp->io_base + 570 570 - HNS3_RING_EN_REG))); 563 563 + seq_printf(s, "%-10u", index); 564 564 + seq_printf(s, "%-8u", 565 565 + readl_relaxed(base + HNS3_RING_RX_RING_BD_NUM_REG)); 566 566 + seq_printf(s, "%-8u", 567 567 + readl_relaxed(base + HNS3_RING_RX_RING_BD_LEN_REG)); 568 568 + seq_printf(s, "%-6u", 569 569 + readl_relaxed(base + HNS3_RING_RX_RING_TAIL_REG)); 570 570 + seq_printf(s, "%-6u", 571 571 + readl_relaxed(base + HNS3_RING_RX_RING_HEAD_REG)); 572 572 + seq_printf(s, "%-8u", 573 573 + readl_relaxed(base + HNS3_RING_RX_RING_FBDNUM_REG)); 574 574 + seq_printf(s, "%-11u", readl_relaxed(base + 575 575 + HNS3_RING_RX_RING_PKTNUM_RECORD_REG)); 576 576 + seq_printf(s, "%-11u", ring->rx_copybreak); 577 577 + seq_printf(s, "%-9s", 578 578 + str_on_off(readl_relaxed(base + HNS3_RING_EN_REG))); 571 579 572 580 if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev)) 573 573 - sprintf(result[j++], "%s", 574 574 - str_on_off(readl_relaxed(ring->tqp->io_base + 575 575 - HNS3_RING_RX_EN_REG))); 581 581 + seq_printf(s, "%-12s", str_on_off(readl_relaxed(base + 582 582 + HNS3_RING_RX_EN_REG))); 576 583 else 577 577 - sprintf(result[j++], "%s", "NA"); 584 584 + seq_printf(s, "%-12s", "NA"); 578 585 579 579 - base_add_h = readl_relaxed(ring->tqp->io_base + 580 580 - HNS3_RING_RX_RING_BASEADDR_H_REG); 581 581 - base_add_l = readl_relaxed(ring->tqp->io_base + 582 582 - HNS3_RING_RX_RING_BASEADDR_L_REG); 583 583 - sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l); 586 586 + base_add_h = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_H_REG); 587 587 + base_add_l = readl_relaxed(base + HNS3_RING_RX_RING_BASEADDR_L_REG); 588 588 + seq_printf(s, "0x%08x%08x\n", base_add_h, base_add_l); 584 589 } 585 590 586 586 - static int hns3_dbg_rx_queue_info(struct hnae3_handle *h, 587 587 - char *buf, int len) 591 591 + static int hns3_dbg_rx_queue_info(struct seq_file *s, void *data) 588 592 { 589 589 - char data_str[ARRAY_SIZE(rx_queue_info_items)][HNS3_DBG_DATA_STR_LEN]; 590 590 - struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h); 591 591 - char *result[ARRAY_SIZE(rx_queue_info_items)]; 593 593 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 592 594 struct hns3_nic_priv *priv = h->priv; 593 593 - char content[HNS3_DBG_INFO_LEN]; 594 595 struct hns3_enet_ring *ring; 595 595 - int pos = 0; 596 596 u32 i; 597 597 598 598 if (!priv->ring) { ··· 503 697 return -EFAULT; 504 698 } 505 699 506 506 - for (i = 0; i < ARRAY_SIZE(rx_queue_info_items); i++) 507 507 - result[i] = &data_str[i][0]; 700 700 + seq_puts(s, "QUEUE_ID BD_NUM BD_LEN TAIL HEAD FBDNUM "); 701 701 + seq_puts(s, "PKTNUM COPYBREAK RING_EN RX_RING_EN BASE_ADDR\n"); 508 702 509 509 - hns3_dbg_fill_content(content, sizeof(content), rx_queue_info_items, 510 510 - NULL, ARRAY_SIZE(rx_queue_info_items)); 511 511 - pos += scnprintf(buf + pos, len - pos, "%s", content); 512 703 for (i = 0; i < h->kinfo.num_tqps; i++) { 513 704 /* Each cycle needs to determine whether the instance is reset, 514 705 * to prevent reference to invalid memory. And need to ensure ··· 516 713 return -EPERM; 517 714 518 715 ring = &priv->ring[(u32)(i + h->kinfo.num_tqps)]; 519 519 - hns3_dump_rx_queue_info(ring, ae_dev, result, i); 520 520 - hns3_dbg_fill_content(content, sizeof(content), 521 521 - rx_queue_info_items, 522 522 - (const char **)result, 523 523 - ARRAY_SIZE(rx_queue_info_items)); 524 524 - pos += scnprintf(buf + pos, len - pos, "%s", content); 716 716 + hns3_dump_rx_queue_info(ring, s, i); 525 717 } 526 718 527 719 return 0; 528 720 } 529 721 530 530 - static const struct hns3_dbg_item tx_queue_info_items[] = { 531 531 - { "QUEUE_ID", 2 }, 532 532 - { "BD_NUM", 2 }, 533 533 - { "TC", 2 }, 534 534 - { "TAIL", 2 }, 535 535 - { "HEAD", 2 }, 536 536 - { "FBDNUM", 2 }, 537 537 - { "OFFSET", 2 }, 538 538 - { "PKTNUM", 5 }, 539 539 - { "RING_EN", 2 }, 540 540 - { "TX_RING_EN", 2 }, 541 541 - { "BASE_ADDR", 10 }, 542 542 - }; 543 543 - 544 722 static void hns3_dump_tx_queue_info(struct hns3_enet_ring *ring, 545 545 - struct hnae3_ae_dev *ae_dev, char **result, 546 546 - u32 index) 723 723 + struct seq_file *s, u32 index) 547 724 { 725 725 + struct hnae3_ae_dev *ae_dev = hnae3_seq_file_to_ae_dev(s); 726 726 + void __iomem *base = ring->tqp->io_base; 548 727 u32 base_add_l, base_add_h; 549 549 - u32 j = 0; 550 728 551 551 - sprintf(result[j++], "%u", index); 552 552 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 553 553 - HNS3_RING_TX_RING_BD_NUM_REG)); 554 554 - 555 555 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 556 556 - HNS3_RING_TX_RING_TC_REG)); 557 557 - 558 558 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 559 559 - HNS3_RING_TX_RING_TAIL_REG)); 560 560 - 561 561 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 562 562 - HNS3_RING_TX_RING_HEAD_REG)); 563 563 - 564 564 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 565 565 - HNS3_RING_TX_RING_FBDNUM_REG)); 566 566 - 567 567 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 568 568 - HNS3_RING_TX_RING_OFFSET_REG)); 569 569 - 570 570 - sprintf(result[j++], "%u", readl_relaxed(ring->tqp->io_base + 571 571 - HNS3_RING_TX_RING_PKTNUM_RECORD_REG)); 572 572 - 573 573 - sprintf(result[j++], "%s", 574 574 - str_on_off(readl_relaxed(ring->tqp->io_base + 575 575 - HNS3_RING_EN_REG))); 729 729 + seq_printf(s, "%-10u", index); 730 730 + seq_printf(s, "%-8u", 731 731 + readl_relaxed(base + HNS3_RING_TX_RING_BD_NUM_REG)); 732 732 + seq_printf(s, "%-4u", readl_relaxed(base + HNS3_RING_TX_RING_TC_REG)); 733 733 + seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_TAIL_REG)); 734 734 + seq_printf(s, "%-6u", readl_relaxed(base + HNS3_RING_TX_RING_HEAD_REG)); 735 735 + seq_printf(s, "%-8u", 736 736 + readl_relaxed(base + HNS3_RING_TX_RING_FBDNUM_REG)); 737 737 + seq_printf(s, "%-8u", 738 738 + readl_relaxed(base + HNS3_RING_TX_RING_OFFSET_REG)); 739 739 + seq_printf(s, "%-11u", 740 740 + readl_relaxed(base + HNS3_RING_TX_RING_PKTNUM_RECORD_REG)); 741 741 + seq_printf(s, "%-9s", 742 742 + str_on_off(readl_relaxed(base + HNS3_RING_EN_REG))); 576 743 577 744 if (hnae3_ae_dev_tqp_txrx_indep_supported(ae_dev)) 578 578 - sprintf(result[j++], "%s", 579 579 - str_on_off(readl_relaxed(ring->tqp->io_base + 580 580 - HNS3_RING_TX_EN_REG))); 745 745 + seq_printf(s, "%-12s", 746 746 + str_on_off(readl_relaxed(base + 747 747 + HNS3_RING_TX_EN_REG))); 581 748 else 582 582 - sprintf(result[j++], "%s", "NA"); 749 749 + seq_printf(s, "%-12s", "NA"); 583 750 584 584 - base_add_h = readl_relaxed(ring->tqp->io_base + 585 585 - HNS3_RING_TX_RING_BASEADDR_H_REG); 586 586 - base_add_l = readl_relaxed(ring->tqp->io_base + 587 587 - HNS3_RING_TX_RING_BASEADDR_L_REG); 588 588 - sprintf(result[j++], "0x%08x%08x", base_add_h, base_add_l); 751 751 + base_add_h = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_H_REG); 752 752 + base_add_l = readl_relaxed(base + HNS3_RING_TX_RING_BASEADDR_L_REG); 753 753 + seq_printf(s, "0x%08x%08x\n", base_add_h, base_add_l); 589 754 } 590 755 591 591 - static int hns3_dbg_tx_queue_info(struct hnae3_handle *h, 592 592 - char *buf, int len) 756 756 + static int hns3_dbg_tx_queue_info(struct seq_file *s, void *data) 593 757 { 594 594 - char data_str[ARRAY_SIZE(tx_queue_info_items)][HNS3_DBG_DATA_STR_LEN]; 595 595 - struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h); 596 596 - char *result[ARRAY_SIZE(tx_queue_info_items)]; 758 758 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 597 759 struct hns3_nic_priv *priv = h->priv; 598 598 - char content[HNS3_DBG_INFO_LEN]; 599 760 struct hns3_enet_ring *ring; 600 600 - int pos = 0; 601 761 u32 i; 602 762 603 763 if (!priv->ring) { ··· 568 802 return -EFAULT; 569 803 } 570 804 571 571 - for (i = 0; i < ARRAY_SIZE(tx_queue_info_items); i++) 572 572 - result[i] = &data_str[i][0]; 573 573 - 574 574 - hns3_dbg_fill_content(content, sizeof(content), tx_queue_info_items, 575 575 - NULL, ARRAY_SIZE(tx_queue_info_items)); 576 576 - pos += scnprintf(buf + pos, len - pos, "%s", content); 805 805 + seq_puts(s, "QUEUE_ID BD_NUM TC TAIL HEAD FBDNUM OFFSET "); 806 806 + seq_puts(s, "PKTNUM RING_EN TX_RING_EN BASE_ADDR\n"); 577 807 578 808 for (i = 0; i < h->kinfo.num_tqps; i++) { 579 809 /* Each cycle needs to determine whether the instance is reset, ··· 581 819 return -EPERM; 582 820 583 821 ring = &priv->ring[i]; 584 584 - hns3_dump_tx_queue_info(ring, ae_dev, result, i); 585 585 - hns3_dbg_fill_content(content, sizeof(content), 586 586 - tx_queue_info_items, 587 587 - (const char **)result, 588 588 - ARRAY_SIZE(tx_queue_info_items)); 589 589 - pos += scnprintf(buf + pos, len - pos, "%s", content); 822 822 + hns3_dump_tx_queue_info(ring, s, i); 590 823 } 591 591 - 592 592 - hns3_dbg_tx_spare_info(ring, buf, len, h->kinfo.num_tqps, &pos); 593 824 594 825 return 0; 595 826 } 596 827 597 597 - static const struct hns3_dbg_item queue_map_items[] = { 598 598 - { "local_queue_id", 2 }, 599 599 - { "global_queue_id", 2 }, 600 600 - { "vector_id", 2 }, 601 601 - }; 602 602 - 603 603 - static int hns3_dbg_queue_map(struct hnae3_handle *h, char *buf, int len) 828 828 + static int hns3_dbg_queue_map(struct seq_file *s, void *data) 604 829 { 605 605 - char data_str[ARRAY_SIZE(queue_map_items)][HNS3_DBG_DATA_STR_LEN]; 606 606 - char *result[ARRAY_SIZE(queue_map_items)]; 830 830 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 607 831 struct hns3_nic_priv *priv = h->priv; 608 608 - char content[HNS3_DBG_INFO_LEN]; 609 609 - int pos = 0; 610 610 - int j; 611 832 u32 i; 612 833 613 834 if (!h->ae_algo->ops->get_global_queue_id) 614 835 return -EOPNOTSUPP; 615 836 616 616 - for (i = 0; i < ARRAY_SIZE(queue_map_items); i++) 617 617 - result[i] = &data_str[i][0]; 837 837 + seq_puts(s, "local_queue_id global_queue_id vector_id\n"); 618 838 619 619 - hns3_dbg_fill_content(content, sizeof(content), queue_map_items, 620 620 - NULL, ARRAY_SIZE(queue_map_items)); 621 621 - pos += scnprintf(buf + pos, len - pos, "%s", content); 622 839 for (i = 0; i < h->kinfo.num_tqps; i++) { 623 840 if (!priv->ring || !priv->ring[i].tqp_vector) 624 841 continue; 625 625 - j = 0; 626 626 - sprintf(result[j++], "%u", i); 627 627 - sprintf(result[j++], "%u", 628 628 - h->ae_algo->ops->get_global_queue_id(h, i)); 629 629 - sprintf(result[j++], "%d", 630 630 - priv->ring[i].tqp_vector->vector_irq); 631 631 - hns3_dbg_fill_content(content, sizeof(content), queue_map_items, 632 632 - (const char **)result, 633 633 - ARRAY_SIZE(queue_map_items)); 634 634 - pos += scnprintf(buf + pos, len - pos, "%s", content); 842 842 + seq_printf(s, "%-16u%-17u%d\n", i, 843 843 + h->ae_algo->ops->get_global_queue_id(h, i), 844 844 + priv->ring[i].tqp_vector->vector_irq); 635 845 } 636 846 637 847 return 0; 638 848 } 639 849 640 640 - static const struct hns3_dbg_item rx_bd_info_items[] = { 641 641 - { "BD_IDX", 3 }, 642 642 - { "L234_INFO", 2 }, 643 643 - { "PKT_LEN", 3 }, 644 644 - { "SIZE", 4 }, 645 645 - { "RSS_HASH", 4 }, 646 646 - { "FD_ID", 2 }, 647 647 - { "VLAN_TAG", 2 }, 648 648 - { "O_DM_VLAN_ID_FB", 2 }, 649 649 - { "OT_VLAN_TAG", 2 }, 650 650 - { "BD_BASE_INFO", 2 }, 651 651 - { "PTYPE", 2 }, 652 652 - { "HW_CSUM", 2 }, 653 653 - }; 654 654 - 655 850 static void hns3_dump_rx_bd_info(struct hns3_nic_priv *priv, 656 656 - struct hns3_desc *desc, char **result, int idx) 851 851 + struct hns3_desc *desc, struct seq_file *s, 852 852 + int idx) 657 853 { 658 658 - unsigned int j = 0; 854 854 + seq_printf(s, "%-9d%#-11x%-10u%-8u%#-12x%-7u%-10u%-17u%-13u%#-14x", 855 855 + idx, le32_to_cpu(desc->rx.l234_info), 856 856 + le16_to_cpu(desc->rx.pkt_len), le16_to_cpu(desc->rx.size), 857 857 + le32_to_cpu(desc->rx.rss_hash), le16_to_cpu(desc->rx.fd_id), 858 858 + le16_to_cpu(desc->rx.vlan_tag), 859 859 + le16_to_cpu(desc->rx.o_dm_vlan_id_fb), 860 860 + le16_to_cpu(desc->rx.ot_vlan_tag), 861 861 + le32_to_cpu(desc->rx.bd_base_info)); 659 862 660 660 - sprintf(result[j++], "%d", idx); 661 661 - sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.l234_info)); 662 662 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.pkt_len)); 663 663 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.size)); 664 664 - sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.rss_hash)); 665 665 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.fd_id)); 666 666 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.vlan_tag)); 667 667 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.o_dm_vlan_id_fb)); 668 668 - sprintf(result[j++], "%u", le16_to_cpu(desc->rx.ot_vlan_tag)); 669 669 - sprintf(result[j++], "%#x", le32_to_cpu(desc->rx.bd_base_info)); 670 863 if (test_bit(HNS3_NIC_STATE_RXD_ADV_LAYOUT_ENABLE, &priv->state)) { 671 864 u32 ol_info = le32_to_cpu(desc->rx.ol_info); 672 865 673 673 - sprintf(result[j++], "%5lu", hnae3_get_field(ol_info, 674 674 - HNS3_RXD_PTYPE_M, 675 675 - HNS3_RXD_PTYPE_S)); 676 676 - sprintf(result[j++], "%7u", le16_to_cpu(desc->csum)); 866 866 + seq_printf(s, "%-7lu%-9u\n", 867 867 + hnae3_get_field(ol_info, HNS3_RXD_PTYPE_M, 868 868 + HNS3_RXD_PTYPE_S), 869 869 + le16_to_cpu(desc->csum)); 677 870 } else { 678 678 - sprintf(result[j++], "NA"); 679 679 - sprintf(result[j++], "NA"); 871 871 + seq_puts(s, "NA NA\n"); 680 872 } 681 873 } 682 874 683 683 - static int hns3_dbg_rx_bd_info(struct hns3_dbg_data *d, char *buf, int len) 875 875 + static int hns3_dbg_rx_bd_info(struct seq_file *s, void *private) 684 876 { 685 685 - char data_str[ARRAY_SIZE(rx_bd_info_items)][HNS3_DBG_DATA_STR_LEN]; 686 686 - struct hns3_nic_priv *priv = d->handle->priv; 687 687 - char *result[ARRAY_SIZE(rx_bd_info_items)]; 688 688 - char content[HNS3_DBG_INFO_LEN]; 877 877 + struct hns3_dbg_data *data = s->private; 878 878 + struct hnae3_handle *h = data->handle; 879 879 + struct hns3_nic_priv *priv = h->priv; 689 880 struct hns3_enet_ring *ring; 690 881 struct hns3_desc *desc; 691 882 unsigned int i; 692 692 - int pos = 0; 693 883 694 694 - if (d->qid >= d->handle->kinfo.num_tqps) { 695 695 - dev_err(&d->handle->pdev->dev, 696 696 - "queue%u is not in use\n", d->qid); 884 884 + if (data->qid >= h->kinfo.num_tqps) { 885 885 + dev_err(&h->pdev->dev, "queue%u is not in use\n", data->qid); 697 886 return -EINVAL; 698 887 } 699 888 700 700 - for (i = 0; i < ARRAY_SIZE(rx_bd_info_items); i++) 701 701 - result[i] = &data_str[i][0]; 889 889 + seq_printf(s, "Queue %u rx bd info:\n", data->qid); 890 890 + seq_puts(s, "BD_IDX L234_INFO PKT_LEN SIZE "); 891 891 + seq_puts(s, "RSS_HASH FD_ID VLAN_TAG O_DM_VLAN_ID_FB "); 892 892 + seq_puts(s, "OT_VLAN_TAG BD_BASE_INFO PTYPE HW_CSUM\n"); 702 893 703 703 - pos += scnprintf(buf + pos, len - pos, 704 704 - "Queue %u rx bd info:\n", d->qid); 705 705 - hns3_dbg_fill_content(content, sizeof(content), rx_bd_info_items, 706 706 - NULL, ARRAY_SIZE(rx_bd_info_items)); 707 707 - pos += scnprintf(buf + pos, len - pos, "%s", content); 708 708 - 709 709 - ring = &priv->ring[d->qid + d->handle->kinfo.num_tqps]; 894 894 + ring = &priv->ring[data->qid + data->handle->kinfo.num_tqps]; 710 895 for (i = 0; i < ring->desc_num; i++) { 711 896 desc = &ring->desc[i]; 712 897 713 713 - hns3_dump_rx_bd_info(priv, desc, result, i); 714 714 - hns3_dbg_fill_content(content, sizeof(content), 715 715 - rx_bd_info_items, (const char **)result, 716 716 - ARRAY_SIZE(rx_bd_info_items)); 717 717 - pos += scnprintf(buf + pos, len - pos, "%s", content); 898 898 + hns3_dump_rx_bd_info(priv, desc, s, i); 718 899 } 719 900 720 901 return 0; 721 902 } 722 903 723 723 - static const struct hns3_dbg_item tx_bd_info_items[] = { 724 724 - { "BD_IDX", 2 }, 725 725 - { "ADDRESS", 13 }, 726 726 - { "VLAN_TAG", 2 }, 727 727 - { "SIZE", 2 }, 728 728 - { "T_CS_VLAN_TSO", 2 }, 729 729 - { "OT_VLAN_TAG", 3 }, 730 730 - { "TV", 5 }, 731 731 - { "OLT_VLAN_LEN", 2 }, 732 732 - { "PAYLEN_OL4CS", 2 }, 733 733 - { "BD_FE_SC_VLD", 2 }, 734 734 - { "MSS_HW_CSUM", 0 }, 735 735 - }; 736 736 - 737 737 - static void hns3_dump_tx_bd_info(struct hns3_desc *desc, char **result, int idx) 904 904 + static void hns3_dump_tx_bd_info(struct hns3_desc *desc, struct seq_file *s, 905 905 + int idx) 738 906 { 739 739 - unsigned int j = 0; 740 740 - 741 741 - sprintf(result[j++], "%d", idx); 742 742 - sprintf(result[j++], "%#llx", le64_to_cpu(desc->addr)); 743 743 - sprintf(result[j++], "%u", le16_to_cpu(desc->tx.vlan_tag)); 744 744 - sprintf(result[j++], "%u", le16_to_cpu(desc->tx.send_size)); 745 745 - sprintf(result[j++], "%#x", 746 746 - le32_to_cpu(desc->tx.type_cs_vlan_tso_len)); 747 747 - sprintf(result[j++], "%u", le16_to_cpu(desc->tx.outer_vlan_tag)); 748 748 - sprintf(result[j++], "%u", le16_to_cpu(desc->tx.tv)); 749 749 - sprintf(result[j++], "%u", 750 750 - le32_to_cpu(desc->tx.ol_type_vlan_len_msec)); 751 751 - sprintf(result[j++], "%#x", le32_to_cpu(desc->tx.paylen_ol4cs)); 752 752 - sprintf(result[j++], "%#x", le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri)); 753 753 - sprintf(result[j++], "%u", le16_to_cpu(desc->tx.mss_hw_csum)); 907 907 + seq_printf(s, "%-8d%#-20llx%-10u%-6u%#-15x%-14u%-7u%-16u%#-14x%#-14x%-11u\n", 908 908 + idx, le64_to_cpu(desc->addr), 909 909 + le16_to_cpu(desc->tx.vlan_tag), 910 910 + le16_to_cpu(desc->tx.send_size), 911 911 + le32_to_cpu(desc->tx.type_cs_vlan_tso_len), 912 912 + le16_to_cpu(desc->tx.outer_vlan_tag), 913 913 + le16_to_cpu(desc->tx.tv), 914 914 + le32_to_cpu(desc->tx.ol_type_vlan_len_msec), 915 915 + le32_to_cpu(desc->tx.paylen_ol4cs), 916 916 + le16_to_cpu(desc->tx.bdtp_fe_sc_vld_ra_ri), 917 917 + le16_to_cpu(desc->tx.mss_hw_csum)); 754 918 } 755 919 756 756 - static int hns3_dbg_tx_bd_info(struct hns3_dbg_data *d, char *buf, int len) 920 920 + static int hns3_dbg_tx_bd_info(struct seq_file *s, void *private) 757 921 { 758 758 - char data_str[ARRAY_SIZE(tx_bd_info_items)][HNS3_DBG_DATA_STR_LEN]; 759 759 - struct hns3_nic_priv *priv = d->handle->priv; 760 760 - char *result[ARRAY_SIZE(tx_bd_info_items)]; 761 761 - char content[HNS3_DBG_INFO_LEN]; 922 922 + struct hns3_dbg_data *data = s->private; 923 923 + struct hnae3_handle *h = data->handle; 924 924 + struct hns3_nic_priv *priv = h->priv; 762 925 struct hns3_enet_ring *ring; 763 926 struct hns3_desc *desc; 764 927 unsigned int i; 765 765 - int pos = 0; 766 928 767 767 - if (d->qid >= d->handle->kinfo.num_tqps) { 768 768 - dev_err(&d->handle->pdev->dev, 769 769 - "queue%u is not in use\n", d->qid); 929 929 + if (data->qid >= h->kinfo.num_tqps) { 930 930 + dev_err(&h->pdev->dev, "queue%u is not in use\n", data->qid); 770 931 return -EINVAL; 771 932 } 772 933 773 773 - for (i = 0; i < ARRAY_SIZE(tx_bd_info_items); i++) 774 774 - result[i] = &data_str[i][0]; 934 934 + seq_printf(s, "Queue %u tx bd info:\n", data->qid); 935 935 + seq_puts(s, "BD_IDX ADDRESS VLAN_TAG SIZE "); 936 936 + seq_puts(s, "T_CS_VLAN_TSO OT_VLAN_TAG TV OLT_VLAN_LEN "); 937 937 + seq_puts(s, "PAYLEN_OL4CS BD_FE_SC_VLD MSS_HW_CSUM\n"); 775 938 776 776 - pos += scnprintf(buf + pos, len - pos, 777 777 - "Queue %u tx bd info:\n", d->qid); 778 778 - hns3_dbg_fill_content(content, sizeof(content), tx_bd_info_items, 779 779 - NULL, ARRAY_SIZE(tx_bd_info_items)); 780 780 - pos += scnprintf(buf + pos, len - pos, "%s", content); 781 781 - 782 782 - ring = &priv->ring[d->qid]; 939 939 + ring = &priv->ring[data->qid]; 783 940 for (i = 0; i < ring->desc_num; i++) { 784 941 desc = &ring->desc[i]; 785 942 786 786 - hns3_dump_tx_bd_info(desc, result, i); 787 787 - hns3_dbg_fill_content(content, sizeof(content), 788 788 - tx_bd_info_items, (const char **)result, 789 789 - ARRAY_SIZE(tx_bd_info_items)); 790 790 - pos += scnprintf(buf + pos, len - pos, "%s", content); 943 943 + hns3_dump_tx_bd_info(desc, s, i); 791 944 } 792 945 793 946 return 0; 794 947 } 795 948 796 796 - static void 797 797 - hns3_dbg_dev_caps(struct hnae3_handle *h, char *buf, int len, int *pos) 949 949 + static void hns3_dbg_dev_caps(struct hnae3_handle *h, struct seq_file *s) 798 950 { 799 951 struct hnae3_ae_dev *ae_dev = hns3_get_ae_dev(h); 800 952 unsigned long *caps = ae_dev->caps; 801 953 u32 i, state; 802 954 803 803 - *pos += scnprintf(buf + *pos, len - *pos, "dev capability:\n"); 955 955 + seq_puts(s, "dev capability:\n"); 804 956 805 957 for (i = 0; i < ARRAY_SIZE(hns3_dbg_cap); i++) { 806 958 state = test_bit(hns3_dbg_cap[i].cap_bit, caps); 807 807 - *pos += scnprintf(buf + *pos, len - *pos, "%s: %s\n", 808 808 - hns3_dbg_cap[i].name, str_yes_no(state)); 959 959 + seq_printf(s, "%s: %s\n", hns3_dbg_cap[i].name, 960 960 + str_yes_no(state)); 809 961 } 810 962 811 811 - *pos += scnprintf(buf + *pos, len - *pos, "\n"); 963 963 + seq_puts(s, "\n"); 812 964 } 813 965 814 814 - static void 815 815 - hns3_dbg_dev_specs(struct hnae3_handle *h, char *buf, int len, int *pos) 966 966 + static void hns3_dbg_dev_specs(struct hnae3_handle *h, struct seq_file *s) 816 967 { 817 968 struct hnae3_ae_dev *ae_dev = pci_get_drvdata(h->pdev); 818 969 struct hnae3_dev_specs *dev_specs = &ae_dev->dev_specs; 819 970 struct hnae3_knic_private_info *kinfo = &h->kinfo; 820 971 struct net_device *dev = kinfo->netdev; 821 972 822 822 - *pos += scnprintf(buf + *pos, len - *pos, "dev_spec:\n"); 823 823 - *pos += scnprintf(buf + *pos, len - *pos, "MAC entry num: %u\n", 824 824 - dev_specs->mac_entry_num); 825 825 - *pos += scnprintf(buf + *pos, len - *pos, "MNG entry num: %u\n", 826 826 - dev_specs->mng_entry_num); 827 827 - *pos += scnprintf(buf + *pos, len - *pos, "MAX non tso bd num: %u\n", 828 828 - dev_specs->max_non_tso_bd_num); 829 829 - *pos += scnprintf(buf + *pos, len - *pos, "RSS ind tbl size: %u\n", 830 830 - dev_specs->rss_ind_tbl_size); 831 831 - *pos += scnprintf(buf + *pos, len - *pos, "RSS key size: %u\n", 832 832 - dev_specs->rss_key_size); 833 833 - *pos += scnprintf(buf + *pos, len - *pos, "RSS size: %u\n", 834 834 - kinfo->rss_size); 835 835 - *pos += scnprintf(buf + *pos, len - *pos, "Allocated RSS size: %u\n", 836 836 - kinfo->req_rss_size); 837 837 - *pos += scnprintf(buf + *pos, len - *pos, 838 838 - "Task queue pairs numbers: %u\n", 839 839 - kinfo->num_tqps); 840 840 - *pos += scnprintf(buf + *pos, len - *pos, "RX buffer length: %u\n", 841 841 - kinfo->rx_buf_len); 842 842 - *pos += scnprintf(buf + *pos, len - *pos, "Desc num per TX queue: %u\n", 843 843 - kinfo->num_tx_desc); 844 844 - *pos += scnprintf(buf + *pos, len - *pos, "Desc num per RX queue: %u\n", 845 845 - kinfo->num_rx_desc); 846 846 - *pos += scnprintf(buf + *pos, len - *pos, 847 847 - "Total number of enabled TCs: %u\n", 848 848 - kinfo->tc_info.num_tc); 849 849 - *pos += scnprintf(buf + *pos, len - *pos, "MAX INT QL: %u\n", 850 850 - dev_specs->int_ql_max); 851 851 - *pos += scnprintf(buf + *pos, len - *pos, "MAX INT GL: %u\n", 852 852 - dev_specs->max_int_gl); 853 853 - *pos += scnprintf(buf + *pos, len - *pos, "MAX TM RATE: %u\n", 854 854 - dev_specs->max_tm_rate); 855 855 - *pos += scnprintf(buf + *pos, len - *pos, "MAX QSET number: %u\n", 856 856 - dev_specs->max_qset_num); 857 857 - *pos += scnprintf(buf + *pos, len - *pos, "umv size: %u\n", 858 858 - dev_specs->umv_size); 859 859 - *pos += scnprintf(buf + *pos, len - *pos, "mc mac size: %u\n", 860 860 - dev_specs->mc_mac_size); 861 861 - *pos += scnprintf(buf + *pos, len - *pos, "MAC statistics number: %u\n", 862 862 - dev_specs->mac_stats_num); 863 863 - *pos += scnprintf(buf + *pos, len - *pos, 864 864 - "TX timeout threshold: %d seconds\n", 865 865 - dev->watchdog_timeo / HZ); 866 866 - *pos += scnprintf(buf + *pos, len - *pos, "Hilink Version: %u\n", 867 867 - dev_specs->hilink_version); 973 973 + seq_puts(s, "dev_spec:\n"); 974 974 + seq_printf(s, "MAC entry num: %u\n", dev_specs->mac_entry_num); 975 975 + seq_printf(s, "MNG entry num: %u\n", dev_specs->mng_entry_num); 976 976 + seq_printf(s, "MAX non tso bd num: %u\n", 977 977 + dev_specs->max_non_tso_bd_num); 978 978 + seq_printf(s, "RSS ind tbl size: %u\n", dev_specs->rss_ind_tbl_size); 979 979 + seq_printf(s, "RSS key size: %u\n", dev_specs->rss_key_size); 980 980 + seq_printf(s, "RSS size: %u\n", kinfo->rss_size); 981 981 + seq_printf(s, "Allocated RSS size: %u\n", kinfo->req_rss_size); 982 982 + seq_printf(s, "Task queue pairs numbers: %u\n", kinfo->num_tqps); 983 983 + seq_printf(s, "RX buffer length: %u\n", kinfo->rx_buf_len); 984 984 + seq_printf(s, "Desc num per TX queue: %u\n", kinfo->num_tx_desc); 985 985 + seq_printf(s, "Desc num per RX queue: %u\n", kinfo->num_rx_desc); 986 986 + seq_printf(s, "Total number of enabled TCs: %u\n", 987 987 + kinfo->tc_info.num_tc); 988 988 + seq_printf(s, "MAX INT QL: %u\n", dev_specs->int_ql_max); 989 989 + seq_printf(s, "MAX INT GL: %u\n", dev_specs->max_int_gl); 990 990 + seq_printf(s, "MAX TM RATE: %u\n", dev_specs->max_tm_rate); 991 991 + seq_printf(s, "MAX QSET number: %u\n", dev_specs->max_qset_num); 992 992 + seq_printf(s, "umv size: %u\n", dev_specs->umv_size); 993 993 + seq_printf(s, "mc mac size: %u\n", dev_specs->mc_mac_size); 994 994 + seq_printf(s, "MAC statistics number: %u\n", dev_specs->mac_stats_num); 995 995 + seq_printf(s, "TX timeout threshold: %d seconds\n", 996 996 + dev->watchdog_timeo / HZ); 997 997 + seq_printf(s, "mac tunnel number: %u\n", dev_specs->tnl_num); 998 998 + seq_printf(s, "Hilink Version: %u\n", dev_specs->hilink_version); 868 999 } 869 1000 870 870 - static int hns3_dbg_dev_info(struct hnae3_handle *h, char *buf, int len) 1001 1001 + static int hns3_dbg_dev_info(struct seq_file *s, void *data) 871 1002 { 872 872 - int pos = 0; 1003 1003 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 873 1004 874 874 - hns3_dbg_dev_caps(h, buf, len, &pos); 875 875 - 876 876 - hns3_dbg_dev_specs(h, buf, len, &pos); 1005 1005 + hns3_dbg_dev_caps(h, s); 1006 1006 + hns3_dbg_dev_specs(h, s); 877 1007 878 1008 return 0; 879 1009 } 880 1010 881 881 - static const struct hns3_dbg_item page_pool_info_items[] = { 882 882 - { "QUEUE_ID", 2 }, 883 883 - { "ALLOCATE_CNT", 2 }, 884 884 - { "FREE_CNT", 6 }, 885 885 - { "POOL_SIZE(PAGE_NUM)", 2 }, 886 886 - { "ORDER", 2 }, 887 887 - { "NUMA_ID", 2 }, 888 888 - { "MAX_LEN", 2 }, 889 889 - }; 890 890 - 891 1011 static void hns3_dump_page_pool_info(struct hns3_enet_ring *ring, 892 892 - char **result, u32 index) 1012 1012 + struct seq_file *s, u32 index) 893 1013 { 894 894 - u32 j = 0; 895 895 - 896 896 - sprintf(result[j++], "%u", index); 897 897 - sprintf(result[j++], "%u", 898 898 - READ_ONCE(ring->page_pool->pages_state_hold_cnt)); 899 899 - sprintf(result[j++], "%d", 900 900 - atomic_read(&ring->page_pool->pages_state_release_cnt)); 901 901 - sprintf(result[j++], "%u", ring->page_pool->p.pool_size); 902 902 - sprintf(result[j++], "%u", ring->page_pool->p.order); 903 903 - sprintf(result[j++], "%d", ring->page_pool->p.nid); 904 904 - sprintf(result[j++], "%uK", ring->page_pool->p.max_len / 1024); 1014 1014 + seq_printf(s, "%-10u%-14u%-14d%-21u%-7u%-9d%uK\n", 1015 1015 + index, 1016 1016 + READ_ONCE(ring->page_pool->pages_state_hold_cnt), 1017 1017 + atomic_read(&ring->page_pool->pages_state_release_cnt), 1018 1018 + ring->page_pool->p.pool_size, 1019 1019 + ring->page_pool->p.order, 1020 1020 + ring->page_pool->p.nid, 1021 1021 + ring->page_pool->p.max_len / 1024); 905 1022 } 906 1023 907 907 - static int 908 908 - hns3_dbg_page_pool_info(struct hnae3_handle *h, char *buf, int len) 1024 1024 + static int hns3_dbg_page_pool_info(struct seq_file *s, void *data) 909 1025 { 910 910 - char data_str[ARRAY_SIZE(page_pool_info_items)][HNS3_DBG_DATA_STR_LEN]; 911 911 - char *result[ARRAY_SIZE(page_pool_info_items)]; 1026 1026 + struct hnae3_handle *h = hnae3_seq_file_to_handle(s); 912 1027 struct hns3_nic_priv *priv = h->priv; 913 913 - char content[HNS3_DBG_INFO_LEN]; 914 1028 struct hns3_enet_ring *ring; 915 915 - int pos = 0; 916 1029 u32 i; 917 1030 918 1031 if (!priv->ring) { ··· 800 1163 return -EFAULT; 801 1164 } 802 1165 803 803 - for (i = 0; i < ARRAY_SIZE(page_pool_info_items); i++) 804 804 - result[i] = &data_str[i][0]; 1166 1166 + seq_puts(s, "QUEUE_ID ALLOCATE_CNT FREE_CNT "); 1167 1167 + seq_puts(s, "POOL_SIZE(PAGE_NUM) ORDER NUMA_ID MAX_LEN\n"); 805 1168 806 806 - hns3_dbg_fill_content(content, sizeof(content), page_pool_info_items, 807 807 - NULL, ARRAY_SIZE(page_pool_info_items)); 808 808 - pos += scnprintf(buf + pos, len - pos, "%s", content); 809 1169 for (i = 0; i < h->kinfo.num_tqps; i++) { 810 1170 if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) || 811 1171 test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) 812 1172 return -EPERM; 1173 1173 + 813 1174 ring = &priv->ring[(u32)(i + h->kinfo.num_tqps)]; 814 814 - hns3_dump_page_pool_info(ring, result, i); 815 815 - hns3_dbg_fill_content(content, sizeof(content), 816 816 - page_pool_info_items, 817 817 - (const char **)result, 818 818 - ARRAY_SIZE(page_pool_info_items)); 819 819 - pos += scnprintf(buf + pos, len - pos, "%s", content); 1175 1175 + hns3_dump_page_pool_info(ring, s, i); 820 1176 } 821 1177 822 1178 return 0; 823 1179 } 824 1180 825 825 - static int hns3_dbg_get_cmd_index(struct hns3_dbg_data *dbg_data, u32 *index) 1181 1181 + static int hns3_dbg_bd_info_show(struct seq_file *s, void *private) 826 1182 { 827 827 - u32 i; 828 828 - 829 829 - for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd); i++) { 830 830 - if (hns3_dbg_cmd[i].cmd == dbg_data->cmd) { 831 831 - *index = i; 832 832 - return 0; 833 833 - } 834 834 - } 835 835 - 836 836 - dev_err(&dbg_data->handle->pdev->dev, "unknown command(%d)\n", 837 837 - dbg_data->cmd); 838 838 - return -EINVAL; 839 839 - } 840 840 - 841 841 - static const struct hns3_dbg_func hns3_dbg_cmd_func[] = { 842 842 - { 843 843 - .cmd = HNAE3_DBG_CMD_QUEUE_MAP, 844 844 - .dbg_dump = hns3_dbg_queue_map, 845 845 - }, 846 846 - { 847 847 - .cmd = HNAE3_DBG_CMD_DEV_INFO, 848 848 - .dbg_dump = hns3_dbg_dev_info, 849 849 - }, 850 850 - { 851 851 - .cmd = HNAE3_DBG_CMD_TX_BD, 852 852 - .dbg_dump_bd = hns3_dbg_tx_bd_info, 853 853 - }, 854 854 - { 855 855 - .cmd = HNAE3_DBG_CMD_RX_BD, 856 856 - .dbg_dump_bd = hns3_dbg_rx_bd_info, 857 857 - }, 858 858 - { 859 859 - .cmd = HNAE3_DBG_CMD_RX_QUEUE_INFO, 860 860 - .dbg_dump = hns3_dbg_rx_queue_info, 861 861 - }, 862 862 - { 863 863 - .cmd = HNAE3_DBG_CMD_TX_QUEUE_INFO, 864 864 - .dbg_dump = hns3_dbg_tx_queue_info, 865 865 - }, 866 866 - { 867 867 - .cmd = HNAE3_DBG_CMD_PAGE_POOL_INFO, 868 868 - .dbg_dump = hns3_dbg_page_pool_info, 869 869 - }, 870 870 - { 871 871 - .cmd = HNAE3_DBG_CMD_COAL_INFO, 872 872 - .dbg_dump = hns3_dbg_coal_info, 873 873 - }, 874 874 - }; 875 875 - 876 876 - static int hns3_dbg_read_cmd(struct hns3_dbg_data *dbg_data, 877 877 - enum hnae3_dbg_cmd cmd, char *buf, int len) 878 878 - { 879 879 - const struct hnae3_ae_ops *ops = hns3_get_ops(dbg_data->handle); 880 880 - const struct hns3_dbg_func *cmd_func; 881 881 - u32 i; 882 882 - 883 883 - for (i = 0; i < ARRAY_SIZE(hns3_dbg_cmd_func); i++) { 884 884 - if (cmd == hns3_dbg_cmd_func[i].cmd) { 885 885 - cmd_func = &hns3_dbg_cmd_func[i]; 886 886 - if (cmd_func->dbg_dump) 887 887 - return cmd_func->dbg_dump(dbg_data->handle, buf, 888 888 - len); 889 889 - else 890 890 - return cmd_func->dbg_dump_bd(dbg_data, buf, 891 891 - len); 892 892 - } 893 893 - } 894 894 - 895 895 - if (!ops->dbg_read_cmd) 896 896 - return -EOPNOTSUPP; 897 897 - 898 898 - return ops->dbg_read_cmd(dbg_data->handle, cmd, buf, len); 899 899 - } 900 900 - 901 901 - static ssize_t hns3_dbg_read(struct file *filp, char __user *buffer, 902 902 - size_t count, loff_t *ppos) 903 903 - { 904 904 - char *buf = filp->private_data; 905 905 - 906 906 - return simple_read_from_buffer(buffer, count, ppos, buf, strlen(buf)); 907 907 - } 908 908 - 909 909 - static int hns3_dbg_open(struct inode *inode, struct file *filp) 910 910 - { 911 911 - struct hns3_dbg_data *dbg_data = inode->i_private; 912 912 - struct hnae3_handle *handle = dbg_data->handle; 913 913 - struct hns3_nic_priv *priv = handle->priv; 914 914 - u32 index; 915 915 - char *buf; 916 916 - int ret; 1183 1183 + struct hns3_dbg_data *data = s->private; 1184 1184 + struct hnae3_handle *h = data->handle; 1185 1185 + struct hns3_nic_priv *priv = h->priv; 917 1186 918 1187 if (!test_bit(HNS3_NIC_STATE_INITED, &priv->state) || 919 1188 test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) 920 1189 return -EBUSY; 921 1190 922 922 - ret = hns3_dbg_get_cmd_index(dbg_data, &index); 923 923 - if (ret) 924 924 - return ret; 1191 1191 + if (data->cmd == HNAE3_DBG_CMD_TX_BD) 1192 1192 + return hns3_dbg_tx_bd_info(s, private); 1193 1193 + else if (data->cmd == HNAE3_DBG_CMD_RX_BD) 1194 1194 + return hns3_dbg_rx_bd_info(s, private); 925 1195 926 926 - buf = kvzalloc(hns3_dbg_cmd[index].buf_len, GFP_KERNEL); 927 927 - if (!buf) 928 928 - return -ENOMEM; 929 929 - 930 930 - ret = hns3_dbg_read_cmd(dbg_data, hns3_dbg_cmd[index].cmd, 931 931 - buf, hns3_dbg_cmd[index].buf_len); 932 932 - if (ret) { 933 933 - kvfree(buf); 934 934 - return ret; 935 935 - } 936 936 - 937 937 - filp->private_data = buf; 938 938 - return 0; 1196 1196 + return -EOPNOTSUPP; 939 1197 } 940 940 - 941 941 - static int hns3_dbg_release(struct inode *inode, struct file *filp) 942 942 - { 943 943 - kvfree(filp->private_data); 944 944 - filp->private_data = NULL; 945 945 - return 0; 946 946 - } 947 947 - 948 948 - static const struct file_operations hns3_dbg_fops = { 949 949 - .owner = THIS_MODULE, 950 950 - .open = hns3_dbg_open, 951 951 - .read = hns3_dbg_read, 952 952 - .release = hns3_dbg_release, 953 953 - }; 1198 1198 + DEFINE_SHOW_ATTRIBUTE(hns3_dbg_bd_info); 954 1199 955 1200 static int hns3_dbg_bd_file_init(struct hnae3_handle *handle, u32 cmd) 956 1201 { 957 957 - struct dentry *entry_dir; 958 1202 struct hns3_dbg_data *data; 1203 1203 + struct dentry *entry_dir; 959 1204 u16 max_queue_num; 960 1205 unsigned int i; 961 1206 ··· 856 1337 data[i].qid = i; 857 1338 sprintf(name, "%s%u", hns3_dbg_cmd[cmd].name, i); 858 1339 debugfs_create_file(name, 0400, entry_dir, &data[i], 859 859 - &hns3_dbg_fops); 1340 1340 + &hns3_dbg_bd_info_fops); 860 1341 } 861 1342 862 1343 return 0; 863 1344 } 864 1345 865 865 - static int 866 866 - hns3_dbg_common_file_init(struct hnae3_handle *handle, u32 cmd) 1346 1346 + static int hns3_dbg_common_init_t1(struct hnae3_handle *handle, u32 cmd) 867 1347 { 868 868 - struct hns3_dbg_data *data; 1348 1348 + struct device *dev = &handle->pdev->dev; 869 1349 struct dentry *entry_dir; 1350 1350 + read_func func = NULL; 870 1351 871 871 - data = devm_kzalloc(&handle->pdev->dev, sizeof(*data), GFP_KERNEL); 872 872 - if (!data) 873 873 - return -ENOMEM; 1352 1352 + switch (hns3_dbg_cmd[cmd].cmd) { 1353 1353 + case HNAE3_DBG_CMD_TX_QUEUE_INFO: 1354 1354 + func = hns3_dbg_tx_queue_info; 1355 1355 + break; 1356 1356 + case HNAE3_DBG_CMD_RX_QUEUE_INFO: 1357 1357 + func = hns3_dbg_rx_queue_info; 1358 1358 + break; 1359 1359 + case HNAE3_DBG_CMD_QUEUE_MAP: 1360 1360 + func = hns3_dbg_queue_map; 1361 1361 + break; 1362 1362 + case HNAE3_DBG_CMD_PAGE_POOL_INFO: 1363 1363 + func = hns3_dbg_page_pool_info; 1364 1364 + break; 1365 1365 + case HNAE3_DBG_CMD_COAL_INFO: 1366 1366 + func = hns3_dbg_coal_info; 1367 1367 + break; 1368 1368 + case HNAE3_DBG_CMD_DEV_INFO: 1369 1369 + func = hns3_dbg_dev_info; 1370 1370 + break; 1371 1371 + default: 1372 1372 + return -EINVAL; 1373 1373 + } 874 1374 875 875 - data->handle = handle; 876 876 - data->cmd = hns3_dbg_cmd[cmd].cmd; 877 1375 entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry; 878 878 - debugfs_create_file(hns3_dbg_cmd[cmd].name, 0400, entry_dir, 879 879 - data, &hns3_dbg_fops); 1376 1376 + debugfs_create_devm_seqfile(dev, hns3_dbg_cmd[cmd].name, entry_dir, 1377 1377 + func); 1378 1378 + 1379 1379 + return 0; 1380 1380 + } 1381 1381 + 1382 1382 + static int hns3_dbg_common_init_t2(struct hnae3_handle *handle, u32 cmd) 1383 1383 + { 1384 1384 + const struct hnae3_ae_ops *ops = hns3_get_ops(handle); 1385 1385 + struct device *dev = &handle->pdev->dev; 1386 1386 + struct dentry *entry_dir; 1387 1387 + read_func func; 1388 1388 + int ret; 1389 1389 + 1390 1390 + if (!ops->dbg_get_read_func) 1391 1391 + return 0; 1392 1392 + 1393 1393 + ret = ops->dbg_get_read_func(handle, hns3_dbg_cmd[cmd].cmd, &func); 1394 1394 + if (ret) 1395 1395 + return ret; 1396 1396 + 1397 1397 + entry_dir = hns3_dbg_dentry[hns3_dbg_cmd[cmd].dentry].dentry; 1398 1398 + debugfs_create_devm_seqfile(dev, hns3_dbg_cmd[cmd].name, entry_dir, 1399 1399 + func); 880 1400 881 1401 return 0; 882 1402 }

-16

drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.h

reviewed

··· 6 6 7 7 #include "hnae3.h" 8 8 9 9 - #define HNS3_DBG_READ_LEN 65536 10 10 - #define HNS3_DBG_READ_LEN_128KB 0x20000 11 11 - #define HNS3_DBG_READ_LEN_1MB 0x100000 12 12 - #define HNS3_DBG_READ_LEN_4MB 0x400000 13 13 - #define HNS3_DBG_READ_LEN_5MB 0x500000 14 14 - #define HNS3_DBG_WRITE_LEN 1024 15 15 - 16 16 - #define HNS3_DBG_DATA_STR_LEN 32 17 17 - #define HNS3_DBG_INFO_LEN 256 18 9 #define HNS3_DBG_ITEM_NAME_LEN 32 19 10 #define HNS3_DBG_FILE_NAME_LEN 16 20 11 ··· 40 49 const char *name; 41 50 enum hnae3_dbg_cmd cmd; 42 51 enum hns3_dbg_dentry_type dentry; 43 43 - u32 buf_len; 44 52 int (*init)(struct hnae3_handle *handle, unsigned int cmd); 45 45 - }; 46 46 - 47 47 - struct hns3_dbg_func { 48 48 - enum hnae3_dbg_cmd cmd; 49 49 - int (*dbg_dump)(struct hnae3_handle *handle, char *buf, int len); 50 50 - int (*dbg_dump_bd)(struct hns3_dbg_data *data, char *buf, int len); 51 53 }; 52 54 53 55 struct hns3_dbg_cap_info {

+2

drivers/net/ethernet/hisilicon/hns3/hns3_enet.c

reviewed

··· 5299 5299 struct net_device *netdev; 5300 5300 int ret; 5301 5301 5302 5302 + ae_dev->handle = handle; 5303 5303 + 5302 5304 handle->ae_algo->ops->get_tqps_and_rss_info(handle, &alloc_tqps, 5303 5305 &max_rss_size); 5304 5306 netdev = alloc_etherdev_mq(sizeof(struct hns3_nic_priv), alloc_tqps);

+545 -821

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

reviewed

··· 12 12 #include "hclge_tm.h" 13 13 #include "hnae3.h" 14 14 15 15 + #define hclge_seq_file_to_hdev(s) \ 16 16 + (((struct hnae3_ae_dev *)hnae3_seq_file_to_ae_dev(s))->priv) 17 17 + 15 18 static const char * const hclge_mac_state_str[] = { 16 19 "TO_ADD", "TO_DEL", "ACTIVE" 17 20 }; ··· 724 721 .cmd = HCLGE_OPC_DFX_TQP_REG } }, 725 722 }; 726 723 727 727 - /* make sure: len(name) + interval >= maxlen(item data) + 2, 728 728 - * for example, name = "pkt_num"(len: 7), the prototype of item data is u32, 729 729 - * and print as "%u"(maxlen: 10), so the interval should be at least 5. 730 730 - */ 731 731 - static void hclge_dbg_fill_content(char *content, u16 len, 732 732 - const struct hclge_dbg_item *items, 733 733 - const char **result, u16 size) 734 734 - { 735 735 - #define HCLGE_DBG_LINE_END_LEN 2 736 736 - char *pos = content; 737 737 - u16 item_len; 738 738 - u16 i; 739 739 - 740 740 - if (!len) { 741 741 - return; 742 742 - } else if (len <= HCLGE_DBG_LINE_END_LEN) { 743 743 - *pos++ = '\0'; 744 744 - return; 745 745 - } 746 746 - 747 747 - memset(content, ' ', len); 748 748 - len -= HCLGE_DBG_LINE_END_LEN; 749 749 - 750 750 - for (i = 0; i < size; i++) { 751 751 - item_len = strlen(items[i].name) + items[i].interval; 752 752 - if (len < item_len) 753 753 - break; 754 754 - 755 755 - if (result) { 756 756 - if (item_len < strlen(result[i])) 757 757 - break; 758 758 - memcpy(pos, result[i], strlen(result[i])); 759 759 - } else { 760 760 - memcpy(pos, items[i].name, strlen(items[i].name)); 761 761 - } 762 762 - pos += item_len; 763 763 - len -= item_len; 764 764 - } 765 765 - *pos++ = '\n'; 766 766 - *pos++ = '\0'; 767 767 - } 768 768 - 769 724 static char *hclge_dbg_get_func_id_str(char *buf, u8 id) 770 725 { 771 726 if (id) ··· 787 826 static int 788 827 hclge_dbg_dump_reg_tqp(struct hclge_dev *hdev, 789 828 const struct hclge_dbg_reg_type_info *reg_info, 790 790 - char *buf, int len, int *pos) 829 829 + struct seq_file *s) 791 830 { 792 831 const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; 793 832 const struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg; ··· 807 846 min_num = min_t(int, bd_num * HCLGE_DESC_DATA_LEN, reg_msg->msg_num); 808 847 809 848 for (i = 0, cnt = 0; i < min_num; i++, dfx_message++) 810 810 - *pos += scnprintf(buf + *pos, len - *pos, "item%u = %s\n", 811 811 - cnt++, dfx_message->message); 849 849 + seq_printf(s, "item%u = %s\n", cnt++, dfx_message->message); 812 850 813 851 for (i = 0; i < cnt; i++) 814 814 - *pos += scnprintf(buf + *pos, len - *pos, "item%u\t", i); 852 852 + seq_printf(s, "item%u\t", i); 815 853 816 816 - *pos += scnprintf(buf + *pos, len - *pos, "\n"); 854 854 + seq_puts(s, "\n"); 817 855 818 856 for (index = 0; index < hdev->vport[0].alloc_tqps; index++) { 819 857 dfx_message = reg_info->dfx_msg; ··· 827 867 if (i > 0 && !entry) 828 868 desc++; 829 869 830 830 - *pos += scnprintf(buf + *pos, len - *pos, "%#x\t", 831 831 - le32_to_cpu(desc->data[entry])); 870 870 + seq_printf(s, "%#x\t", le32_to_cpu(desc->data[entry])); 832 871 } 833 833 - *pos += scnprintf(buf + *pos, len - *pos, "\n"); 872 872 + seq_puts(s, "\n"); 834 873 } 835 874 836 875 kfree(desc_src); ··· 839 880 static int 840 881 hclge_dbg_dump_reg_common(struct hclge_dev *hdev, 841 882 const struct hclge_dbg_reg_type_info *reg_info, 842 842 - char *buf, int len, int *pos) 883 883 + struct seq_file *s) 843 884 { 844 885 const struct hclge_dbg_reg_common_msg *reg_msg = &reg_info->reg_msg; 845 886 const struct hclge_dbg_dfx_message *dfx_message = reg_info->dfx_msg; ··· 873 914 if (!dfx_message->flag) 874 915 continue; 875 916 876 876 - *pos += scnprintf(buf + *pos, len - *pos, "%s: %#x\n", 877 877 - dfx_message->message, 878 878 - le32_to_cpu(desc->data[entry])); 917 917 + seq_printf(s, "%s: %#x\n", dfx_message->message, 918 918 + le32_to_cpu(desc->data[entry])); 879 919 } 880 920 881 921 kfree(desc_src); ··· 898 940 {HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B, "mac_tx_oversize_truncate_en"} 899 941 }; 900 942 901 901 - static int hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev, char *buf, 902 902 - int len, int *pos) 943 943 + static int hclge_dbg_dump_mac_enable_status(struct hclge_dev *hdev, 944 944 + struct seq_file *s) 903 945 { 904 946 struct hclge_config_mac_mode_cmd *req; 905 947 struct hclge_desc desc; ··· 920 962 921 963 for (i = 0; i < ARRAY_SIZE(hclge_dbg_mac_en_status); i++) { 922 964 offset = hclge_dbg_mac_en_status[i].offset; 923 923 - *pos += scnprintf(buf + *pos, len - *pos, "%s: %#x\n", 924 924 - hclge_dbg_mac_en_status[i].message, 925 925 - hnae3_get_bit(loop_en, offset)); 965 965 + seq_printf(s, "%s: %#x\n", hclge_dbg_mac_en_status[i].message, 966 966 + hnae3_get_bit(loop_en, offset)); 926 967 } 927 968 928 969 return 0; 929 970 } 930 971 931 931 - static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev, char *buf, 932 932 - int len, int *pos) 972 972 + static int hclge_dbg_dump_mac_frame_size(struct hclge_dev *hdev, 973 973 + struct seq_file *s) 933 974 { 934 975 struct hclge_config_max_frm_size_cmd *req; 935 976 struct hclge_desc desc; ··· 945 988 946 989 req = (struct hclge_config_max_frm_size_cmd *)desc.data; 947 990 948 948 - *pos += scnprintf(buf + *pos, len - *pos, "max_frame_size: %u\n", 949 949 - le16_to_cpu(req->max_frm_size)); 950 950 - *pos += scnprintf(buf + *pos, len - *pos, "min_frame_size: %u\n", 951 951 - req->min_frm_size); 991 991 + seq_printf(s, "max_frame_size: %u\n", le16_to_cpu(req->max_frm_size)); 992 992 + seq_printf(s, "min_frame_size: %u\n", req->min_frm_size); 952 993 953 994 return 0; 954 995 } 955 996 956 956 - static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev, char *buf, 957 957 - int len, int *pos) 997 997 + static int hclge_dbg_dump_mac_speed_duplex(struct hclge_dev *hdev, 998 998 + struct seq_file *s) 958 999 { 959 1000 #define HCLGE_MAC_SPEED_SHIFT 0 960 1001 #define HCLGE_MAC_SPEED_MASK GENMASK(5, 0) ··· 973 1018 974 1019 req = (struct hclge_config_mac_speed_dup_cmd *)desc.data; 975 1020 976 976 - *pos += scnprintf(buf + *pos, len - *pos, "speed: %#lx\n", 977 977 - hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK, 978 978 - HCLGE_MAC_SPEED_SHIFT)); 979 979 - *pos += scnprintf(buf + *pos, len - *pos, "duplex: %#x\n", 980 980 - hnae3_get_bit(req->speed_dup, 981 981 - HCLGE_MAC_DUPLEX_SHIFT)); 1021 1021 + seq_printf(s, "speed: %#lx\n", 1022 1022 + hnae3_get_field(req->speed_dup, HCLGE_MAC_SPEED_MASK, 1023 1023 + HCLGE_MAC_SPEED_SHIFT)); 1024 1024 + seq_printf(s, "duplex: %#x\n", 1025 1025 + hnae3_get_bit(req->speed_dup, HCLGE_MAC_DUPLEX_SHIFT)); 982 1026 return 0; 983 1027 } 984 1028 985 985 - static int hclge_dbg_dump_mac(struct hclge_dev *hdev, char *buf, int len) 1029 1029 + static int hclge_dbg_dump_mac(struct seq_file *s, void *data) 986 1030 { 987 987 - int pos = 0; 1031 1031 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 988 1032 int ret; 989 1033 990 990 - ret = hclge_dbg_dump_mac_enable_status(hdev, buf, len, &pos); 1034 1034 + ret = hclge_dbg_dump_mac_enable_status(hdev, s); 991 1035 if (ret) 992 1036 return ret; 993 1037 994 994 - ret = hclge_dbg_dump_mac_frame_size(hdev, buf, len, &pos); 1038 1038 + ret = hclge_dbg_dump_mac_frame_size(hdev, s); 995 1039 if (ret) 996 1040 return ret; 997 1041 998 998 - return hclge_dbg_dump_mac_speed_duplex(hdev, buf, len, &pos); 1042 1042 + return hclge_dbg_dump_mac_speed_duplex(hdev, s); 999 1043 } 1000 1044 1001 1001 - static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, char *buf, int len, 1002 1002 - int *pos) 1045 1045 + static int hclge_dbg_dump_dcb_qset(struct hclge_dev *hdev, struct seq_file *s) 1003 1046 { 1004 1047 struct hclge_dbg_bitmap_cmd req; 1005 1048 struct hclge_desc desc; ··· 1008 1055 if (ret) 1009 1056 return ret; 1010 1057 1011 1011 - *pos += scnprintf(buf + *pos, len - *pos, 1012 1012 - "qset_id roce_qset_mask nic_qset_mask qset_shaping_pass qset_bp_status\n"); 1058 1058 + seq_puts(s, "qset_id roce_qset_mask nic_qset_mask "); 1059 1059 + seq_puts(s, "qset_shaping_pass qset_bp_status\n"); 1013 1060 for (qset_id = 0; qset_id < qset_num; qset_id++) { 1014 1061 ret = hclge_dbg_cmd_send(hdev, &desc, qset_id, 1, 1015 1062 HCLGE_OPC_QSET_DFX_STS); ··· 1018 1065 1019 1066 req.bitmap = (u8)le32_to_cpu(desc.data[1]); 1020 1067 1021 1021 - *pos += scnprintf(buf + *pos, len - *pos, 1022 1022 - "%04u %#x %#x %#x %#x\n", 1023 1023 - qset_id, req.bit0, req.bit1, req.bit2, 1024 1024 - req.bit3); 1068 1068 + seq_printf(s, "%04u %#-16x%#-15x%#-19x%#-x\n", 1069 1069 + qset_id, req.bit0, req.bit1, req.bit2, req.bit3); 1025 1070 } 1026 1071 1027 1072 return 0; 1028 1073 } 1029 1074 1030 1030 - static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, char *buf, int len, 1031 1031 - int *pos) 1075 1075 + static int hclge_dbg_dump_dcb_pri(struct hclge_dev *hdev, struct seq_file *s) 1032 1076 { 1033 1077 struct hclge_dbg_bitmap_cmd req; 1034 1078 struct hclge_desc desc; ··· 1036 1086 if (ret) 1037 1087 return ret; 1038 1088 1039 1039 - *pos += scnprintf(buf + *pos, len - *pos, 1040 1040 - "pri_id pri_mask pri_cshaping_pass pri_pshaping_pass\n"); 1089 1089 + seq_puts(s, "pri_id pri_mask pri_cshaping_pass pri_pshaping_pass\n"); 1041 1090 for (pri_id = 0; pri_id < pri_num; pri_id++) { 1042 1091 ret = hclge_dbg_cmd_send(hdev, &desc, pri_id, 1, 1043 1092 HCLGE_OPC_PRI_DFX_STS); ··· 1045 1096 1046 1097 req.bitmap = (u8)le32_to_cpu(desc.data[1]); 1047 1098 1048 1048 - *pos += scnprintf(buf + *pos, len - *pos, 1049 1049 - "%03u %#x %#x %#x\n", 1050 1050 - pri_id, req.bit0, req.bit1, req.bit2); 1099 1099 + seq_printf(s, "%03u %#-10x%#-19x%#-x\n", 1100 1100 + pri_id, req.bit0, req.bit1, req.bit2); 1051 1101 } 1052 1102 1053 1103 return 0; 1054 1104 } 1055 1105 1056 1056 - static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, char *buf, int len, 1057 1057 - int *pos) 1106 1106 + static int hclge_dbg_dump_dcb_pg(struct hclge_dev *hdev, struct seq_file *s) 1058 1107 { 1059 1108 struct hclge_dbg_bitmap_cmd req; 1060 1109 struct hclge_desc desc; 1061 1110 u8 pg_id; 1062 1111 int ret; 1063 1112 1064 1064 - *pos += scnprintf(buf + *pos, len - *pos, 1065 1065 - "pg_id pg_mask pg_cshaping_pass pg_pshaping_pass\n"); 1113 1113 + seq_puts(s, "pg_id pg_mask pg_cshaping_pass pg_pshaping_pass\n"); 1066 1114 for (pg_id = 0; pg_id < hdev->tm_info.num_pg; pg_id++) { 1067 1115 ret = hclge_dbg_cmd_send(hdev, &desc, pg_id, 1, 1068 1116 HCLGE_OPC_PG_DFX_STS); ··· 1068 1122 1069 1123 req.bitmap = (u8)le32_to_cpu(desc.data[1]); 1070 1124 1071 1071 - *pos += scnprintf(buf + *pos, len - *pos, 1072 1072 - "%03u %#x %#x %#x\n", 1073 1073 - pg_id, req.bit0, req.bit1, req.bit2); 1125 1125 + seq_printf(s, "%03u %#-9x%#-18x%#-x\n", 1126 1126 + pg_id, req.bit0, req.bit1, req.bit2); 1074 1127 } 1075 1128 1076 1129 return 0; 1077 1130 } 1078 1131 1079 1079 - static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, char *buf, int len, 1080 1080 - int *pos) 1132 1132 + static int hclge_dbg_dump_dcb_queue(struct hclge_dev *hdev, struct seq_file *s) 1081 1133 { 1082 1134 struct hclge_desc desc; 1083 1135 u16 nq_id; 1084 1136 int ret; 1085 1137 1086 1086 - *pos += scnprintf(buf + *pos, len - *pos, 1087 1087 - "nq_id sch_nic_queue_cnt sch_roce_queue_cnt\n"); 1138 1138 + seq_puts(s, "nq_id sch_nic_queue_cnt sch_roce_queue_cnt\n"); 1088 1139 for (nq_id = 0; nq_id < hdev->num_tqps; nq_id++) { 1089 1140 ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1, 1090 1141 HCLGE_OPC_SCH_NQ_CNT); 1091 1142 if (ret) 1092 1143 return ret; 1093 1144 1094 1094 - *pos += scnprintf(buf + *pos, len - *pos, "%04u %#x", 1095 1095 - nq_id, le32_to_cpu(desc.data[1])); 1145 1145 + seq_printf(s, "%04u %#-19x", 1146 1146 + nq_id, le32_to_cpu(desc.data[1])); 1096 1147 1097 1148 ret = hclge_dbg_cmd_send(hdev, &desc, nq_id, 1, 1098 1149 HCLGE_OPC_SCH_RQ_CNT); 1099 1150 if (ret) 1100 1151 return ret; 1101 1152 1102 1102 - *pos += scnprintf(buf + *pos, len - *pos, 1103 1103 - " %#x\n", 1104 1104 - le32_to_cpu(desc.data[1])); 1153 1153 + seq_printf(s, "%#-x\n", le32_to_cpu(desc.data[1])); 1105 1154 } 1106 1155 1107 1156 return 0; 1108 1157 } 1109 1158 1110 1110 - static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, char *buf, int len, 1111 1111 - int *pos) 1159 1159 + static int hclge_dbg_dump_dcb_port(struct hclge_dev *hdev, struct seq_file *s) 1112 1160 { 1113 1161 struct hclge_dbg_bitmap_cmd req; 1114 1162 struct hclge_desc desc; ··· 1116 1176 1117 1177 req.bitmap = (u8)le32_to_cpu(desc.data[1]); 1118 1178 1119 1119 - *pos += scnprintf(buf + *pos, len - *pos, "port_mask: %#x\n", 1120 1120 - req.bit0); 1121 1121 - *pos += scnprintf(buf + *pos, len - *pos, "port_shaping_pass: %#x\n", 1122 1122 - req.bit1); 1179 1179 + seq_printf(s, "port_mask: %#x\n", req.bit0); 1180 1180 + seq_printf(s, "port_shaping_pass: %#x\n", req.bit1); 1123 1181 1124 1182 return 0; 1125 1183 } 1126 1184 1127 1127 - static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, char *buf, int len, 1128 1128 - int *pos) 1185 1185 + static int hclge_dbg_dump_dcb_tm(struct hclge_dev *hdev, struct seq_file *s) 1129 1186 { 1130 1187 struct hclge_desc desc[2]; 1131 1188 u8 port_id = 0; ··· 1133 1196 if (ret) 1134 1197 return ret; 1135 1198 1136 1136 - *pos += scnprintf(buf + *pos, len - *pos, "SCH_NIC_NUM: %#x\n", 1137 1137 - le32_to_cpu(desc[0].data[1])); 1138 1138 - *pos += scnprintf(buf + *pos, len - *pos, "SCH_ROCE_NUM: %#x\n", 1139 1139 - le32_to_cpu(desc[0].data[2])); 1199 1199 + seq_printf(s, "SCH_NIC_NUM: %#x\n", le32_to_cpu(desc[0].data[1])); 1200 1200 + seq_printf(s, "SCH_ROCE_NUM: %#x\n", le32_to_cpu(desc[0].data[2])); 1140 1201 1141 1202 ret = hclge_dbg_cmd_send(hdev, desc, port_id, 2, 1142 1203 HCLGE_OPC_TM_INTERNAL_STS); 1143 1204 if (ret) 1144 1205 return ret; 1145 1206 1146 1146 - *pos += scnprintf(buf + *pos, len - *pos, "pri_bp: %#x\n", 1147 1147 - le32_to_cpu(desc[0].data[1])); 1148 1148 - *pos += scnprintf(buf + *pos, len - *pos, "fifo_dfx_info: %#x\n", 1149 1149 - le32_to_cpu(desc[0].data[2])); 1150 1150 - *pos += scnprintf(buf + *pos, len - *pos, 1151 1151 - "sch_roce_fifo_afull_gap: %#x\n", 1152 1152 - le32_to_cpu(desc[0].data[3])); 1153 1153 - *pos += scnprintf(buf + *pos, len - *pos, 1154 1154 - "tx_private_waterline: %#x\n", 1155 1155 - le32_to_cpu(desc[0].data[4])); 1156 1156 - *pos += scnprintf(buf + *pos, len - *pos, "tm_bypass_en: %#x\n", 1157 1157 - le32_to_cpu(desc[0].data[5])); 1158 1158 - *pos += scnprintf(buf + *pos, len - *pos, "SSU_TM_BYPASS_EN: %#x\n", 1159 1159 - le32_to_cpu(desc[1].data[0])); 1160 1160 - *pos += scnprintf(buf + *pos, len - *pos, "SSU_RESERVE_CFG: %#x\n", 1161 1161 - le32_to_cpu(desc[1].data[1])); 1207 1207 + seq_printf(s, "pri_bp: %#x\n", le32_to_cpu(desc[0].data[1])); 1208 1208 + seq_printf(s, "fifo_dfx_info: %#x\n", le32_to_cpu(desc[0].data[2])); 1209 1209 + seq_printf(s, "sch_roce_fifo_afull_gap: %#x\n", 1210 1210 + le32_to_cpu(desc[0].data[3])); 1211 1211 + seq_printf(s, "tx_private_waterline: %#x\n", 1212 1212 + le32_to_cpu(desc[0].data[4])); 1213 1213 + seq_printf(s, "tm_bypass_en: %#x\n", le32_to_cpu(desc[0].data[5])); 1214 1214 + seq_printf(s, "SSU_TM_BYPASS_EN: %#x\n", le32_to_cpu(desc[1].data[0])); 1215 1215 + seq_printf(s, "SSU_RESERVE_CFG: %#x\n", le32_to_cpu(desc[1].data[1])); 1162 1216 1163 1217 if (hdev->hw.mac.media_type == HNAE3_MEDIA_TYPE_COPPER) 1164 1218 return 0; ··· 1159 1231 if (ret) 1160 1232 return ret; 1161 1233 1162 1162 - *pos += scnprintf(buf + *pos, len - *pos, "TC_MAP_SEL: %#x\n", 1163 1163 - le32_to_cpu(desc[0].data[1])); 1164 1164 - *pos += scnprintf(buf + *pos, len - *pos, "IGU_PFC_PRI_EN: %#x\n", 1165 1165 - le32_to_cpu(desc[0].data[2])); 1166 1166 - *pos += scnprintf(buf + *pos, len - *pos, "MAC_PFC_PRI_EN: %#x\n", 1167 1167 - le32_to_cpu(desc[0].data[3])); 1168 1168 - *pos += scnprintf(buf + *pos, len - *pos, "IGU_PRI_MAP_TC_CFG: %#x\n", 1169 1169 - le32_to_cpu(desc[0].data[4])); 1170 1170 - *pos += scnprintf(buf + *pos, len - *pos, 1171 1171 - "IGU_TX_PRI_MAP_TC_CFG: %#x\n", 1172 1172 - le32_to_cpu(desc[0].data[5])); 1234 1234 + seq_printf(s, "TC_MAP_SEL: %#x\n", le32_to_cpu(desc[0].data[1])); 1235 1235 + seq_printf(s, "IGU_PFC_PRI_EN: %#x\n", le32_to_cpu(desc[0].data[2])); 1236 1236 + seq_printf(s, "MAC_PFC_PRI_EN: %#x\n", le32_to_cpu(desc[0].data[3])); 1237 1237 + seq_printf(s, "IGU_PRI_MAP_TC_CFG: %#x\n", 1238 1238 + le32_to_cpu(desc[0].data[4])); 1239 1239 + seq_printf(s, "IGU_TX_PRI_MAP_TC_CFG: %#x\n", 1240 1240 + le32_to_cpu(desc[0].data[5])); 1173 1241 1174 1242 return 0; 1175 1243 } 1176 1244 1177 1177 - static int hclge_dbg_dump_dcb(struct hclge_dev *hdev, char *buf, int len) 1245 1245 + static int hclge_dbg_dump_dcb(struct seq_file *s, void *data) 1178 1246 { 1179 1179 - int pos = 0; 1247 1247 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1180 1248 int ret; 1181 1249 1182 1182 - ret = hclge_dbg_dump_dcb_qset(hdev, buf, len, &pos); 1250 1250 + ret = hclge_dbg_dump_dcb_qset(hdev, s); 1183 1251 if (ret) 1184 1252 return ret; 1185 1253 1186 1186 - ret = hclge_dbg_dump_dcb_pri(hdev, buf, len, &pos); 1254 1254 + ret = hclge_dbg_dump_dcb_pri(hdev, s); 1187 1255 if (ret) 1188 1256 return ret; 1189 1257 1190 1190 - ret = hclge_dbg_dump_dcb_pg(hdev, buf, len, &pos); 1258 1258 + ret = hclge_dbg_dump_dcb_pg(hdev, s); 1191 1259 if (ret) 1192 1260 return ret; 1193 1261 1194 1194 - ret = hclge_dbg_dump_dcb_queue(hdev, buf, len, &pos); 1262 1262 + ret = hclge_dbg_dump_dcb_queue(hdev, s); 1195 1263 if (ret) 1196 1264 return ret; 1197 1265 1198 1198 - ret = hclge_dbg_dump_dcb_port(hdev, buf, len, &pos); 1266 1266 + ret = hclge_dbg_dump_dcb_port(hdev, s); 1199 1267 if (ret) 1200 1268 return ret; 1201 1269 1202 1202 - return hclge_dbg_dump_dcb_tm(hdev, buf, len, &pos); 1270 1270 + return hclge_dbg_dump_dcb_tm(hdev, s); 1203 1271 } 1204 1272 1205 1205 - static int hclge_dbg_dump_reg_cmd(struct hclge_dev *hdev, 1206 1206 - enum hnae3_dbg_cmd cmd, char *buf, int len) 1273 1273 + static int hclge_dbg_dump_reg_cmd(enum hnae3_dbg_cmd cmd, struct seq_file *s) 1207 1274 { 1275 1275 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1208 1276 const struct hclge_dbg_reg_type_info *reg_info; 1209 1209 - int pos = 0, ret = 0; 1277 1277 + int ret = 0; 1210 1278 u32 i; 1211 1279 1212 1280 for (i = 0; i < ARRAY_SIZE(hclge_dbg_reg_info); i++) { 1213 1281 reg_info = &hclge_dbg_reg_info[i]; 1214 1282 if (cmd == reg_info->cmd) { 1215 1283 if (cmd == HNAE3_DBG_CMD_REG_TQP) 1216 1216 - return hclge_dbg_dump_reg_tqp(hdev, reg_info, 1217 1217 - buf, len, &pos); 1284 1284 + return hclge_dbg_dump_reg_tqp(hdev, 1285 1285 + reg_info, s); 1218 1286 1219 1219 - ret = hclge_dbg_dump_reg_common(hdev, reg_info, buf, 1220 1220 - len, &pos); 1287 1287 + ret = hclge_dbg_dump_reg_common(hdev, reg_info, s); 1221 1288 if (ret) 1222 1289 break; 1223 1290 } ··· 1221 1298 return ret; 1222 1299 } 1223 1300 1224 1224 - static int hclge_dbg_dump_tc(struct hclge_dev *hdev, char *buf, int len) 1301 1301 + static int hclge_dbg_dump_bios_reg_cmd(struct seq_file *s, void *data) 1225 1302 { 1303 1303 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_BIOS_COMMON, s); 1304 1304 + } 1305 1305 + 1306 1306 + static int hclge_dbg_dump_ssu_reg_cmd(struct seq_file *s, void *data) 1307 1307 + { 1308 1308 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_SSU, s); 1309 1309 + } 1310 1310 + 1311 1311 + static int hclge_dbg_dump_igu_egu_reg_cmd(struct seq_file *s, void *data) 1312 1312 + { 1313 1313 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_IGU_EGU, s); 1314 1314 + } 1315 1315 + 1316 1316 + static int hclge_dbg_dump_rpu_reg_cmd(struct seq_file *s, void *data) 1317 1317 + { 1318 1318 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RPU, s); 1319 1319 + } 1320 1320 + 1321 1321 + static int hclge_dbg_dump_ncsi_reg_cmd(struct seq_file *s, void *data) 1322 1322 + { 1323 1323 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_NCSI, s); 1324 1324 + } 1325 1325 + 1326 1326 + static int hclge_dbg_dump_rtc_reg_cmd(struct seq_file *s, void *data) 1327 1327 + { 1328 1328 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RTC, s); 1329 1329 + } 1330 1330 + 1331 1331 + static int hclge_dbg_dump_ppp_reg_cmd(struct seq_file *s, void *data) 1332 1332 + { 1333 1333 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_PPP, s); 1334 1334 + } 1335 1335 + 1336 1336 + static int hclge_dbg_dump_rcb_reg_cmd(struct seq_file *s, void *data) 1337 1337 + { 1338 1338 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_RCB, s); 1339 1339 + } 1340 1340 + 1341 1341 + static int hclge_dbg_dump_tqp_reg_cmd(struct seq_file *s, void *data) 1342 1342 + { 1343 1343 + return hclge_dbg_dump_reg_cmd(HNAE3_DBG_CMD_REG_TQP, s); 1344 1344 + } 1345 1345 + 1346 1346 + static int hclge_dbg_dump_tc(struct seq_file *s, void *data) 1347 1347 + { 1348 1348 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1226 1349 struct hclge_ets_tc_weight_cmd *ets_weight; 1350 1350 + const char *sch_mode_str; 1227 1351 struct hclge_desc desc; 1228 1228 - char *sch_mode_str; 1229 1229 - int pos = 0; 1230 1352 int ret; 1231 1353 u8 i; 1232 1354 ··· 1291 1323 1292 1324 ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data; 1293 1325 1294 1294 - pos += scnprintf(buf + pos, len - pos, "enabled tc number: %u\n", 1295 1295 - hdev->tm_info.num_tc); 1296 1296 - pos += scnprintf(buf + pos, len - pos, "weight_offset: %u\n", 1297 1297 - ets_weight->weight_offset); 1326 1326 + seq_printf(s, "enabled tc number: %u\n", hdev->tm_info.num_tc); 1327 1327 + seq_printf(s, "weight_offset: %u\n", ets_weight->weight_offset); 1298 1328 1299 1299 - pos += scnprintf(buf + pos, len - pos, "TC MODE WEIGHT\n"); 1329 1329 + seq_puts(s, "TC MODE WEIGHT\n"); 1300 1330 for (i = 0; i < HNAE3_MAX_TC; i++) { 1301 1331 sch_mode_str = ets_weight->tc_weight[i] ? "dwrr" : "sp"; 1302 1302 - pos += scnprintf(buf + pos, len - pos, "%u %4s %3u\n", 1303 1303 - i, sch_mode_str, ets_weight->tc_weight[i]); 1332 1332 + seq_printf(s, "%u %4s %3u\n", i, sch_mode_str, 1333 1333 + ets_weight->tc_weight[i]); 1304 1334 } 1305 1335 1306 1336 return 0; 1307 1337 } 1308 1338 1309 1309 - static const struct hclge_dbg_item tm_pg_items[] = { 1310 1310 - { "ID", 2 }, 1311 1311 - { "PRI_MAP", 2 }, 1312 1312 - { "MODE", 2 }, 1313 1313 - { "DWRR", 2 }, 1314 1314 - { "C_IR_B", 2 }, 1315 1315 - { "C_IR_U", 2 }, 1316 1316 - { "C_IR_S", 2 }, 1317 1317 - { "C_BS_B", 2 }, 1318 1318 - { "C_BS_S", 2 }, 1319 1319 - { "C_FLAG", 2 }, 1320 1320 - { "C_RATE(Mbps)", 2 }, 1321 1321 - { "P_IR_B", 2 }, 1322 1322 - { "P_IR_U", 2 }, 1323 1323 - { "P_IR_S", 2 }, 1324 1324 - { "P_BS_B", 2 }, 1325 1325 - { "P_BS_S", 2 }, 1326 1326 - { "P_FLAG", 2 }, 1327 1327 - { "P_RATE(Mbps)", 0 } 1328 1328 - }; 1329 1329 - 1330 1330 - static void hclge_dbg_fill_shaper_content(struct hclge_tm_shaper_para *para, 1331 1331 - char **result, u8 *index) 1339 1339 + static void hclge_dbg_fill_shaper_content(struct seq_file *s, 1340 1340 + struct hclge_tm_shaper_para *para) 1332 1341 { 1333 1333 - sprintf(result[(*index)++], "%3u", para->ir_b); 1334 1334 - sprintf(result[(*index)++], "%3u", para->ir_u); 1335 1335 - sprintf(result[(*index)++], "%3u", para->ir_s); 1336 1336 - sprintf(result[(*index)++], "%3u", para->bs_b); 1337 1337 - sprintf(result[(*index)++], "%3u", para->bs_s); 1338 1338 - sprintf(result[(*index)++], "%3u", para->flag); 1339 1339 - sprintf(result[(*index)++], "%6u", para->rate); 1342 1342 + seq_printf(s, "%-8u%-8u%-8u%-8u%-8u%-8u%-14u", para->ir_b, para->ir_u, 1343 1343 + para->ir_s, para->bs_b, para->bs_s, para->flag, para->rate); 1340 1344 } 1341 1345 1342 1342 - static int __hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *data_str, 1343 1343 - char *buf, int len) 1346 1346 + static int hclge_dbg_dump_tm_pg(struct seq_file *s, void *data) 1344 1347 { 1345 1348 struct hclge_tm_shaper_para c_shaper_para, p_shaper_para; 1346 1346 - char *result[ARRAY_SIZE(tm_pg_items)], *sch_mode_str; 1347 1347 - u8 pg_id, sch_mode, weight, pri_bit_map, i, j; 1348 1348 - char content[HCLGE_DBG_TM_INFO_LEN]; 1349 1349 - int pos = 0; 1349 1349 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1350 1350 + u8 pg_id, sch_mode, weight, pri_bit_map; 1351 1351 + const char *sch_mode_str; 1350 1352 int ret; 1351 1353 1352 1352 - for (i = 0; i < ARRAY_SIZE(tm_pg_items); i++) { 1353 1353 - result[i] = data_str; 1354 1354 - data_str += HCLGE_DBG_DATA_STR_LEN; 1355 1355 - } 1356 1356 - 1357 1357 - hclge_dbg_fill_content(content, sizeof(content), tm_pg_items, 1358 1358 - NULL, ARRAY_SIZE(tm_pg_items)); 1359 1359 - pos += scnprintf(buf + pos, len - pos, "%s", content); 1354 1354 + seq_puts(s, "ID PRI_MAP MODE DWRR C_IR_B C_IR_U C_IR_S C_BS_B "); 1355 1355 + seq_puts(s, "C_BS_S C_FLAG C_RATE(Mbps) P_IR_B P_IR_U P_IR_S "); 1356 1356 + seq_puts(s, "P_BS_B P_BS_S P_FLAG P_RATE(Mbps)\n"); 1360 1357 1361 1358 for (pg_id = 0; pg_id < hdev->tm_info.num_pg; pg_id++) { 1362 1359 ret = hclge_tm_get_pg_to_pri_map(hdev, pg_id, &pri_bit_map); ··· 1351 1418 sch_mode_str = sch_mode & HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" : 1352 1419 "sp"; 1353 1420 1354 1354 - j = 0; 1355 1355 - sprintf(result[j++], "%02u", pg_id); 1356 1356 - sprintf(result[j++], "0x%02x", pri_bit_map); 1357 1357 - sprintf(result[j++], "%4s", sch_mode_str); 1358 1358 - sprintf(result[j++], "%3u", weight); 1359 1359 - hclge_dbg_fill_shaper_content(&c_shaper_para, result, &j); 1360 1360 - hclge_dbg_fill_shaper_content(&p_shaper_para, result, &j); 1361 1361 - 1362 1362 - hclge_dbg_fill_content(content, sizeof(content), tm_pg_items, 1363 1363 - (const char **)result, 1364 1364 - ARRAY_SIZE(tm_pg_items)); 1365 1365 - pos += scnprintf(buf + pos, len - pos, "%s", content); 1421 1421 + seq_printf(s, "%02u 0x%-7x%-6s%-6u", pg_id, pri_bit_map, 1422 1422 + sch_mode_str, weight); 1423 1423 + hclge_dbg_fill_shaper_content(s, &c_shaper_para); 1424 1424 + hclge_dbg_fill_shaper_content(s, &p_shaper_para); 1425 1425 + seq_puts(s, "\n"); 1366 1426 } 1367 1427 1368 1428 return 0; 1369 1429 } 1370 1430 1371 1371 - static int hclge_dbg_dump_tm_pg(struct hclge_dev *hdev, char *buf, int len) 1431 1431 + static int hclge_dbg_dump_tm_port(struct seq_file *s, void *data) 1372 1432 { 1373 1373 - char *data_str; 1374 1374 - int ret; 1375 1375 - 1376 1376 - data_str = kcalloc(ARRAY_SIZE(tm_pg_items), 1377 1377 - HCLGE_DBG_DATA_STR_LEN, GFP_KERNEL); 1378 1378 - if (!data_str) 1379 1379 - return -ENOMEM; 1380 1380 - 1381 1381 - ret = __hclge_dbg_dump_tm_pg(hdev, data_str, buf, len); 1382 1382 - 1383 1383 - kfree(data_str); 1384 1384 - 1385 1385 - return ret; 1386 1386 - } 1387 1387 - 1388 1388 - static int hclge_dbg_dump_tm_port(struct hclge_dev *hdev, char *buf, int len) 1389 1389 - { 1433 1433 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1390 1434 struct hclge_tm_shaper_para shaper_para; 1391 1391 - int pos = 0; 1392 1435 int ret; 1393 1436 1394 1437 ret = hclge_tm_get_port_shaper(hdev, &shaper_para); 1395 1438 if (ret) 1396 1439 return ret; 1397 1440 1398 1398 - pos += scnprintf(buf + pos, len - pos, 1399 1399 - "IR_B IR_U IR_S BS_B BS_S FLAG RATE(Mbps)\n"); 1400 1400 - pos += scnprintf(buf + pos, len - pos, 1401 1401 - "%3u %3u %3u %3u %3u %1u %6u\n", 1402 1402 - shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s, 1403 1403 - shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag, 1404 1404 - shaper_para.rate); 1441 1441 + seq_puts(s, "IR_B IR_U IR_S BS_B BS_S FLAG RATE(Mbps)\n"); 1442 1442 + seq_printf(s, "%3u %3u %3u %3u %3u %1u %6u\n", 1443 1443 + shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s, 1444 1444 + shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag, 1445 1445 + shaper_para.rate); 1405 1446 1406 1447 return 0; 1407 1448 } 1408 1449 1409 1450 static int hclge_dbg_dump_tm_bp_qset_map(struct hclge_dev *hdev, u8 tc_id, 1410 1410 - char *buf, int len) 1451 1451 + struct seq_file *s) 1411 1452 { 1412 1453 u32 qset_mapping[HCLGE_BP_EXT_GRP_NUM]; 1413 1454 struct hclge_bp_to_qs_map_cmd *map; 1414 1455 struct hclge_desc desc; 1415 1415 - int pos = 0; 1416 1456 u8 group_id; 1417 1457 u8 grp_num; 1418 1458 u16 i = 0; ··· 1411 1505 qset_mapping[group_id] = le32_to_cpu(map->qs_bit_map); 1412 1506 } 1413 1507 1414 1414 - pos += scnprintf(buf + pos, len - pos, "INDEX | TM BP QSET MAPPING:\n"); 1508 1508 + seq_puts(s, "INDEX | TM BP QSET MAPPING:\n"); 1415 1509 for (group_id = 0; group_id < grp_num / 8; group_id++) { 1416 1416 - pos += scnprintf(buf + pos, len - pos, 1417 1417 - "%04d | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n", 1418 1418 - group_id * 256, qset_mapping[i + 7], 1419 1419 - qset_mapping[i + 6], qset_mapping[i + 5], 1420 1420 - qset_mapping[i + 4], qset_mapping[i + 3], 1421 1421 - qset_mapping[i + 2], qset_mapping[i + 1], 1422 1422 - qset_mapping[i]); 1510 1510 + seq_printf(s, 1511 1511 + "%04d | %08x:%08x:%08x:%08x:%08x:%08x:%08x:%08x\n", 1512 1512 + group_id * 256, qset_mapping[i + 7], 1513 1513 + qset_mapping[i + 6], qset_mapping[i + 5], 1514 1514 + qset_mapping[i + 4], qset_mapping[i + 3], 1515 1515 + qset_mapping[i + 2], qset_mapping[i + 1], 1516 1516 + qset_mapping[i]); 1423 1517 i += 8; 1424 1518 } 1425 1519 1426 1426 - return pos; 1520 1520 + return 0; 1427 1521 } 1428 1522 1429 1429 - static int hclge_dbg_dump_tm_map(struct hclge_dev *hdev, char *buf, int len) 1523 1523 + static int hclge_dbg_dump_tm_map(struct seq_file *s, void *data) 1430 1524 { 1525 1525 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1431 1526 u16 queue_id; 1432 1527 u16 qset_id; 1433 1528 u8 link_vld; 1434 1434 - int pos = 0; 1435 1529 u8 pri_id; 1436 1530 u8 tc_id; 1437 1531 int ret; ··· 1450 1544 if (ret) 1451 1545 return ret; 1452 1546 1453 1453 - pos += scnprintf(buf + pos, len - pos, 1454 1454 - "QUEUE_ID QSET_ID PRI_ID TC_ID\n"); 1455 1455 - pos += scnprintf(buf + pos, len - pos, 1456 1456 - "%04u %4u %3u %2u\n", 1457 1457 - queue_id, qset_id, pri_id, tc_id); 1547 1547 + seq_puts(s, "QUEUE_ID QSET_ID PRI_ID TC_ID\n"); 1548 1548 + seq_printf(s, "%04u %4u %3u %2u\n", 1549 1549 + queue_id, qset_id, pri_id, tc_id); 1458 1550 1459 1551 if (!hnae3_dev_dcb_supported(hdev)) 1460 1552 continue; 1461 1553 1462 1462 - ret = hclge_dbg_dump_tm_bp_qset_map(hdev, tc_id, buf + pos, 1463 1463 - len - pos); 1554 1554 + ret = hclge_dbg_dump_tm_bp_qset_map(hdev, tc_id, s); 1464 1555 if (ret < 0) 1465 1556 return ret; 1466 1466 - pos += ret; 1467 1557 1468 1468 - pos += scnprintf(buf + pos, len - pos, "\n"); 1558 1558 + seq_puts(s, "\n"); 1469 1559 } 1470 1560 1471 1561 return 0; 1472 1562 } 1473 1563 1474 1474 - static int hclge_dbg_dump_tm_nodes(struct hclge_dev *hdev, char *buf, int len) 1564 1564 + static int hclge_dbg_dump_tm_nodes(struct seq_file *s, void *data) 1475 1565 { 1566 1566 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1476 1567 struct hclge_tm_nodes_cmd *nodes; 1477 1568 struct hclge_desc desc; 1478 1478 - int pos = 0; 1479 1569 int ret; 1480 1570 1481 1571 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TM_NODES, true); ··· 1484 1582 1485 1583 nodes = (struct hclge_tm_nodes_cmd *)desc.data; 1486 1584 1487 1487 - pos += scnprintf(buf + pos, len - pos, " BASE_ID MAX_NUM\n"); 1488 1488 - pos += scnprintf(buf + pos, len - pos, "PG %4u %4u\n", 1489 1489 - nodes->pg_base_id, nodes->pg_num); 1490 1490 - pos += scnprintf(buf + pos, len - pos, "PRI %4u %4u\n", 1491 1491 - nodes->pri_base_id, nodes->pri_num); 1492 1492 - pos += scnprintf(buf + pos, len - pos, "QSET %4u %4u\n", 1493 1493 - le16_to_cpu(nodes->qset_base_id), 1494 1494 - le16_to_cpu(nodes->qset_num)); 1495 1495 - pos += scnprintf(buf + pos, len - pos, "QUEUE %4u %4u\n", 1496 1496 - le16_to_cpu(nodes->queue_base_id), 1497 1497 - le16_to_cpu(nodes->queue_num)); 1585 1585 + seq_puts(s, " BASE_ID MAX_NUM\n"); 1586 1586 + seq_printf(s, "PG %4u %4u\n", nodes->pg_base_id, 1587 1587 + nodes->pg_num); 1588 1588 + seq_printf(s, "PRI %4u %4u\n", nodes->pri_base_id, 1589 1589 + nodes->pri_num); 1590 1590 + seq_printf(s, "QSET %4u %4u\n", 1591 1591 + le16_to_cpu(nodes->qset_base_id), 1592 1592 + le16_to_cpu(nodes->qset_num)); 1593 1593 + seq_printf(s, "QUEUE %4u %4u\n", 1594 1594 + le16_to_cpu(nodes->queue_base_id), 1595 1595 + le16_to_cpu(nodes->queue_num)); 1498 1596 1499 1597 return 0; 1500 1598 } 1501 1599 1502 1502 - static const struct hclge_dbg_item tm_pri_items[] = { 1503 1503 - { "ID", 4 }, 1504 1504 - { "MODE", 2 }, 1505 1505 - { "DWRR", 2 }, 1506 1506 - { "C_IR_B", 2 }, 1507 1507 - { "C_IR_U", 2 }, 1508 1508 - { "C_IR_S", 2 }, 1509 1509 - { "C_BS_B", 2 }, 1510 1510 - { "C_BS_S", 2 }, 1511 1511 - { "C_FLAG", 2 }, 1512 1512 - { "C_RATE(Mbps)", 2 }, 1513 1513 - { "P_IR_B", 2 }, 1514 1514 - { "P_IR_U", 2 }, 1515 1515 - { "P_IR_S", 2 }, 1516 1516 - { "P_BS_B", 2 }, 1517 1517 - { "P_BS_S", 2 }, 1518 1518 - { "P_FLAG", 2 }, 1519 1519 - { "P_RATE(Mbps)", 0 } 1520 1520 - }; 1521 1521 - 1522 1522 - static int hclge_dbg_dump_tm_pri(struct hclge_dev *hdev, char *buf, int len) 1600 1600 + static int hclge_dbg_dump_tm_pri(struct seq_file *s, void *data) 1523 1601 { 1524 1602 struct hclge_tm_shaper_para c_shaper_para, p_shaper_para; 1525 1525 - char *result[ARRAY_SIZE(tm_pri_items)], *sch_mode_str; 1526 1526 - char content[HCLGE_DBG_TM_INFO_LEN]; 1527 1527 - u8 pri_num, sch_mode, weight, i, j; 1528 1528 - char *data_str; 1529 1529 - int pos, ret; 1603 1603 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1604 1604 + u8 pri_num, sch_mode, weight, i; 1605 1605 + const char *sch_mode_str; 1606 1606 + int ret; 1530 1607 1531 1608 ret = hclge_tm_get_pri_num(hdev, &pri_num); 1532 1609 if (ret) 1533 1610 return ret; 1534 1611 1535 1535 - data_str = kcalloc(ARRAY_SIZE(tm_pri_items), HCLGE_DBG_DATA_STR_LEN, 1536 1536 - GFP_KERNEL); 1537 1537 - if (!data_str) 1538 1538 - return -ENOMEM; 1539 1539 - 1540 1540 - for (i = 0; i < ARRAY_SIZE(tm_pri_items); i++) 1541 1541 - result[i] = &data_str[i * HCLGE_DBG_DATA_STR_LEN]; 1542 1542 - 1543 1543 - hclge_dbg_fill_content(content, sizeof(content), tm_pri_items, 1544 1544 - NULL, ARRAY_SIZE(tm_pri_items)); 1545 1545 - pos = scnprintf(buf, len, "%s", content); 1612 1612 + seq_puts(s, "ID MODE DWRR C_IR_B C_IR_U C_IR_S C_BS_B "); 1613 1613 + seq_puts(s, "C_BS_S C_FLAG C_RATE(Mbps) P_IR_B P_IR_U P_IR_S "); 1614 1614 + seq_puts(s, "P_BS_B P_BS_S P_FLAG P_RATE(Mbps)\n"); 1546 1615 1547 1616 for (i = 0; i < pri_num; i++) { 1548 1617 ret = hclge_tm_get_pri_sch_mode(hdev, i, &sch_mode); ··· 1539 1666 sch_mode_str = sch_mode & HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" : 1540 1667 "sp"; 1541 1668 1542 1542 - j = 0; 1543 1543 - sprintf(result[j++], "%04u", i); 1544 1544 - sprintf(result[j++], "%4s", sch_mode_str); 1545 1545 - sprintf(result[j++], "%3u", weight); 1546 1546 - hclge_dbg_fill_shaper_content(&c_shaper_para, result, &j); 1547 1547 - hclge_dbg_fill_shaper_content(&p_shaper_para, result, &j); 1548 1548 - hclge_dbg_fill_content(content, sizeof(content), tm_pri_items, 1549 1549 - (const char **)result, 1550 1550 - ARRAY_SIZE(tm_pri_items)); 1551 1551 - pos += scnprintf(buf + pos, len - pos, "%s", content); 1669 1669 + seq_printf(s, "%04u %-6s%-6u", i, sch_mode_str, weight); 1670 1670 + hclge_dbg_fill_shaper_content(s, &c_shaper_para); 1671 1671 + hclge_dbg_fill_shaper_content(s, &p_shaper_para); 1672 1672 + seq_puts(s, "\n"); 1552 1673 } 1553 1674 1554 1675 out: 1555 1555 - kfree(data_str); 1556 1676 return ret; 1557 1677 } 1558 1678 1559 1559 - static const struct hclge_dbg_item tm_qset_items[] = { 1560 1560 - { "ID", 4 }, 1561 1561 - { "MAP_PRI", 2 }, 1562 1562 - { "LINK_VLD", 2 }, 1563 1563 - { "MODE", 2 }, 1564 1564 - { "DWRR", 2 }, 1565 1565 - { "IR_B", 2 }, 1566 1566 - { "IR_U", 2 }, 1567 1567 - { "IR_S", 2 }, 1568 1568 - { "BS_B", 2 }, 1569 1569 - { "BS_S", 2 }, 1570 1570 - { "FLAG", 2 }, 1571 1571 - { "RATE(Mbps)", 0 } 1572 1572 - }; 1573 1573 - 1574 1574 - static int hclge_dbg_dump_tm_qset(struct hclge_dev *hdev, char *buf, int len) 1679 1679 + static int hclge_dbg_dump_tm_qset(struct seq_file *s, void *data) 1575 1680 { 1576 1576 - char data_str[ARRAY_SIZE(tm_qset_items)][HCLGE_DBG_DATA_STR_LEN]; 1577 1577 - char *result[ARRAY_SIZE(tm_qset_items)], *sch_mode_str; 1681 1681 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1578 1682 u8 priority, link_vld, sch_mode, weight; 1579 1683 struct hclge_tm_shaper_para shaper_para; 1580 1580 - char content[HCLGE_DBG_TM_INFO_LEN]; 1684 1684 + const char *sch_mode_str; 1581 1685 u16 qset_num, i; 1582 1582 - int ret, pos; 1583 1583 - u8 j; 1686 1686 + int ret; 1584 1687 1585 1688 ret = hclge_tm_get_qset_num(hdev, &qset_num); 1586 1689 if (ret) 1587 1690 return ret; 1588 1691 1589 1589 - for (i = 0; i < ARRAY_SIZE(tm_qset_items); i++) 1590 1590 - result[i] = &data_str[i][0]; 1591 1591 - 1592 1592 - hclge_dbg_fill_content(content, sizeof(content), tm_qset_items, 1593 1593 - NULL, ARRAY_SIZE(tm_qset_items)); 1594 1594 - pos = scnprintf(buf, len, "%s", content); 1692 1692 + seq_puts(s, "ID MAP_PRI LINK_VLD MODE DWRR IR_B IR_U IR_S "); 1693 1693 + seq_puts(s, "BS_B BS_S FLAG RATE(Mbps)\n"); 1595 1694 1596 1695 for (i = 0; i < qset_num; i++) { 1597 1696 ret = hclge_tm_get_qset_map_pri(hdev, i, &priority, &link_vld); ··· 1585 1740 sch_mode_str = sch_mode & HCLGE_TM_TX_SCHD_DWRR_MSK ? "dwrr" : 1586 1741 "sp"; 1587 1742 1588 1588 - j = 0; 1589 1589 - sprintf(result[j++], "%04u", i); 1590 1590 - sprintf(result[j++], "%4u", priority); 1591 1591 - sprintf(result[j++], "%4u", link_vld); 1592 1592 - sprintf(result[j++], "%4s", sch_mode_str); 1593 1593 - sprintf(result[j++], "%3u", weight); 1594 1594 - hclge_dbg_fill_shaper_content(&shaper_para, result, &j); 1595 1595 - 1596 1596 - hclge_dbg_fill_content(content, sizeof(content), tm_qset_items, 1597 1597 - (const char **)result, 1598 1598 - ARRAY_SIZE(tm_qset_items)); 1599 1599 - pos += scnprintf(buf + pos, len - pos, "%s", content); 1743 1743 + seq_printf(s, "%04u %-9u%-10u%-6s%-6u", i, priority, link_vld, 1744 1744 + sch_mode_str, weight); 1745 1745 + seq_printf(s, "%-6u%-6u%-6u%-6u%-6u%-6u%-14u\n", 1746 1746 + shaper_para.ir_b, shaper_para.ir_u, shaper_para.ir_s, 1747 1747 + shaper_para.bs_b, shaper_para.bs_s, shaper_para.flag, 1748 1748 + shaper_para.rate); 1600 1749 } 1601 1750 1602 1751 return 0; 1603 1752 } 1604 1753 1605 1605 - static int hclge_dbg_dump_qos_pause_cfg(struct hclge_dev *hdev, char *buf, 1606 1606 - int len) 1754 1754 + static int hclge_dbg_dump_qos_pause_cfg(struct seq_file *s, void *data) 1607 1755 { 1756 1756 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1608 1757 struct hclge_cfg_pause_param_cmd *pause_param; 1609 1758 struct hclge_desc desc; 1610 1610 - int pos = 0; 1611 1759 int ret; 1612 1760 1613 1761 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CFG_MAC_PARA, true); ··· 1613 1775 1614 1776 pause_param = (struct hclge_cfg_pause_param_cmd *)desc.data; 1615 1777 1616 1616 - pos += scnprintf(buf + pos, len - pos, "pause_trans_gap: 0x%x\n", 1617 1617 - pause_param->pause_trans_gap); 1618 1618 - pos += scnprintf(buf + pos, len - pos, "pause_trans_time: 0x%x\n", 1619 1619 - le16_to_cpu(pause_param->pause_trans_time)); 1778 1778 + seq_printf(s, "pause_trans_gap: 0x%x\n", pause_param->pause_trans_gap); 1779 1779 + seq_printf(s, "pause_trans_time: 0x%x\n", 1780 1780 + le16_to_cpu(pause_param->pause_trans_time)); 1620 1781 return 0; 1621 1782 } 1622 1783 1623 1784 #define HCLGE_DBG_TC_MASK 0x0F 1624 1785 1625 1625 - static int hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev, char *buf, 1626 1626 - int len) 1786 1786 + static int hclge_dbg_dump_qos_pri_map(struct seq_file *s, void *data) 1627 1787 { 1628 1788 #define HCLGE_DBG_TC_BIT_WIDTH 4 1629 1789 1790 1790 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1630 1791 struct hclge_qos_pri_map_cmd *pri_map; 1631 1792 struct hclge_desc desc; 1632 1632 - int pos = 0; 1633 1793 u8 *pri_tc; 1634 1794 u8 tc, i; 1635 1795 int ret; ··· 1642 1806 1643 1807 pri_map = (struct hclge_qos_pri_map_cmd *)desc.data; 1644 1808 1645 1645 - pos += scnprintf(buf + pos, len - pos, "vlan_to_pri: 0x%x\n", 1646 1646 - pri_map->vlan_pri); 1647 1647 - pos += scnprintf(buf + pos, len - pos, "PRI TC\n"); 1809 1809 + seq_printf(s, "vlan_to_pri: 0x%x\n", pri_map->vlan_pri); 1810 1810 + seq_puts(s, "PRI TC\n"); 1648 1811 1649 1812 pri_tc = (u8 *)pri_map; 1650 1813 for (i = 0; i < HNAE3_MAX_TC; i++) { 1651 1814 tc = pri_tc[i >> 1] >> ((i & 1) * HCLGE_DBG_TC_BIT_WIDTH); 1652 1815 tc &= HCLGE_DBG_TC_MASK; 1653 1653 - pos += scnprintf(buf + pos, len - pos, "%u %u\n", i, tc); 1816 1816 + seq_printf(s, "%u %u\n", i, tc); 1654 1817 } 1655 1818 1656 1819 return 0; 1657 1820 } 1658 1821 1659 1659 - static int hclge_dbg_dump_qos_dscp_map(struct hclge_dev *hdev, char *buf, 1660 1660 - int len) 1822 1822 + static int hclge_dbg_dump_qos_dscp_map(struct seq_file *s, void *data) 1661 1823 { 1662 1662 - struct hnae3_knic_private_info *kinfo = &hdev->vport[0].nic.kinfo; 1824 1824 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1663 1825 struct hclge_desc desc[HCLGE_DSCP_MAP_TC_BD_NUM]; 1826 1826 + struct hnae3_knic_private_info *kinfo; 1664 1827 u8 *req0 = (u8 *)desc[0].data; 1665 1828 u8 *req1 = (u8 *)desc[1].data; 1666 1829 u8 dscp_tc[HNAE3_MAX_DSCP]; 1667 1667 - int pos, ret; 1830 1830 + int ret; 1668 1831 u8 i, j; 1669 1832 1670 1670 - pos = scnprintf(buf, len, "tc map mode: %s\n", 1671 1671 - tc_map_mode_str[kinfo->tc_map_mode]); 1833 1833 + kinfo = &hdev->vport[0].nic.kinfo; 1834 1834 + 1835 1835 + seq_printf(s, "tc map mode: %s\n", tc_map_mode_str[kinfo->tc_map_mode]); 1672 1836 1673 1837 if (kinfo->tc_map_mode != HNAE3_TC_MAP_MODE_DSCP) 1674 1838 return 0; ··· 1683 1847 return ret; 1684 1848 } 1685 1849 1686 1686 - pos += scnprintf(buf + pos, len - pos, "\nDSCP PRIO TC\n"); 1850 1850 + seq_puts(s, "\nDSCP PRIO TC\n"); 1687 1851 1688 1852 /* The low 32 dscp setting use bd0, high 32 dscp setting use bd1 */ 1689 1853 for (i = 0; i < HNAE3_MAX_DSCP / HCLGE_DSCP_MAP_TC_BD_NUM; i++) { ··· 1701 1865 if (kinfo->dscp_prio[i] == HNAE3_PRIO_ID_INVALID) 1702 1866 continue; 1703 1867 1704 1704 - pos += scnprintf(buf + pos, len - pos, " %2u %u %u\n", 1705 1705 - i, kinfo->dscp_prio[i], dscp_tc[i]); 1868 1868 + seq_printf(s, " %2u %u %u\n", i, kinfo->dscp_prio[i], 1869 1869 + dscp_tc[i]); 1706 1870 } 1707 1871 1708 1872 return 0; 1709 1873 } 1710 1874 1711 1711 - static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, char *buf, int len) 1875 1875 + static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev, struct seq_file *s) 1712 1876 { 1713 1877 struct hclge_tx_buff_alloc_cmd *tx_buf_cmd; 1714 1878 struct hclge_desc desc; 1715 1715 - int pos = 0; 1716 1879 int i, ret; 1717 1880 1718 1881 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, true); ··· 1724 1889 1725 1890 tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc.data; 1726 1891 for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 1727 1727 - pos += scnprintf(buf + pos, len - pos, 1728 1728 - "tx_packet_buf_tc_%d: 0x%x\n", i, 1729 1729 - le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i])); 1892 1892 + seq_printf(s, "tx_packet_buf_tc_%d: 0x%x\n", i, 1893 1893 + le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i])); 1730 1894 1731 1731 - return pos; 1895 1895 + return 0; 1732 1896 } 1733 1897 1734 1734 - static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev, char *buf, 1735 1735 - int len) 1898 1898 + static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev, 1899 1899 + struct seq_file *s) 1736 1900 { 1737 1901 struct hclge_rx_priv_buff_cmd *rx_buf_cmd; 1738 1902 struct hclge_desc desc; 1739 1739 - int pos = 0; 1740 1903 int i, ret; 1741 1904 1742 1905 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true); ··· 1745 1912 return ret; 1746 1913 } 1747 1914 1748 1748 - pos += scnprintf(buf + pos, len - pos, "\n"); 1915 1915 + seq_puts(s, "\n"); 1749 1916 1750 1917 rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc.data; 1751 1918 for (i = 0; i < HCLGE_MAX_TC_NUM; i++) 1752 1752 - pos += scnprintf(buf + pos, len - pos, 1753 1753 - "rx_packet_buf_tc_%d: 0x%x\n", i, 1754 1754 - le16_to_cpu(rx_buf_cmd->buf_num[i])); 1919 1919 + seq_printf(s, "rx_packet_buf_tc_%d: 0x%x\n", i, 1920 1920 + le16_to_cpu(rx_buf_cmd->buf_num[i])); 1755 1921 1756 1756 - pos += scnprintf(buf + pos, len - pos, "rx_share_buf: 0x%x\n", 1757 1757 - le16_to_cpu(rx_buf_cmd->shared_buf)); 1922 1922 + seq_printf(s, "rx_share_buf: 0x%x\n", 1923 1923 + le16_to_cpu(rx_buf_cmd->shared_buf)); 1758 1924 1759 1759 - return pos; 1925 1925 + return 0; 1760 1926 } 1761 1927 1762 1762 - static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev, char *buf, 1763 1763 - int len) 1928 1928 + static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev, 1929 1929 + struct seq_file *s) 1764 1930 { 1765 1931 struct hclge_rx_com_wl *rx_com_wl; 1766 1932 struct hclge_desc desc; 1767 1767 - int pos = 0; 1768 1933 int ret; 1769 1934 1770 1935 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_COM_WL_ALLOC, true); ··· 1774 1943 } 1775 1944 1776 1945 rx_com_wl = (struct hclge_rx_com_wl *)desc.data; 1777 1777 - pos += scnprintf(buf + pos, len - pos, "\n"); 1778 1778 - pos += scnprintf(buf + pos, len - pos, 1779 1779 - "rx_com_wl: high: 0x%x, low: 0x%x\n", 1780 1780 - le16_to_cpu(rx_com_wl->com_wl.high), 1781 1781 - le16_to_cpu(rx_com_wl->com_wl.low)); 1946 1946 + seq_puts(s, "\n"); 1947 1947 + seq_printf(s, "rx_com_wl: high: 0x%x, low: 0x%x\n", 1948 1948 + le16_to_cpu(rx_com_wl->com_wl.high), 1949 1949 + le16_to_cpu(rx_com_wl->com_wl.low)); 1782 1950 1783 1783 - return pos; 1951 1951 + return 0; 1784 1952 } 1785 1953 1786 1786 - static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev, char *buf, 1787 1787 - int len) 1954 1954 + static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev, 1955 1955 + struct seq_file *s) 1788 1956 { 1789 1957 struct hclge_rx_com_wl *rx_packet_cnt; 1790 1958 struct hclge_desc desc; 1791 1791 - int pos = 0; 1792 1959 int ret; 1793 1960 1794 1961 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_GBL_PKT_CNT, true); ··· 1798 1969 } 1799 1970 1800 1971 rx_packet_cnt = (struct hclge_rx_com_wl *)desc.data; 1801 1801 - pos += scnprintf(buf + pos, len - pos, 1802 1802 - "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n", 1803 1803 - le16_to_cpu(rx_packet_cnt->com_wl.high), 1804 1804 - le16_to_cpu(rx_packet_cnt->com_wl.low)); 1972 1972 + seq_printf(s, "rx_global_packet_cnt: high: 0x%x, low: 0x%x\n", 1973 1973 + le16_to_cpu(rx_packet_cnt->com_wl.high), 1974 1974 + le16_to_cpu(rx_packet_cnt->com_wl.low)); 1805 1975 1806 1806 - return pos; 1976 1976 + return 0; 1807 1977 } 1808 1978 1809 1809 - static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev, char *buf, 1810 1810 - int len) 1979 1979 + static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev, 1980 1980 + struct seq_file *s) 1811 1981 { 1812 1982 struct hclge_rx_priv_wl_buf *rx_priv_wl; 1813 1983 struct hclge_desc desc[2]; 1814 1814 - int pos = 0; 1815 1984 int i, ret; 1816 1985 1817 1986 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true); ··· 1824 1997 1825 1998 rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data; 1826 1999 for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 1827 1827 - pos += scnprintf(buf + pos, len - pos, 1828 1828 - "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i, 1829 1829 - le16_to_cpu(rx_priv_wl->tc_wl[i].high), 1830 1830 - le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 2000 2000 + seq_printf(s, "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", i, 2001 2001 + le16_to_cpu(rx_priv_wl->tc_wl[i].high), 2002 2002 + le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 1831 2003 1832 2004 rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[1].data; 1833 2005 for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 1834 1834 - pos += scnprintf(buf + pos, len - pos, 1835 1835 - "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", 1836 1836 - i + HCLGE_TC_NUM_ONE_DESC, 1837 1837 - le16_to_cpu(rx_priv_wl->tc_wl[i].high), 1838 1838 - le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 2006 2006 + seq_printf(s, "rx_priv_wl_tc_%d: high: 0x%x, low: 0x%x\n", 2007 2007 + i + HCLGE_TC_NUM_ONE_DESC, 2008 2008 + le16_to_cpu(rx_priv_wl->tc_wl[i].high), 2009 2009 + le16_to_cpu(rx_priv_wl->tc_wl[i].low)); 1839 2010 1840 1840 - return pos; 2011 2011 + return 0; 1841 2012 } 1842 2013 1843 2014 static int hclge_dbg_dump_rx_common_threshold_cfg(struct hclge_dev *hdev, 1844 1844 - char *buf, int len) 2015 2015 + struct seq_file *s) 1845 2016 { 1846 2017 struct hclge_rx_com_thrd *rx_com_thrd; 1847 2018 struct hclge_desc desc[2]; 1848 1848 - int pos = 0; 1849 2019 int i, ret; 1850 2020 1851 2021 hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true); ··· 1855 2031 return ret; 1856 2032 } 1857 2033 1858 1858 - pos += scnprintf(buf + pos, len - pos, "\n"); 2034 2034 + seq_puts(s, "\n"); 1859 2035 rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data; 1860 2036 for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 1861 1861 - pos += scnprintf(buf + pos, len - pos, 1862 1862 - "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i, 1863 1863 - le16_to_cpu(rx_com_thrd->com_thrd[i].high), 1864 1864 - le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 2037 2037 + seq_printf(s, "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", i, 2038 2038 + le16_to_cpu(rx_com_thrd->com_thrd[i].high), 2039 2039 + le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 1865 2040 1866 2041 rx_com_thrd = (struct hclge_rx_com_thrd *)desc[1].data; 1867 2042 for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++) 1868 1868 - pos += scnprintf(buf + pos, len - pos, 1869 1869 - "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", 1870 1870 - i + HCLGE_TC_NUM_ONE_DESC, 1871 1871 - le16_to_cpu(rx_com_thrd->com_thrd[i].high), 1872 1872 - le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 2043 2043 + seq_printf(s, "rx_com_thrd_tc_%d: high: 0x%x, low: 0x%x\n", 2044 2044 + i + HCLGE_TC_NUM_ONE_DESC, 2045 2045 + le16_to_cpu(rx_com_thrd->com_thrd[i].high), 2046 2046 + le16_to_cpu(rx_com_thrd->com_thrd[i].low)); 1873 2047 1874 1874 - return pos; 2048 2048 + return 0; 1875 2049 } 1876 2050 1877 1877 - static int hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev, char *buf, 1878 1878 - int len) 2051 2051 + static int hclge_dbg_dump_qos_buf_cfg(struct seq_file *s, void *data) 1879 2052 { 1880 1880 - int pos = 0; 2053 2053 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1881 2054 int ret; 1882 2055 1883 1883 - ret = hclge_dbg_dump_tx_buf_cfg(hdev, buf + pos, len - pos); 2056 2056 + ret = hclge_dbg_dump_tx_buf_cfg(hdev, s); 1884 2057 if (ret < 0) 1885 2058 return ret; 1886 1886 - pos += ret; 1887 2059 1888 1888 - ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev, buf + pos, len - pos); 2060 2060 + ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev, s); 1889 2061 if (ret < 0) 1890 2062 return ret; 1891 1891 - pos += ret; 1892 2063 1893 1893 - ret = hclge_dbg_dump_rx_common_wl_cfg(hdev, buf + pos, len - pos); 2064 2064 + ret = hclge_dbg_dump_rx_common_wl_cfg(hdev, s); 1894 2065 if (ret < 0) 1895 2066 return ret; 1896 1896 - pos += ret; 1897 2067 1898 1898 - ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev, buf + pos, len - pos); 2068 2068 + ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev, s); 1899 2069 if (ret < 0) 1900 2070 return ret; 1901 1901 - pos += ret; 1902 2071 1903 1903 - pos += scnprintf(buf + pos, len - pos, "\n"); 2072 2072 + seq_puts(s, "\n"); 1904 2073 if (!hnae3_dev_dcb_supported(hdev)) 1905 2074 return 0; 1906 2075 1907 1907 - ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev, buf + pos, len - pos); 2076 2076 + ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev, s); 1908 2077 if (ret < 0) 1909 2078 return ret; 1910 1910 - pos += ret; 1911 2079 1912 1912 - ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev, buf + pos, 1913 1913 - len - pos); 2080 2080 + ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev, s); 1914 2081 if (ret < 0) 1915 2082 return ret; 1916 2083 1917 2084 return 0; 1918 2085 } 1919 2086 1920 1920 - static int hclge_dbg_dump_mng_table(struct hclge_dev *hdev, char *buf, int len) 2087 2087 + static int hclge_dbg_dump_mng_table(struct seq_file *s, void *data) 1921 2088 { 2089 2089 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 1922 2090 struct hclge_mac_ethertype_idx_rd_cmd *req0; 1923 2091 struct hclge_desc desc; 1924 2092 u32 msg_egress_port; 1925 1925 - int pos = 0; 1926 2093 int ret, i; 1927 2094 1928 1928 - pos += scnprintf(buf + pos, len - pos, 1929 1929 - "entry mac_addr mask ether "); 1930 1930 - pos += scnprintf(buf + pos, len - pos, 1931 1931 - "mask vlan mask i_map i_dir e_type "); 1932 1932 - pos += scnprintf(buf + pos, len - pos, "pf_id vf_id q_id drop\n"); 2095 2095 + seq_puts(s, "entry mac_addr mask ether "); 2096 2096 + seq_puts(s, "mask vlan mask i_map i_dir e_type "); 2097 2097 + seq_puts(s, "pf_id vf_id q_id drop\n"); 1933 2098 1934 2099 for (i = 0; i < HCLGE_DBG_MNG_TBL_MAX; i++) { 1935 2100 hclge_cmd_setup_basic_desc(&desc, HCLGE_MAC_ETHERTYPE_IDX_RD, ··· 1936 2123 if (!req0->resp_code) 1937 2124 continue; 1938 2125 1939 1939 - pos += scnprintf(buf + pos, len - pos, "%02u %pM ", 1940 1940 - le16_to_cpu(req0->index), req0->mac_addr); 2126 2126 + seq_printf(s, "%02u %pM ", 2127 2127 + le16_to_cpu(req0->index), req0->mac_addr); 1941 2128 1942 1942 - pos += scnprintf(buf + pos, len - pos, 1943 1943 - "%x %04x %x %04x ", 1944 1944 - !!(req0->flags & HCLGE_DBG_MNG_MAC_MASK_B), 1945 1945 - le16_to_cpu(req0->ethter_type), 1946 1946 - !!(req0->flags & HCLGE_DBG_MNG_ETHER_MASK_B), 1947 1947 - le16_to_cpu(req0->vlan_tag) & 1948 1948 - HCLGE_DBG_MNG_VLAN_TAG); 2129 2129 + seq_printf(s, "%x %04x %x %04x ", 2130 2130 + !!(req0->flags & HCLGE_DBG_MNG_MAC_MASK_B), 2131 2131 + le16_to_cpu(req0->ethter_type), 2132 2132 + !!(req0->flags & HCLGE_DBG_MNG_ETHER_MASK_B), 2133 2133 + le16_to_cpu(req0->vlan_tag) & 2134 2134 + HCLGE_DBG_MNG_VLAN_TAG); 1949 2135 1950 1950 - pos += scnprintf(buf + pos, len - pos, 1951 1951 - "%x %02x %02x ", 1952 1952 - !!(req0->flags & HCLGE_DBG_MNG_VLAN_MASK_B), 1953 1953 - req0->i_port_bitmap, req0->i_port_direction); 2136 2136 + seq_printf(s, "%x %02x %02x ", 2137 2137 + !!(req0->flags & HCLGE_DBG_MNG_VLAN_MASK_B), 2138 2138 + req0->i_port_bitmap, req0->i_port_direction); 1954 2139 1955 2140 msg_egress_port = le16_to_cpu(req0->egress_port); 1956 1956 - pos += scnprintf(buf + pos, len - pos, 1957 1957 - "%x %x %02x %04x %x\n", 1958 1958 - !!(msg_egress_port & HCLGE_DBG_MNG_E_TYPE_B), 1959 1959 - msg_egress_port & HCLGE_DBG_MNG_PF_ID, 1960 1960 - (msg_egress_port >> 3) & HCLGE_DBG_MNG_VF_ID, 1961 1961 - le16_to_cpu(req0->egress_queue), 1962 1962 - !!(msg_egress_port & HCLGE_DBG_MNG_DROP_B)); 2141 2141 + seq_printf(s, "%x %x %02x %04x %x\n", 2142 2142 + !!(msg_egress_port & HCLGE_DBG_MNG_E_TYPE_B), 2143 2143 + msg_egress_port & HCLGE_DBG_MNG_PF_ID, 2144 2144 + (msg_egress_port >> 3) & HCLGE_DBG_MNG_VF_ID, 2145 2145 + le16_to_cpu(req0->egress_queue), 2146 2146 + !!(msg_egress_port & HCLGE_DBG_MNG_DROP_B)); 1963 2147 } 1964 2148 1965 2149 return 0; 1966 2150 } 1967 2151 1968 1968 - #define HCLGE_DBG_TCAM_BUF_SIZE 256 1969 1969 - 1970 2152 static int hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, bool sel_x, 1971 1971 - char *tcam_buf, 2153 2153 + struct seq_file *s, 1972 2154 struct hclge_dbg_tcam_msg tcam_msg) 1973 2155 { 1974 2156 struct hclge_fd_tcam_config_1_cmd *req1; 1975 2157 struct hclge_fd_tcam_config_2_cmd *req2; 1976 2158 struct hclge_fd_tcam_config_3_cmd *req3; 1977 2159 struct hclge_desc desc[3]; 1978 1978 - int pos = 0; 1979 2160 int ret, i; 1980 2161 __le32 *req; 1981 2162 ··· 1991 2184 if (ret) 1992 2185 return ret; 1993 2186 1994 1994 - pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, 1995 1995 - "read result tcam key %s(%u):\n", sel_x ? "x" : "y", 1996 1996 - tcam_msg.loc); 2187 2187 + seq_printf(s, "read result tcam key %s(%u):\n", 2188 2188 + sel_x ? "x" : "y", tcam_msg.loc); 1997 2189 1998 2190 /* tcam_data0 ~ tcam_data1 */ 1999 2191 req = (__le32 *)req1->tcam_data; 2000 2192 for (i = 0; i < 2; i++) 2001 2001 - pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, 2002 2002 - "%08x\n", le32_to_cpu(*req++)); 2193 2193 + seq_printf(s, "%08x\n", le32_to_cpu(*req++)); 2003 2194 2004 2195 /* tcam_data2 ~ tcam_data7 */ 2005 2196 req = (__le32 *)req2->tcam_data; 2006 2197 for (i = 0; i < 6; i++) 2007 2007 - pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, 2008 2008 - "%08x\n", le32_to_cpu(*req++)); 2198 2198 + seq_printf(s, "%08x\n", le32_to_cpu(*req++)); 2009 2199 2010 2200 /* tcam_data8 ~ tcam_data12 */ 2011 2201 req = (__le32 *)req3->tcam_data; 2012 2202 for (i = 0; i < 5; i++) 2013 2013 - pos += scnprintf(tcam_buf + pos, HCLGE_DBG_TCAM_BUF_SIZE - pos, 2014 2014 - "%08x\n", le32_to_cpu(*req++)); 2203 2203 + seq_printf(s, "%08x\n", le32_to_cpu(*req++)); 2015 2204 2016 2205 return ret; 2017 2206 } ··· 2031 2228 return cnt; 2032 2229 } 2033 2230 2034 2034 - static int hclge_dbg_dump_fd_tcam(struct hclge_dev *hdev, char *buf, int len) 2231 2231 + static int hclge_dbg_dump_fd_tcam(struct seq_file *s, void *data) 2035 2232 { 2036 2036 - u32 rule_num = hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]; 2233 2233 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2037 2234 struct hclge_dbg_tcam_msg tcam_msg; 2038 2235 int i, ret, rule_cnt; 2039 2236 u16 *rule_locs; 2040 2040 - char *tcam_buf; 2041 2041 - int pos = 0; 2237 2237 + u32 rule_num; 2042 2238 2043 2239 if (!hnae3_ae_dev_fd_supported(hdev->ae_dev)) { 2044 2240 dev_err(&hdev->pdev->dev, ··· 2045 2243 return -EOPNOTSUPP; 2046 2244 } 2047 2245 2246 2246 + rule_num = hdev->fd_cfg.rule_num[HCLGE_FD_STAGE_1]; 2048 2247 if (!hdev->hclge_fd_rule_num || !rule_num) 2049 2248 return 0; 2050 2249 2051 2250 rule_locs = kcalloc(rule_num, sizeof(u16), GFP_KERNEL); 2052 2251 if (!rule_locs) 2053 2252 return -ENOMEM; 2054 2054 - 2055 2055 - tcam_buf = kzalloc(HCLGE_DBG_TCAM_BUF_SIZE, GFP_KERNEL); 2056 2056 - if (!tcam_buf) { 2057 2057 - kfree(rule_locs); 2058 2058 - return -ENOMEM; 2059 2059 - } 2060 2253 2061 2254 rule_cnt = hclge_dbg_get_rules_location(hdev, rule_locs); 2062 2255 if (rule_cnt < 0) { ··· 2066 2269 tcam_msg.stage = HCLGE_FD_STAGE_1; 2067 2270 tcam_msg.loc = rule_locs[i]; 2068 2271 2069 2069 - ret = hclge_dbg_fd_tcam_read(hdev, true, tcam_buf, tcam_msg); 2272 2272 + ret = hclge_dbg_fd_tcam_read(hdev, true, s, tcam_msg); 2070 2273 if (ret) { 2071 2274 dev_err(&hdev->pdev->dev, 2072 2275 "failed to get fd tcam key x, ret = %d\n", ret); 2073 2276 goto out; 2074 2277 } 2075 2278 2076 2076 - pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf); 2077 2077 - 2078 2078 - ret = hclge_dbg_fd_tcam_read(hdev, false, tcam_buf, tcam_msg); 2279 2279 + ret = hclge_dbg_fd_tcam_read(hdev, false, s, tcam_msg); 2079 2280 if (ret) { 2080 2281 dev_err(&hdev->pdev->dev, 2081 2282 "failed to get fd tcam key y, ret = %d\n", ret); 2082 2283 goto out; 2083 2284 } 2084 2285 2085 2085 - pos += scnprintf(buf + pos, len - pos, "%s", tcam_buf); 2086 2286 } 2087 2287 2088 2288 out: 2089 2089 - kfree(tcam_buf); 2090 2289 kfree(rule_locs); 2091 2290 return ret; 2092 2291 } 2093 2292 2094 2094 - static int hclge_dbg_dump_fd_counter(struct hclge_dev *hdev, char *buf, int len) 2293 2293 + static int hclge_dbg_dump_fd_counter(struct seq_file *s, void *data) 2095 2294 { 2295 2295 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2096 2296 u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */ 2097 2297 struct hclge_fd_ad_cnt_read_cmd *req; 2098 2298 char str_id[HCLGE_DBG_ID_LEN]; 2099 2299 struct hclge_desc desc; 2100 2100 - int pos = 0; 2101 2300 int ret; 2102 2301 u64 cnt; 2103 2302 u8 i; ··· 2101 2308 if (!hnae3_ae_dev_fd_supported(hdev->ae_dev)) 2102 2309 return -EOPNOTSUPP; 2103 2310 2104 2104 - pos += scnprintf(buf + pos, len - pos, 2105 2105 - "func_id\thit_times\n"); 2311 2311 + seq_puts(s, "func_id\thit_times\n"); 2106 2312 2107 2313 for (i = 0; i < func_num; i++) { 2108 2314 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_FD_CNT_OP, true); ··· 2115 2323 } 2116 2324 cnt = le64_to_cpu(req->cnt); 2117 2325 hclge_dbg_get_func_id_str(str_id, i); 2118 2118 - pos += scnprintf(buf + pos, len - pos, 2119 2119 - "%s\t%llu\n", str_id, cnt); 2326 2326 + seq_printf(s, "%s\t%llu\n", str_id, cnt); 2120 2327 } 2121 2328 2122 2329 return 0; ··· 2166 2375 return 0; 2167 2376 } 2168 2377 2169 2169 - static int hclge_dbg_dump_serv_info(struct hclge_dev *hdev, char *buf, int len) 2378 2378 + static int hclge_dbg_seq_dump_rst_info(struct seq_file *s, void *data) 2170 2379 { 2380 2380 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2381 2381 + u32 i, offset; 2382 2382 + 2383 2383 + seq_printf(s, "PF reset count: %u\n", hdev->rst_stats.pf_rst_cnt); 2384 2384 + seq_printf(s, "FLR reset count: %u\n", hdev->rst_stats.flr_rst_cnt); 2385 2385 + seq_printf(s, "GLOBAL reset count: %u\n", 2386 2386 + hdev->rst_stats.global_rst_cnt); 2387 2387 + seq_printf(s, "IMP reset count: %u\n", hdev->rst_stats.imp_rst_cnt); 2388 2388 + seq_printf(s, "reset done count: %u\n", hdev->rst_stats.reset_done_cnt); 2389 2389 + seq_printf(s, "HW reset done count: %u\n", 2390 2390 + hdev->rst_stats.hw_reset_done_cnt); 2391 2391 + seq_printf(s, "reset count: %u\n", hdev->rst_stats.reset_cnt); 2392 2392 + seq_printf(s, "reset fail count: %u\n", hdev->rst_stats.reset_fail_cnt); 2393 2393 + 2394 2394 + for (i = 0; i < ARRAY_SIZE(hclge_dbg_rst_info); i++) { 2395 2395 + offset = hclge_dbg_rst_info[i].offset; 2396 2396 + seq_printf(s, "%s: 0x%x\n", 2397 2397 + hclge_dbg_rst_info[i].message, 2398 2398 + hclge_read_dev(&hdev->hw, offset)); 2399 2399 + } 2400 2400 + 2401 2401 + seq_printf(s, "hdev state: 0x%lx\n", hdev->state); 2402 2402 + 2403 2403 + return 0; 2404 2404 + } 2405 2405 + 2406 2406 + static int hclge_dbg_dump_serv_info(struct seq_file *s, void *data) 2407 2407 + { 2408 2408 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2171 2409 unsigned long rem_nsec; 2172 2172 - int pos = 0; 2173 2410 u64 lc; 2174 2411 2175 2412 lc = local_clock(); 2176 2413 rem_nsec = do_div(lc, HCLGE_BILLION_NANO_SECONDS); 2177 2414 2178 2178 - pos += scnprintf(buf + pos, len - pos, "local_clock: [%5lu.%06lu]\n", 2179 2179 - (unsigned long)lc, rem_nsec / 1000); 2180 2180 - pos += scnprintf(buf + pos, len - pos, "delta: %u(ms)\n", 2181 2181 - jiffies_to_msecs(jiffies - hdev->last_serv_processed)); 2182 2182 - pos += scnprintf(buf + pos, len - pos, 2183 2183 - "last_service_task_processed: %lu(jiffies)\n", 2184 2184 - hdev->last_serv_processed); 2185 2185 - pos += scnprintf(buf + pos, len - pos, "last_service_task_cnt: %lu\n", 2186 2186 - hdev->serv_processed_cnt); 2415 2415 + seq_printf(s, "local_clock: [%5lu.%06lu]\n", 2416 2416 + (unsigned long)lc, rem_nsec / 1000); 2417 2417 + seq_printf(s, "delta: %u(ms)\n", 2418 2418 + jiffies_to_msecs(jiffies - hdev->last_serv_processed)); 2419 2419 + seq_printf(s, "last_service_task_processed: %lu(jiffies)\n", 2420 2420 + hdev->last_serv_processed); 2421 2421 + seq_printf(s, "last_service_task_cnt: %lu\n", hdev->serv_processed_cnt); 2187 2422 2188 2423 return 0; 2189 2424 } 2190 2425 2191 2191 - static int hclge_dbg_dump_interrupt(struct hclge_dev *hdev, char *buf, int len) 2426 2426 + static int hclge_dbg_dump_interrupt(struct seq_file *s, void *data) 2192 2427 { 2193 2193 - int pos = 0; 2428 2428 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2194 2429 2195 2195 - pos += scnprintf(buf + pos, len - pos, "num_nic_msi: %u\n", 2196 2196 - hdev->num_nic_msi); 2197 2197 - pos += scnprintf(buf + pos, len - pos, "num_roce_msi: %u\n", 2198 2198 - hdev->num_roce_msi); 2199 2199 - pos += scnprintf(buf + pos, len - pos, "num_msi_used: %u\n", 2200 2200 - hdev->num_msi_used); 2201 2201 - pos += scnprintf(buf + pos, len - pos, "num_msi_left: %u\n", 2202 2202 - hdev->num_msi_left); 2430 2430 + seq_printf(s, "num_nic_msi: %u\n", hdev->num_nic_msi); 2431 2431 + seq_printf(s, "num_roce_msi: %u\n", hdev->num_roce_msi); 2432 2432 + seq_printf(s, "num_msi_used: %u\n", hdev->num_msi_used); 2433 2433 + seq_printf(s, "num_msi_left: %u\n", hdev->num_msi_left); 2203 2434 2204 2435 return 0; 2205 2436 } 2206 2437 2207 2207 - static void hclge_dbg_imp_info_data_print(struct hclge_desc *desc_src, 2208 2208 - char *buf, int len, u32 bd_num) 2438 2438 + static void hclge_dbg_imp_info_data_print(struct seq_file *s, 2439 2439 + struct hclge_desc *desc_src, 2440 2440 + u32 bd_num) 2209 2441 { 2210 2442 #define HCLGE_DBG_IMP_INFO_PRINT_OFFSET 0x2 2211 2443 2212 2444 struct hclge_desc *desc_index = desc_src; 2213 2445 u32 offset = 0; 2214 2214 - int pos = 0; 2215 2446 u32 i, j; 2216 2447 2217 2217 - pos += scnprintf(buf + pos, len - pos, "offset | data\n"); 2448 2448 + seq_puts(s, "offset | data\n"); 2218 2449 2219 2450 for (i = 0; i < bd_num; i++) { 2220 2451 j = 0; 2221 2452 while (j < HCLGE_DESC_DATA_LEN - 1) { 2222 2222 - pos += scnprintf(buf + pos, len - pos, "0x%04x | ", 2223 2223 - offset); 2224 2224 - pos += scnprintf(buf + pos, len - pos, "0x%08x ", 2225 2225 - le32_to_cpu(desc_index->data[j++])); 2226 2226 - pos += scnprintf(buf + pos, len - pos, "0x%08x\n", 2227 2227 - le32_to_cpu(desc_index->data[j++])); 2453 2453 + seq_printf(s, "0x%04x | ", offset); 2454 2454 + seq_printf(s, "0x%08x ", 2455 2455 + le32_to_cpu(desc_index->data[j++])); 2456 2456 + seq_printf(s, "0x%08x\n", 2457 2457 + le32_to_cpu(desc_index->data[j++])); 2228 2458 offset += sizeof(u32) * HCLGE_DBG_IMP_INFO_PRINT_OFFSET; 2229 2459 } 2230 2460 desc_index++; 2231 2461 } 2232 2462 } 2233 2463 2234 2234 - static int 2235 2235 - hclge_dbg_get_imp_stats_info(struct hclge_dev *hdev, char *buf, int len) 2464 2464 + static int hclge_dbg_get_imp_stats_info(struct seq_file *s, void *data) 2236 2465 { 2466 2466 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2237 2467 struct hclge_get_imp_bd_cmd *req; 2238 2468 struct hclge_desc *desc_src; 2239 2469 struct hclge_desc desc; ··· 2291 2479 return ret; 2292 2480 } 2293 2481 2294 2294 - hclge_dbg_imp_info_data_print(desc_src, buf, len, bd_num); 2482 2482 + hclge_dbg_imp_info_data_print(s, desc_src, bd_num); 2295 2483 2296 2484 kfree(desc_src); 2297 2485 ··· 2302 2490 #define HCLGE_MAX_NCL_CONFIG_LENGTH 16384 2303 2491 2304 2492 static void hclge_ncl_config_data_print(struct hclge_desc *desc, int *index, 2305 2305 - char *buf, int len, int *pos) 2493 2493 + struct seq_file *s) 2306 2494 { 2307 2495 #define HCLGE_CMD_DATA_NUM 6 2308 2496 ··· 2314 2502 if (i == 0 && j == 0) 2315 2503 continue; 2316 2504 2317 2317 - *pos += scnprintf(buf + *pos, len - *pos, 2318 2318 - "0x%04x | 0x%08x\n", offset, 2319 2319 - le32_to_cpu(desc[i].data[j])); 2505 2505 + seq_printf(s, "0x%04x | 0x%08x\n", offset, 2506 2506 + le32_to_cpu(desc[i].data[j])); 2320 2507 2321 2508 offset += sizeof(u32); 2322 2509 *index -= sizeof(u32); ··· 2326 2515 } 2327 2516 } 2328 2517 2329 2329 - static int 2330 2330 - hclge_dbg_dump_ncl_config(struct hclge_dev *hdev, char *buf, int len) 2518 2518 + static int hclge_dbg_dump_ncl_config(struct seq_file *s, void *data) 2331 2519 { 2332 2520 #define HCLGE_NCL_CONFIG_LENGTH_IN_EACH_CMD (20 + 24 * 4) 2333 2521 2334 2522 struct hclge_desc desc[HCLGE_CMD_NCL_CONFIG_BD_NUM]; 2523 2523 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2335 2524 int bd_num = HCLGE_CMD_NCL_CONFIG_BD_NUM; 2336 2525 int index = HCLGE_MAX_NCL_CONFIG_LENGTH; 2337 2337 - int pos = 0; 2338 2526 u32 data0; 2339 2527 int ret; 2340 2528 2341 2341 - pos += scnprintf(buf + pos, len - pos, "offset | data\n"); 2529 2529 + seq_puts(s, "offset | data\n"); 2342 2530 2343 2531 while (index > 0) { 2344 2532 data0 = HCLGE_MAX_NCL_CONFIG_LENGTH - index; ··· 2350 2540 if (ret) 2351 2541 return ret; 2352 2542 2353 2353 - hclge_ncl_config_data_print(desc, &index, buf, len, &pos); 2543 2543 + hclge_ncl_config_data_print(desc, &index, s); 2354 2544 } 2355 2545 2356 2546 return 0; 2357 2547 } 2358 2548 2359 2359 - static int hclge_dbg_dump_loopback(struct hclge_dev *hdev, char *buf, int len) 2549 2549 + static int hclge_dbg_dump_loopback(struct seq_file *s, void *data) 2360 2550 { 2551 2551 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2361 2552 struct phy_device *phydev = hdev->hw.mac.phydev; 2362 2553 struct hclge_config_mac_mode_cmd *req_app; 2363 2554 struct hclge_common_lb_cmd *req_common; 2364 2555 struct hclge_desc desc; 2365 2556 u8 loopback_en; 2366 2366 - int pos = 0; 2367 2557 int ret; 2368 2558 2369 2559 req_app = (struct hclge_config_mac_mode_cmd *)desc.data; 2370 2560 req_common = (struct hclge_common_lb_cmd *)desc.data; 2371 2561 2372 2372 - pos += scnprintf(buf + pos, len - pos, "mac id: %u\n", 2373 2373 - hdev->hw.mac.mac_id); 2562 2562 + seq_printf(s, "mac id: %u\n", hdev->hw.mac.mac_id); 2374 2563 2375 2564 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_CONFIG_MAC_MODE, true); 2376 2565 ret = hclge_cmd_send(&hdev->hw, &desc, 1); ··· 2381 2572 2382 2573 loopback_en = hnae3_get_bit(le32_to_cpu(req_app->txrx_pad_fcs_loop_en), 2383 2574 HCLGE_MAC_APP_LP_B); 2384 2384 - pos += scnprintf(buf + pos, len - pos, "app loopback: %s\n", 2385 2385 - str_on_off(loopback_en)); 2575 2575 + seq_printf(s, "app loopback: %s\n", str_on_off(loopback_en)); 2386 2576 2387 2577 hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_COMMON_LOOPBACK, true); 2388 2578 ret = hclge_cmd_send(&hdev->hw, &desc, 1); ··· 2392 2584 return ret; 2393 2585 } 2394 2586 2395 2395 - loopback_en = req_common->enable & HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B; 2396 2396 - pos += scnprintf(buf + pos, len - pos, "serdes serial loopback: %s\n", 2397 2397 - str_on_off(loopback_en)); 2587 2587 + loopback_en = req_common->enable & 2588 2588 + HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B; 2589 2589 + seq_printf(s, "serdes serial loopback: %s\n", str_on_off(loopback_en)); 2398 2590 2399 2591 loopback_en = req_common->enable & 2400 2400 - HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B ? 1 : 0; 2401 2401 - pos += scnprintf(buf + pos, len - pos, "serdes parallel loopback: %s\n", 2402 2402 - str_on_off(loopback_en)); 2592 2592 + HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B ? 1 : 0; 2593 2593 + seq_printf(s, "serdes parallel loopback: %s\n", 2594 2594 + str_on_off(loopback_en)); 2403 2595 2404 2596 if (phydev) { 2405 2597 loopback_en = phydev->loopback_enabled; 2406 2406 - pos += scnprintf(buf + pos, len - pos, "phy loopback: %s\n", 2407 2407 - str_on_off(loopback_en)); 2598 2598 + seq_printf(s, "phy loopback: %s\n", str_on_off(loopback_en)); 2408 2599 } else if (hnae3_dev_phy_imp_supported(hdev)) { 2409 2600 loopback_en = req_common->enable & 2410 2601 HCLGE_CMD_GE_PHY_INNER_LOOP_B; 2411 2411 - pos += scnprintf(buf + pos, len - pos, "phy loopback: %s\n", 2412 2412 - str_on_off(loopback_en)); 2602 2602 + seq_printf(s, "phy loopback: %s\n", str_on_off(loopback_en)); 2413 2603 } 2414 2604 2415 2605 return 0; ··· 2416 2610 /* hclge_dbg_dump_mac_tnl_status: print message about mac tnl interrupt 2417 2611 * @hdev: pointer to struct hclge_dev 2418 2612 */ 2419 2419 - static int 2420 2420 - hclge_dbg_dump_mac_tnl_status(struct hclge_dev *hdev, char *buf, int len) 2613 2613 + static int hclge_dbg_dump_mac_tnl_status(struct seq_file *s, void *data) 2421 2614 { 2615 2615 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2422 2616 struct hclge_mac_tnl_stats stats; 2423 2617 unsigned long rem_nsec; 2424 2424 - int pos = 0; 2425 2618 2426 2426 - pos += scnprintf(buf + pos, len - pos, 2427 2427 - "Recently generated mac tnl interruption:\n"); 2619 2619 + seq_puts(s, "Recently generated mac tnl interruption:\n"); 2428 2620 2429 2621 while (kfifo_get(&hdev->mac_tnl_log, &stats)) { 2430 2622 rem_nsec = do_div(stats.time, HCLGE_BILLION_NANO_SECONDS); 2431 2623 2432 2432 - pos += scnprintf(buf + pos, len - pos, 2433 2433 - "[%07lu.%03lu] status = 0x%x\n", 2434 2434 - (unsigned long)stats.time, rem_nsec / 1000, 2435 2435 - stats.status); 2624 2624 + seq_printf(s, "[%07lu.%03lu] status = 0x%x\n", 2625 2625 + (unsigned long)stats.time, rem_nsec / 1000, 2626 2626 + stats.status); 2436 2627 } 2437 2628 2438 2629 return 0; 2439 2630 } 2440 2631 2441 2441 - 2442 2442 - static const struct hclge_dbg_item mac_list_items[] = { 2443 2443 - { "FUNC_ID", 2 }, 2444 2444 - { "MAC_ADDR", 12 }, 2445 2445 - { "STATE", 2 }, 2446 2446 - }; 2447 2447 - 2448 2448 - static void hclge_dbg_dump_mac_list(struct hclge_dev *hdev, char *buf, int len, 2449 2449 - bool is_unicast) 2632 2632 + static void hclge_dbg_dump_mac_list(struct seq_file *s, bool is_unicast) 2450 2633 { 2451 2451 - char data_str[ARRAY_SIZE(mac_list_items)][HCLGE_DBG_DATA_STR_LEN]; 2452 2452 - char content[HCLGE_DBG_INFO_LEN], str_id[HCLGE_DBG_ID_LEN]; 2453 2453 - char *result[ARRAY_SIZE(mac_list_items)]; 2634 2634 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2454 2635 struct hclge_mac_node *mac_node, *tmp; 2455 2636 struct hclge_vport *vport; 2456 2637 struct list_head *list; 2457 2457 - u32 func_id, i; 2458 2458 - int pos = 0; 2638 2638 + u32 func_id; 2459 2639 2460 2460 - for (i = 0; i < ARRAY_SIZE(mac_list_items); i++) 2461 2461 - result[i] = &data_str[i][0]; 2462 2462 - 2463 2463 - pos += scnprintf(buf + pos, len - pos, "%s MAC_LIST:\n", 2464 2464 - is_unicast ? "UC" : "MC"); 2465 2465 - hclge_dbg_fill_content(content, sizeof(content), mac_list_items, 2466 2466 - NULL, ARRAY_SIZE(mac_list_items)); 2467 2467 - pos += scnprintf(buf + pos, len - pos, "%s", content); 2640 2640 + seq_printf(s, "%s MAC_LIST:\n", is_unicast ? "UC" : "MC"); 2641 2641 + seq_puts(s, "FUNC_ID MAC_ADDR STATE\n"); 2468 2642 2469 2643 for (func_id = 0; func_id < hdev->num_alloc_vport; func_id++) { 2470 2644 vport = &hdev->vport[func_id]; 2471 2645 list = is_unicast ? &vport->uc_mac_list : &vport->mc_mac_list; 2472 2646 spin_lock_bh(&vport->mac_list_lock); 2473 2647 list_for_each_entry_safe(mac_node, tmp, list, node) { 2474 2474 - i = 0; 2475 2475 - result[i++] = hclge_dbg_get_func_id_str(str_id, 2476 2476 - func_id); 2477 2477 - sprintf(result[i++], "%pM", mac_node->mac_addr); 2478 2478 - sprintf(result[i++], "%5s", 2479 2479 - hclge_mac_state_str[mac_node->state]); 2480 2480 - hclge_dbg_fill_content(content, sizeof(content), 2481 2481 - mac_list_items, 2482 2482 - (const char **)result, 2483 2483 - ARRAY_SIZE(mac_list_items)); 2484 2484 - pos += scnprintf(buf + pos, len - pos, "%s", content); 2648 2648 + if (func_id) 2649 2649 + seq_printf(s, "vf%-7u", func_id - 1U); 2650 2650 + else 2651 2651 + seq_puts(s, "pf "); 2652 2652 + seq_printf(s, "%pM ", mac_node->mac_addr); 2653 2653 + seq_printf(s, "%5s\n", 2654 2654 + hclge_mac_state_str[mac_node->state]); 2485 2655 } 2486 2656 spin_unlock_bh(&vport->mac_list_lock); 2487 2657 } 2488 2658 } 2489 2659 2490 2490 - static int hclge_dbg_dump_umv_info(struct hclge_dev *hdev, char *buf, int len) 2660 2660 + static int hclge_dbg_dump_umv_info(struct seq_file *s, void *data) 2491 2661 { 2662 2662 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2492 2663 u8 func_num = pci_num_vf(hdev->pdev) + 1; 2493 2664 struct hclge_vport *vport; 2494 2494 - int pos = 0; 2495 2665 u8 i; 2496 2666 2497 2497 - pos += scnprintf(buf, len, "num_alloc_vport : %u\n", 2498 2498 - hdev->num_alloc_vport); 2499 2499 - pos += scnprintf(buf + pos, len - pos, "max_umv_size : %u\n", 2500 2500 - hdev->max_umv_size); 2501 2501 - pos += scnprintf(buf + pos, len - pos, "wanted_umv_size : %u\n", 2502 2502 - hdev->wanted_umv_size); 2503 2503 - pos += scnprintf(buf + pos, len - pos, "priv_umv_size : %u\n", 2504 2504 - hdev->priv_umv_size); 2667 2667 + seq_printf(s, "num_alloc_vport : %u\n", hdev->num_alloc_vport); 2668 2668 + seq_printf(s, "max_umv_size : %u\n", hdev->max_umv_size); 2669 2669 + seq_printf(s, "wanted_umv_size : %u\n", hdev->wanted_umv_size); 2670 2670 + seq_printf(s, "priv_umv_size : %u\n", hdev->priv_umv_size); 2505 2671 2506 2672 mutex_lock(&hdev->vport_lock); 2507 2507 - pos += scnprintf(buf + pos, len - pos, "share_umv_size : %u\n", 2508 2508 - hdev->share_umv_size); 2673 2673 + seq_printf(s, "share_umv_size : %u\n", hdev->share_umv_size); 2509 2674 for (i = 0; i < func_num; i++) { 2510 2675 vport = &hdev->vport[i]; 2511 2511 - pos += scnprintf(buf + pos, len - pos, 2512 2512 - "vport(%u) used_umv_num : %u\n", 2513 2513 - i, vport->used_umv_num); 2676 2676 + seq_printf(s, "vport(%u) used_umv_num : %u\n", 2677 2677 + i, vport->used_umv_num); 2514 2678 } 2515 2679 mutex_unlock(&hdev->vport_lock); 2516 2680 2517 2517 - pos += scnprintf(buf + pos, len - pos, "used_mc_mac_num : %u\n", 2518 2518 - hdev->used_mc_mac_num); 2681 2681 + seq_printf(s, "used_mc_mac_num : %u\n", hdev->used_mc_mac_num); 2519 2682 2520 2683 return 0; 2521 2684 } ··· 2626 2851 return 0; 2627 2852 } 2628 2853 2629 2629 - static const struct hclge_dbg_item vlan_filter_items[] = { 2630 2630 - { "FUNC_ID", 2 }, 2631 2631 - { "I_VF_VLAN_FILTER", 2 }, 2632 2632 - { "E_VF_VLAN_FILTER", 2 }, 2633 2633 - { "PORT_VLAN_FILTER_BYPASS", 0 } 2634 2634 - }; 2635 2635 - 2636 2636 - static const struct hclge_dbg_item vlan_offload_items[] = { 2637 2637 - { "FUNC_ID", 2 }, 2638 2638 - { "PVID", 4 }, 2639 2639 - { "ACCEPT_TAG1", 2 }, 2640 2640 - { "ACCEPT_TAG2", 2 }, 2641 2641 - { "ACCEPT_UNTAG1", 2 }, 2642 2642 - { "ACCEPT_UNTAG2", 2 }, 2643 2643 - { "INSERT_TAG1", 2 }, 2644 2644 - { "INSERT_TAG2", 2 }, 2645 2645 - { "SHIFT_TAG", 2 }, 2646 2646 - { "STRIP_TAG1", 2 }, 2647 2647 - { "STRIP_TAG2", 2 }, 2648 2648 - { "DROP_TAG1", 2 }, 2649 2649 - { "DROP_TAG2", 2 }, 2650 2650 - { "PRI_ONLY_TAG1", 2 }, 2651 2651 - { "PRI_ONLY_TAG2", 0 } 2652 2652 - }; 2653 2653 - 2654 2654 - static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, char *buf, 2655 2655 - int len, int *pos) 2854 2854 + static int hclge_dbg_dump_vlan_filter_config(struct hclge_dev *hdev, 2855 2855 + struct seq_file *s) 2656 2856 { 2657 2657 - char content[HCLGE_DBG_VLAN_FLTR_INFO_LEN], str_id[HCLGE_DBG_ID_LEN]; 2658 2658 - const char *result[ARRAY_SIZE(vlan_filter_items)]; 2659 2659 - u8 i, j, vlan_fe, bypass, ingress, egress; 2660 2857 u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */ 2858 2858 + u8 i, vlan_fe, bypass, ingress, egress; 2859 2859 + char str_id[HCLGE_DBG_ID_LEN]; 2661 2860 int ret; 2662 2861 2663 2862 ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_PORT, 0, ··· 2641 2892 ingress = vlan_fe & HCLGE_FILTER_FE_NIC_INGRESS_B; 2642 2893 egress = vlan_fe & HCLGE_FILTER_FE_NIC_EGRESS_B ? 1 : 0; 2643 2894 2644 2644 - *pos += scnprintf(buf, len, "I_PORT_VLAN_FILTER: %s\n", 2645 2645 - str_on_off(ingress)); 2646 2646 - *pos += scnprintf(buf + *pos, len - *pos, "E_PORT_VLAN_FILTER: %s\n", 2647 2647 - str_on_off(egress)); 2895 2895 + seq_printf(s, "I_PORT_VLAN_FILTER: %s\n", str_on_off(ingress)); 2896 2896 + seq_printf(s, "E_PORT_VLAN_FILTER: %s\n", str_on_off(egress)); 2648 2897 2649 2649 - hclge_dbg_fill_content(content, sizeof(content), vlan_filter_items, 2650 2650 - NULL, ARRAY_SIZE(vlan_filter_items)); 2651 2651 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 2898 2898 + seq_puts(s, "FUNC_ID I_VF_VLAN_FILTER E_VF_VLAN_FILTER "); 2899 2899 + seq_puts(s, "PORT_VLAN_FILTER_BYPASS\n"); 2652 2900 2653 2901 for (i = 0; i < func_num; i++) { 2654 2902 ret = hclge_get_vlan_filter_state(hdev, HCLGE_FILTER_TYPE_VF, i, ··· 2658 2912 ret = hclge_get_port_vlan_filter_bypass_state(hdev, i, &bypass); 2659 2913 if (ret) 2660 2914 return ret; 2661 2661 - j = 0; 2662 2662 - result[j++] = hclge_dbg_get_func_id_str(str_id, i); 2663 2663 - result[j++] = str_on_off(ingress); 2664 2664 - result[j++] = str_on_off(egress); 2665 2665 - result[j++] = test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B, 2666 2666 - hdev->ae_dev->caps) ? 2667 2667 - str_on_off(bypass) : "NA"; 2668 2668 - hclge_dbg_fill_content(content, sizeof(content), 2669 2669 - vlan_filter_items, result, 2670 2670 - ARRAY_SIZE(vlan_filter_items)); 2671 2671 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 2915 2915 + 2916 2916 + seq_printf(s, "%-9s%-18s%-18s%s\n", 2917 2917 + hclge_dbg_get_func_id_str(str_id, i), 2918 2918 + str_on_off(ingress), str_on_off(egress), 2919 2919 + test_bit(HNAE3_DEV_SUPPORT_PORT_VLAN_BYPASS_B, 2920 2920 + hdev->ae_dev->caps) ? 2921 2921 + str_on_off(bypass) : "NA"); 2672 2922 } 2673 2673 - *pos += scnprintf(buf + *pos, len - *pos, "\n"); 2923 2923 + seq_puts(s, "\n"); 2674 2924 2675 2925 return 0; 2676 2926 } 2677 2927 2678 2678 - static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev, char *buf, 2679 2679 - int len, int *pos) 2928 2928 + static int hclge_dbg_dump_vlan_offload_config(struct hclge_dev *hdev, 2929 2929 + struct seq_file *s) 2680 2930 { 2681 2681 - char str_id[HCLGE_DBG_ID_LEN], str_pvid[HCLGE_DBG_ID_LEN]; 2682 2682 - const char *result[ARRAY_SIZE(vlan_offload_items)]; 2683 2683 - char content[HCLGE_DBG_VLAN_OFFLOAD_INFO_LEN]; 2684 2931 u8 func_num = pci_num_vf(hdev->pdev) + 1; /* pf and enabled vf num */ 2685 2932 struct hclge_dbg_vlan_cfg vlan_cfg; 2933 2933 + char str_id[HCLGE_DBG_ID_LEN]; 2686 2934 int ret; 2687 2687 - u8 i, j; 2935 2935 + u8 i; 2688 2936 2689 2689 - hclge_dbg_fill_content(content, sizeof(content), vlan_offload_items, 2690 2690 - NULL, ARRAY_SIZE(vlan_offload_items)); 2691 2691 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 2937 2937 + seq_puts(s, "FUNC_ID PVID ACCEPT_TAG1 ACCEPT_TAG2 ACCEPT_UNTAG1 "); 2938 2938 + seq_puts(s, "ACCEPT_UNTAG2 INSERT_TAG1 INSERT_TAG2 SHIFT_TAG "); 2939 2939 + seq_puts(s, "STRIP_TAG1 STRIP_TAG2 DROP_TAG1 DROP_TAG2 "); 2940 2940 + seq_puts(s, "PRI_ONLY_TAG1 PRI_ONLY_TAG2\n"); 2692 2941 2693 2942 for (i = 0; i < func_num; i++) { 2694 2943 ret = hclge_get_vlan_tx_offload_cfg(hdev, i, &vlan_cfg); ··· 2694 2953 if (ret) 2695 2954 return ret; 2696 2955 2697 2697 - sprintf(str_pvid, "%u", vlan_cfg.pvid); 2698 2698 - j = 0; 2699 2699 - result[j++] = hclge_dbg_get_func_id_str(str_id, i); 2700 2700 - result[j++] = str_pvid; 2701 2701 - result[j++] = str_on_off(vlan_cfg.accept_tag1); 2702 2702 - result[j++] = str_on_off(vlan_cfg.accept_tag2); 2703 2703 - result[j++] = str_on_off(vlan_cfg.accept_untag1); 2704 2704 - result[j++] = str_on_off(vlan_cfg.accept_untag2); 2705 2705 - result[j++] = str_on_off(vlan_cfg.insert_tag1); 2706 2706 - result[j++] = str_on_off(vlan_cfg.insert_tag2); 2707 2707 - result[j++] = str_on_off(vlan_cfg.shift_tag); 2708 2708 - result[j++] = str_on_off(vlan_cfg.strip_tag1); 2709 2709 - result[j++] = str_on_off(vlan_cfg.strip_tag2); 2710 2710 - result[j++] = str_on_off(vlan_cfg.drop_tag1); 2711 2711 - result[j++] = str_on_off(vlan_cfg.drop_tag2); 2712 2712 - result[j++] = str_on_off(vlan_cfg.pri_only1); 2713 2713 - result[j++] = str_on_off(vlan_cfg.pri_only2); 2714 2714 - 2715 2715 - hclge_dbg_fill_content(content, sizeof(content), 2716 2716 - vlan_offload_items, result, 2717 2717 - ARRAY_SIZE(vlan_offload_items)); 2718 2718 - *pos += scnprintf(buf + *pos, len - *pos, "%s", content); 2956 2956 + seq_printf(s, "%-9s", hclge_dbg_get_func_id_str(str_id, i)); 2957 2957 + seq_printf(s, "%-6u", vlan_cfg.pvid); 2958 2958 + seq_printf(s, "%-13s", str_on_off(vlan_cfg.accept_tag1)); 2959 2959 + seq_printf(s, "%-12s", str_on_off(vlan_cfg.accept_tag2)); 2960 2960 + seq_printf(s, "%-15s", str_on_off(vlan_cfg.accept_untag1)); 2961 2961 + seq_printf(s, "%-15s", str_on_off(vlan_cfg.accept_untag2)); 2962 2962 + seq_printf(s, "%-13s", str_on_off(vlan_cfg.insert_tag1)); 2963 2963 + seq_printf(s, "%-13s", str_on_off(vlan_cfg.insert_tag2)); 2964 2964 + seq_printf(s, "%-11s", str_on_off(vlan_cfg.shift_tag)); 2965 2965 + seq_printf(s, "%-12s", str_on_off(vlan_cfg.strip_tag1)); 2966 2966 + seq_printf(s, "%-12s", str_on_off(vlan_cfg.strip_tag2)); 2967 2967 + seq_printf(s, "%-11s", str_on_off(vlan_cfg.drop_tag1)); 2968 2968 + seq_printf(s, "%-11s", str_on_off(vlan_cfg.drop_tag2)); 2969 2969 + seq_printf(s, "%-15s", str_on_off(vlan_cfg.pri_only1)); 2970 2970 + seq_printf(s, "%s\n", str_on_off(vlan_cfg.pri_only2)); 2719 2971 } 2720 2972 2721 2973 return 0; 2722 2974 } 2723 2975 2724 2724 - static int hclge_dbg_dump_vlan_config(struct hclge_dev *hdev, char *buf, 2725 2725 - int len) 2976 2976 + static int hclge_dbg_dump_vlan_config(struct seq_file *s, void *data) 2726 2977 { 2727 2727 - int pos = 0; 2978 2978 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2728 2979 int ret; 2729 2980 2730 2730 - ret = hclge_dbg_dump_vlan_filter_config(hdev, buf, len, &pos); 2981 2981 + ret = hclge_dbg_dump_vlan_filter_config(hdev, s); 2731 2982 if (ret) 2732 2983 return ret; 2733 2984 2734 2734 - return hclge_dbg_dump_vlan_offload_config(hdev, buf, len, &pos); 2985 2985 + return hclge_dbg_dump_vlan_offload_config(hdev, s); 2735 2986 } 2736 2987 2737 2737 - static int hclge_dbg_dump_ptp_info(struct hclge_dev *hdev, char *buf, int len) 2988 2988 + static int hclge_dbg_dump_ptp_info(struct seq_file *s, void *data) 2738 2989 { 2990 2990 + struct hclge_dev *hdev = hclge_seq_file_to_hdev(s); 2739 2991 struct hclge_ptp *ptp = hdev->ptp; 2740 2992 u32 sw_cfg = ptp->ptp_cfg; 2741 2993 unsigned int tx_start; 2742 2994 unsigned int last_rx; 2743 2743 - int pos = 0; 2744 2995 u32 hw_cfg; 2745 2996 int ret; 2746 2997 2747 2747 - pos += scnprintf(buf + pos, len - pos, "phc %s's debug info:\n", 2748 2748 - ptp->info.name); 2749 2749 - pos += scnprintf(buf + pos, len - pos, "ptp enable: %s\n", 2750 2750 - str_yes_no(test_bit(HCLGE_PTP_FLAG_EN, &ptp->flags))); 2751 2751 - pos += scnprintf(buf + pos, len - pos, "ptp tx enable: %s\n", 2752 2752 - str_yes_no(test_bit(HCLGE_PTP_FLAG_TX_EN, 2753 2753 - &ptp->flags))); 2754 2754 - pos += scnprintf(buf + pos, len - pos, "ptp rx enable: %s\n", 2755 2755 - str_yes_no(test_bit(HCLGE_PTP_FLAG_RX_EN, 2756 2756 - &ptp->flags))); 2998 2998 + seq_printf(s, "phc %s's debug info:\n", ptp->info.name); 2999 2999 + seq_printf(s, "ptp enable: %s\n", 3000 3000 + str_yes_no(test_bit(HCLGE_PTP_FLAG_EN, &ptp->flags))); 3001 3001 + seq_printf(s, "ptp tx enable: %s\n", 3002 3002 + str_yes_no(test_bit(HCLGE_PTP_FLAG_TX_EN, &ptp->flags))); 3003 3003 + seq_printf(s, "ptp rx enable: %s\n", 3004 3004 + str_yes_no(test_bit(HCLGE_PTP_FLAG_RX_EN, &ptp->flags))); 2757 3005 2758 3006 last_rx = jiffies_to_msecs(ptp->last_rx); 2759 2759 - pos += scnprintf(buf + pos, len - pos, "last rx time: %lu.%lu\n", 2760 2760 - last_rx / MSEC_PER_SEC, last_rx % MSEC_PER_SEC); 2761 2761 - pos += scnprintf(buf + pos, len - pos, "rx count: %lu\n", ptp->rx_cnt); 3007 3007 + seq_printf(s, "last rx time: %lu.%lu\n", 3008 3008 + last_rx / MSEC_PER_SEC, last_rx % MSEC_PER_SEC); 3009 3009 + seq_printf(s, "rx count: %lu\n", ptp->rx_cnt); 2762 3010 2763 3011 tx_start = jiffies_to_msecs(ptp->tx_start); 2764 2764 - pos += scnprintf(buf + pos, len - pos, "last tx start time: %lu.%lu\n", 2765 2765 - tx_start / MSEC_PER_SEC, tx_start % MSEC_PER_SEC); 2766 2766 - pos += scnprintf(buf + pos, len - pos, "tx count: %lu\n", ptp->tx_cnt); 2767 2767 - pos += scnprintf(buf + pos, len - pos, "tx skipped count: %lu\n", 2768 2768 - ptp->tx_skipped); 2769 2769 - pos += scnprintf(buf + pos, len - pos, "tx timeout count: %lu\n", 2770 2770 - ptp->tx_timeout); 2771 2771 - pos += scnprintf(buf + pos, len - pos, "last tx seqid: %u\n", 2772 2772 - ptp->last_tx_seqid); 3012 3012 + seq_printf(s, "last tx start time: %lu.%lu\n", 3013 3013 + tx_start / MSEC_PER_SEC, tx_start % MSEC_PER_SEC); 3014 3014 + seq_printf(s, "tx count: %lu\n", ptp->tx_cnt); 3015 3015 + seq_printf(s, "tx skipped count: %lu\n", ptp->tx_skipped); 3016 3016 + seq_printf(s, "tx timeout count: %lu\n", ptp->tx_timeout); 3017 3017 + seq_printf(s, "last tx seqid: %u\n", ptp->last_tx_seqid); 3018 3018 + 2773 3019 2774 3020 ret = hclge_ptp_cfg_qry(hdev, &hw_cfg); 2775 3021 if (ret) 2776 3022 return ret; 2777 3023 2778 2778 - pos += scnprintf(buf + pos, len - pos, "sw_cfg: %#x, hw_cfg: %#x\n", 2779 2779 - sw_cfg, hw_cfg); 3024 3024 + seq_printf(s, "sw_cfg: %#x, hw_cfg: %#x\n", sw_cfg, hw_cfg); 2780 3025 2781 2781 - pos += scnprintf(buf + pos, len - pos, "tx type: %d, rx filter: %d\n", 2782 2782 - ptp->ts_cfg.tx_type, ptp->ts_cfg.rx_filter); 2783 2783 - 2784 2784 - return 0; 2785 2785 - } 2786 2786 - 2787 2787 - static int hclge_dbg_dump_mac_uc(struct hclge_dev *hdev, char *buf, int len) 2788 2788 - { 2789 2789 - hclge_dbg_dump_mac_list(hdev, buf, len, true); 3026 3026 + seq_printf(s, "tx type: %d, rx filter: %d\n", 3027 3027 + ptp->ts_cfg.tx_type, ptp->ts_cfg.rx_filter); 2790 3028 2791 3029 return 0; 2792 3030 } 2793 3031 2794 2794 - static int hclge_dbg_dump_mac_mc(struct hclge_dev *hdev, char *buf, int len) 3032 3032 + static int hclge_dbg_dump_mac_uc(struct seq_file *s, void *data) 2795 3033 { 2796 2796 - hclge_dbg_dump_mac_list(hdev, buf, len, false); 3034 3034 + hclge_dbg_dump_mac_list(s, true); 3035 3035 + 3036 3036 + return 0; 3037 3037 + } 3038 3038 + 3039 3039 + static int hclge_dbg_dump_mac_mc(struct seq_file *s, void *data) 3040 3040 + { 3041 3041 + hclge_dbg_dump_mac_list(s, false); 2797 3042 2798 3043 return 0; 2799 3044 } ··· 2787 3060 static const struct hclge_dbg_func hclge_dbg_cmd_func[] = { 2788 3061 { 2789 3062 .cmd = HNAE3_DBG_CMD_TM_NODES, 2790 2790 - .dbg_dump = hclge_dbg_dump_tm_nodes, 3063 3063 + .dbg_read_func = hclge_dbg_dump_tm_nodes, 2791 3064 }, 2792 3065 { 2793 3066 .cmd = HNAE3_DBG_CMD_TM_PRI, 2794 2794 - .dbg_dump = hclge_dbg_dump_tm_pri, 3067 3067 + .dbg_read_func = hclge_dbg_dump_tm_pri, 2795 3068 }, 2796 3069 { 2797 3070 .cmd = HNAE3_DBG_CMD_TM_QSET, 2798 2798 - .dbg_dump = hclge_dbg_dump_tm_qset, 3071 3071 + .dbg_read_func = hclge_dbg_dump_tm_qset, 2799 3072 }, 2800 3073 { 2801 3074 .cmd = HNAE3_DBG_CMD_TM_MAP, 2802 2802 - .dbg_dump = hclge_dbg_dump_tm_map, 3075 3075 + .dbg_read_func = hclge_dbg_dump_tm_map, 2803 3076 }, 2804 3077 { 2805 3078 .cmd = HNAE3_DBG_CMD_TM_PG, 2806 2806 - .dbg_dump = hclge_dbg_dump_tm_pg, 3079 3079 + .dbg_read_func = hclge_dbg_dump_tm_pg, 2807 3080 }, 2808 3081 { 2809 3082 .cmd = HNAE3_DBG_CMD_TM_PORT, 2810 2810 - .dbg_dump = hclge_dbg_dump_tm_port, 3083 3083 + .dbg_read_func = hclge_dbg_dump_tm_port, 2811 3084 }, 2812 3085 { 2813 3086 .cmd = HNAE3_DBG_CMD_TC_SCH_INFO, 2814 2814 - .dbg_dump = hclge_dbg_dump_tc, 3087 3087 + .dbg_read_func = hclge_dbg_dump_tc, 2815 3088 }, 2816 3089 { 2817 3090 .cmd = HNAE3_DBG_CMD_QOS_PAUSE_CFG, 2818 2818 - .dbg_dump = hclge_dbg_dump_qos_pause_cfg, 3091 3091 + .dbg_read_func = hclge_dbg_dump_qos_pause_cfg, 2819 3092 }, 2820 3093 { 2821 3094 .cmd = HNAE3_DBG_CMD_QOS_PRI_MAP, 2822 2822 - .dbg_dump = hclge_dbg_dump_qos_pri_map, 3095 3095 + .dbg_read_func = hclge_dbg_dump_qos_pri_map, 2823 3096 }, 2824 3097 { 2825 3098 .cmd = HNAE3_DBG_CMD_QOS_DSCP_MAP, 2826 2826 - .dbg_dump = hclge_dbg_dump_qos_dscp_map, 3099 3099 + .dbg_read_func = hclge_dbg_dump_qos_dscp_map, 2827 3100 }, 2828 3101 { 2829 3102 .cmd = HNAE3_DBG_CMD_QOS_BUF_CFG, 2830 2830 - .dbg_dump = hclge_dbg_dump_qos_buf_cfg, 3103 3103 + .dbg_read_func = hclge_dbg_dump_qos_buf_cfg, 2831 3104 }, 2832 3105 { 2833 3106 .cmd = HNAE3_DBG_CMD_MAC_UC, 2834 2834 - .dbg_dump = hclge_dbg_dump_mac_uc, 3107 3107 + .dbg_read_func = hclge_dbg_dump_mac_uc, 2835 3108 }, 2836 3109 { 2837 3110 .cmd = HNAE3_DBG_CMD_MAC_MC, 2838 2838 - .dbg_dump = hclge_dbg_dump_mac_mc, 3111 3111 + .dbg_read_func = hclge_dbg_dump_mac_mc, 2839 3112 }, 2840 3113 { 2841 3114 .cmd = HNAE3_DBG_CMD_MNG_TBL, 2842 2842 - .dbg_dump = hclge_dbg_dump_mng_table, 3115 3115 + .dbg_read_func = hclge_dbg_dump_mng_table, 2843 3116 }, 2844 3117 { 2845 3118 .cmd = HNAE3_DBG_CMD_LOOPBACK, 2846 2846 - .dbg_dump = hclge_dbg_dump_loopback, 3119 3119 + .dbg_read_func = hclge_dbg_dump_loopback, 2847 3120 }, 2848 3121 { 2849 3122 .cmd = HNAE3_DBG_CMD_PTP_INFO, 2850 2850 - .dbg_dump = hclge_dbg_dump_ptp_info, 3123 3123 + .dbg_read_func = hclge_dbg_dump_ptp_info, 2851 3124 }, 2852 3125 { 2853 3126 .cmd = HNAE3_DBG_CMD_INTERRUPT_INFO, 2854 2854 - .dbg_dump = hclge_dbg_dump_interrupt, 3127 3127 + .dbg_read_func = hclge_dbg_dump_interrupt, 2855 3128 }, 2856 3129 { 2857 3130 .cmd = HNAE3_DBG_CMD_RESET_INFO, 2858 2858 - .dbg_dump = hclge_dbg_dump_rst_info, 3131 3131 + .dbg_read_func = hclge_dbg_seq_dump_rst_info, 2859 3132 }, 2860 3133 { 2861 3134 .cmd = HNAE3_DBG_CMD_IMP_INFO, 2862 2862 - .dbg_dump = hclge_dbg_get_imp_stats_info, 3135 3135 + .dbg_read_func = hclge_dbg_get_imp_stats_info, 2863 3136 }, 2864 3137 { 2865 3138 .cmd = HNAE3_DBG_CMD_NCL_CONFIG, 2866 2866 - .dbg_dump = hclge_dbg_dump_ncl_config, 3139 3139 + .dbg_read_func = hclge_dbg_dump_ncl_config, 2867 3140 }, 2868 3141 { 2869 3142 .cmd = HNAE3_DBG_CMD_REG_BIOS_COMMON, 2870 2870 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3143 3143 + .dbg_read_func = hclge_dbg_dump_bios_reg_cmd, 2871 3144 }, 2872 3145 { 2873 3146 .cmd = HNAE3_DBG_CMD_REG_SSU, 2874 2874 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3147 3147 + .dbg_read_func = hclge_dbg_dump_ssu_reg_cmd, 2875 3148 }, 2876 3149 { 2877 3150 .cmd = HNAE3_DBG_CMD_REG_IGU_EGU, 2878 2878 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3151 3151 + .dbg_read_func = hclge_dbg_dump_igu_egu_reg_cmd, 2879 3152 }, 2880 3153 { 2881 3154 .cmd = HNAE3_DBG_CMD_REG_RPU, 2882 2882 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3155 3155 + .dbg_read_func = hclge_dbg_dump_rpu_reg_cmd, 2883 3156 }, 2884 3157 { 2885 3158 .cmd = HNAE3_DBG_CMD_REG_NCSI, 2886 2886 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3159 3159 + .dbg_read_func = hclge_dbg_dump_ncsi_reg_cmd, 2887 3160 }, 2888 3161 { 2889 3162 .cmd = HNAE3_DBG_CMD_REG_RTC, 2890 2890 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3163 3163 + .dbg_read_func = hclge_dbg_dump_rtc_reg_cmd, 2891 3164 }, 2892 3165 { 2893 3166 .cmd = HNAE3_DBG_CMD_REG_PPP, 2894 2894 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3167 3167 + .dbg_read_func = hclge_dbg_dump_ppp_reg_cmd, 2895 3168 }, 2896 3169 { 2897 3170 .cmd = HNAE3_DBG_CMD_REG_RCB, 2898 2898 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3171 3171 + .dbg_read_func = hclge_dbg_dump_rcb_reg_cmd, 2899 3172 }, 2900 3173 { 2901 3174 .cmd = HNAE3_DBG_CMD_REG_TQP, 2902 2902 - .dbg_dump_reg = hclge_dbg_dump_reg_cmd, 3175 3175 + .dbg_read_func = hclge_dbg_dump_tqp_reg_cmd, 2903 3176 }, 2904 3177 { 2905 3178 .cmd = HNAE3_DBG_CMD_REG_MAC, 2906 2906 - .dbg_dump = hclge_dbg_dump_mac, 3179 3179 + .dbg_read_func = hclge_dbg_dump_mac, 2907 3180 }, 2908 3181 { 2909 3182 .cmd = HNAE3_DBG_CMD_REG_DCB, 2910 2910 - .dbg_dump = hclge_dbg_dump_dcb, 3183 3183 + .dbg_read_func = hclge_dbg_dump_dcb, 2911 3184 }, 2912 3185 { 2913 3186 .cmd = HNAE3_DBG_CMD_FD_TCAM, 2914 2914 - .dbg_dump = hclge_dbg_dump_fd_tcam, 3187 3187 + .dbg_read_func = hclge_dbg_dump_fd_tcam, 2915 3188 }, 2916 3189 { 2917 3190 .cmd = HNAE3_DBG_CMD_MAC_TNL_STATUS, 2918 2918 - .dbg_dump = hclge_dbg_dump_mac_tnl_status, 3191 3191 + .dbg_read_func = hclge_dbg_dump_mac_tnl_status, 2919 3192 }, 2920 3193 { 2921 3194 .cmd = HNAE3_DBG_CMD_SERV_INFO, 2922 2922 - .dbg_dump = hclge_dbg_dump_serv_info, 3195 3195 + .dbg_read_func = hclge_dbg_dump_serv_info, 2923 3196 }, 2924 3197 { 2925 3198 .cmd = HNAE3_DBG_CMD_VLAN_CONFIG, 2926 2926 - .dbg_dump = hclge_dbg_dump_vlan_config, 3199 3199 + .dbg_read_func = hclge_dbg_dump_vlan_config, 2927 3200 }, 2928 3201 { 2929 3202 .cmd = HNAE3_DBG_CMD_FD_COUNTER, 2930 2930 - .dbg_dump = hclge_dbg_dump_fd_counter, 3203 3203 + .dbg_read_func = hclge_dbg_dump_fd_counter, 2931 3204 }, 2932 3205 { 2933 3206 .cmd = HNAE3_DBG_CMD_UMV_INFO, 2934 2934 - .dbg_dump = hclge_dbg_dump_umv_info, 3207 3207 + .dbg_read_func = hclge_dbg_dump_umv_info, 2935 3208 }, 2936 3209 }; 2937 3210 2938 2938 - int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, 2939 2939 - char *buf, int len) 3211 3211 + int hclge_dbg_get_read_func(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, 3212 3212 + read_func *func) 2940 3213 { 2941 3214 struct hclge_vport *vport = hclge_get_vport(handle); 2942 3215 const struct hclge_dbg_func *cmd_func; ··· 2946 3219 for (i = 0; i < ARRAY_SIZE(hclge_dbg_cmd_func); i++) { 2947 3220 if (cmd == hclge_dbg_cmd_func[i].cmd) { 2948 3221 cmd_func = &hclge_dbg_cmd_func[i]; 2949 2949 - if (cmd_func->dbg_dump) 2950 2950 - return cmd_func->dbg_dump(hdev, buf, len); 2951 2951 - else 2952 2952 - return cmd_func->dbg_dump_reg(hdev, cmd, buf, 2953 2953 - len); 3222 3222 + *func = cmd_func->dbg_read_func; 3223 3223 + return 0; 2954 3224 } 2955 3225 } 2956 3226

+1

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.h

reviewed

··· 92 92 int (*dbg_dump)(struct hclge_dev *hdev, char *buf, int len); 93 93 int (*dbg_dump_reg)(struct hclge_dev *hdev, enum hnae3_dbg_cmd cmd, 94 94 char *buf, int len); 95 95 + read_func dbg_read_func; 95 96 }; 96 97 97 98 struct hclge_dbg_status_dfx_info {

+1 -1

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c

reviewed

··· 12864 12864 .get_fd_all_rules = hclge_get_all_rules, 12865 12865 .enable_fd = hclge_enable_fd, 12866 12866 .add_arfs_entry = hclge_add_fd_entry_by_arfs, 12867 12867 - .dbg_read_cmd = hclge_dbg_read_cmd, 12867 12867 + .dbg_get_read_func = hclge_dbg_get_read_func, 12868 12868 .handle_hw_ras_error = hclge_handle_hw_ras_error, 12869 12869 .get_hw_reset_stat = hclge_get_hw_reset_stat, 12870 12870 .ae_dev_resetting = hclge_ae_dev_resetting,

+2 -2

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h

reviewed

··· 1142 1142 int hclge_vport_start(struct hclge_vport *vport); 1143 1143 void hclge_vport_stop(struct hclge_vport *vport); 1144 1144 int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu); 1145 1145 - int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, 1146 1146 - char *buf, int len); 1145 1145 + int hclge_dbg_get_read_func(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, 1146 1146 + read_func *func); 1147 1147 u16 hclge_covert_handle_qid_global(struct hnae3_handle *handle, u16 queue_id); 1148 1148 int hclge_notify_client(struct hclge_dev *hdev, 1149 1149 enum hnae3_reset_notify_type type);