Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'staging-4.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging
Pull staging/iio fixes from Greg KH:
"Here are few small staging driver fixes, and some more IIO driver
fixes for 4.13-rc7. Nothing major, just resolutions for some reported
problems.
All of these have been in linux-next with no reported problems"
* tag 'staging-4.13-rc7' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging:
iio: magnetometer: st_magn: remove ihl property for LSM303AGR
iio: magnetometer: st_magn: fix status register address for LSM303AGR
iio: hid-sensor-trigger: Fix the race with user space powering up sensors
iio: trigger: stm32-timer: fix get trigger mode
iio: imu: adis16480: Fix acceleration scale factor for adis16480
PATCH] iio: Fix some documentation warnings
staging: rtl8188eu: add RNX-N150NUB support
Revert "staging: fsl-mc: be consistent when checking strcmp() return"
iio: adc: stm32: fix common clock rate
iio: adc: ina219: Avoid underflow for sleeping time
iio: trigger: stm32-timer: add enable attribute
iio: trigger: stm32-timer: fix get/set down count direction
iio: trigger: stm32-timer: fix write_raw return value
iio: trigger: stm32-timer: fix quadrature mode get routine
iio: bmp280: properly initialize device for humidity reading
+108
-47
+1
-1
drivers/iio/adc/ina2xx-adc.c
+1
-1
drivers/iio/adc/ina2xx-adc.c
+5
-5
drivers/iio/adc/stm32-adc-core.c
+5
-5
drivers/iio/adc/stm32-adc-core.c
···
64
64
#define STM32H7_CKMODE_MASK GENMASK(17, 16)
65
65
66
66
/* STM32 H7 maximum analog clock rate (from datasheet) */
67
-
#define STM32H7_ADC_MAX_CLK_RATE 72000000
67
+
#define STM32H7_ADC_MAX_CLK_RATE 36000000
68
68
69
69
/**
70
70
* stm32_adc_common_regs - stm32 common registers, compatible dependent data
···
148
148
return -EINVAL;
149
149
}
150
150
151
-
priv->common.rate = rate;
151
+
priv->common.rate = rate / stm32f4_pclk_div[i];
152
152
val = readl_relaxed(priv->common.base + STM32F4_ADC_CCR);
153
153
val &= ~STM32F4_ADC_ADCPRE_MASK;
154
154
val |= i << STM32F4_ADC_ADCPRE_SHIFT;
155
155
writel_relaxed(val, priv->common.base + STM32F4_ADC_CCR);
156
156
157
157
dev_dbg(&pdev->dev, "Using analog clock source at %ld kHz\n",
158
-
rate / (stm32f4_pclk_div[i] * 1000));
158
+
priv->common.rate / 1000);
159
159
160
160
return 0;
161
161
}
···
250
250
251
251
out:
252
252
/* rate used later by each ADC instance to control BOOST mode */
253
-
priv->common.rate = rate;
253
+
priv->common.rate = rate / div;
254
254
255
255
/* Set common clock mode and prescaler */
256
256
val = readl_relaxed(priv->common.base + STM32H7_ADC_CCR);
···
260
260
writel_relaxed(val, priv->common.base + STM32H7_ADC_CCR);
261
261
262
262
dev_dbg(&pdev->dev, "Using %s clock/%d source at %ld kHz\n",
263
-
ckmode ? "bus" : "adc", div, rate / (div * 1000));
263
+
ckmode ? "bus" : "adc", div, priv->common.rate / 1000);
264
264
265
265
return 0;
266
266
}
+4
-4
drivers/iio/common/hid-sensors/hid-sensor-trigger.c
+4
-4
drivers/iio/common/hid-sensors/hid-sensor-trigger.c
···
111
111
s32 poll_value = 0;
112
112
113
113
if (state) {
114
-
if (!atomic_read(&st->user_requested_state))
115
-
return 0;
116
114
if (sensor_hub_device_open(st->hsdev))
117
115
return -EIO;
118
116
···
159
161
&report_val);
160
162
}
161
163
164
+
pr_debug("HID_SENSOR %s set power_state %d report_state %d\n",
165
+
st->pdev->name, state_val, report_val);
166
+
162
167
sensor_hub_get_feature(st->hsdev, st->power_state.report_id,
163
168
st->power_state.index,
164
169
sizeof(state_val), &state_val);
···
183
182
ret = pm_runtime_get_sync(&st->pdev->dev);
184
183
else {
185
184
pm_runtime_mark_last_busy(&st->pdev->dev);
185
+
pm_runtime_use_autosuspend(&st->pdev->dev);
186
186
ret = pm_runtime_put_autosuspend(&st->pdev->dev);
187
187
}
188
188
if (ret < 0) {
···
287
285
/* Default to 3 seconds, but can be changed from sysfs */
288
286
pm_runtime_set_autosuspend_delay(&attrb->pdev->dev,
289
287
3000);
290
-
pm_runtime_use_autosuspend(&attrb->pdev->dev);
291
-
292
288
return ret;
293
289
error_unreg_trigger:
294
290
iio_trigger_unregister(trig);
+1
-1
drivers/iio/imu/adis16480.c
+1
-1
drivers/iio/imu/adis16480.c
+1
-3
drivers/iio/magnetometer/st_magn_core.c
+1
-3
drivers/iio/magnetometer/st_magn_core.c
+24
-3
drivers/iio/pressure/bmp280-core.c
+24
-3
drivers/iio/pressure/bmp280-core.c
···
282
282
}
283
283
284
284
adc_temp = be32_to_cpu(tmp) >> 12;
285
+
if (adc_temp == BMP280_TEMP_SKIPPED) {
286
+
/* reading was skipped */
287
+
dev_err(data->dev, "reading temperature skipped\n");
288
+
return -EIO;
289
+
}
285
290
comp_temp = bmp280_compensate_temp(data, adc_temp);
286
291
287
292
/*
···
322
317
}
323
318
324
319
adc_press = be32_to_cpu(tmp) >> 12;
320
+
if (adc_press == BMP280_PRESS_SKIPPED) {
321
+
/* reading was skipped */
322
+
dev_err(data->dev, "reading pressure skipped\n");
323
+
return -EIO;
324
+
}
325
325
comp_press = bmp280_compensate_press(data, adc_press);
326
326
327
327
*val = comp_press;
···
355
345
}
356
346
357
347
adc_humidity = be16_to_cpu(tmp);
348
+
if (adc_humidity == BMP280_HUMIDITY_SKIPPED) {
349
+
/* reading was skipped */
350
+
dev_err(data->dev, "reading humidity skipped\n");
351
+
return -EIO;
352
+
}
358
353
comp_humidity = bmp280_compensate_humidity(data, adc_humidity);
359
354
360
355
*val = comp_humidity;
···
612
597
613
598
static int bme280_chip_config(struct bmp280_data *data)
614
599
{
615
-
int ret = bmp280_chip_config(data);
600
+
int ret;
616
601
u8 osrs = BMP280_OSRS_HUMIDITIY_X(data->oversampling_humid + 1);
602
+
603
+
/*
604
+
* Oversampling of humidity must be set before oversampling of
605
+
* temperature/pressure is set to become effective.
606
+
*/
607
+
ret = regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
608
+
BMP280_OSRS_HUMIDITY_MASK, osrs);
617
609
618
610
if (ret < 0)
619
611
return ret;
620
612
621
-
return regmap_update_bits(data->regmap, BMP280_REG_CTRL_HUMIDITY,
622
-
BMP280_OSRS_HUMIDITY_MASK, osrs);
613
+
return bmp280_chip_config(data);
623
614
}
624
615
625
616
static const struct bmp280_chip_info bme280_chip_info = {
+5
drivers/iio/pressure/bmp280.h
+5
drivers/iio/pressure/bmp280.h
···
96
96
#define BME280_CHIP_ID 0x60
97
97
#define BMP280_SOFT_RESET_VAL 0xB6
98
98
99
+
/* BMP280 register skipped special values */
100
+
#define BMP280_TEMP_SKIPPED 0x80000
101
+
#define BMP280_PRESS_SKIPPED 0x80000
102
+
#define BMP280_HUMIDITY_SKIPPED 0x8000
103
+
99
104
/* Regmap configurations */
100
105
extern const struct regmap_config bmp180_regmap_config;
101
106
extern const struct regmap_config bmp280_regmap_config;
+60
-24
drivers/iio/trigger/stm32-timer-trigger.c
+60
-24
drivers/iio/trigger/stm32-timer-trigger.c
···
366
366
int *val, int *val2, long mask)
367
367
{
368
368
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
369
+
u32 dat;
369
370
370
371
switch (mask) {
371
372
case IIO_CHAN_INFO_RAW:
372
-
{
373
-
u32 cnt;
374
-
375
-
regmap_read(priv->regmap, TIM_CNT, &cnt);
376
-
*val = cnt;
377
-
373
+
regmap_read(priv->regmap, TIM_CNT, &dat);
374
+
*val = dat;
378
375
return IIO_VAL_INT;
379
-
}
380
-
case IIO_CHAN_INFO_SCALE:
381
-
{
382
-
u32 smcr;
383
376
384
-
regmap_read(priv->regmap, TIM_SMCR, &smcr);
385
-
smcr &= TIM_SMCR_SMS;
377
+
case IIO_CHAN_INFO_ENABLE:
378
+
regmap_read(priv->regmap, TIM_CR1, &dat);
379
+
*val = (dat & TIM_CR1_CEN) ? 1 : 0;
380
+
return IIO_VAL_INT;
381
+
382
+
case IIO_CHAN_INFO_SCALE:
383
+
regmap_read(priv->regmap, TIM_SMCR, &dat);
384
+
dat &= TIM_SMCR_SMS;
386
385
387
386
*val = 1;
388
387
*val2 = 0;
389
388
390
389
/* in quadrature case scale = 0.25 */
391
-
if (smcr == 3)
390
+
if (dat == 3)
392
391
*val2 = 2;
393
392
394
393
return IIO_VAL_FRACTIONAL_LOG2;
395
-
}
396
394
}
397
395
398
396
return -EINVAL;
···
401
403
int val, int val2, long mask)
402
404
{
403
405
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
406
+
u32 dat;
404
407
405
408
switch (mask) {
406
409
case IIO_CHAN_INFO_RAW:
407
-
regmap_write(priv->regmap, TIM_CNT, val);
410
+
return regmap_write(priv->regmap, TIM_CNT, val);
408
411
409
-
return IIO_VAL_INT;
410
412
case IIO_CHAN_INFO_SCALE:
411
413
/* fixed scale */
412
414
return -EINVAL;
415
+
416
+
case IIO_CHAN_INFO_ENABLE:
417
+
if (val) {
418
+
regmap_read(priv->regmap, TIM_CR1, &dat);
419
+
if (!(dat & TIM_CR1_CEN))
420
+
clk_enable(priv->clk);
421
+
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
422
+
TIM_CR1_CEN);
423
+
} else {
424
+
regmap_read(priv->regmap, TIM_CR1, &dat);
425
+
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_CEN,
426
+
0);
427
+
if (dat & TIM_CR1_CEN)
428
+
clk_disable(priv->clk);
429
+
}
430
+
return 0;
413
431
}
414
432
415
433
return -EINVAL;
···
485
471
486
472
regmap_read(priv->regmap, TIM_SMCR, &smcr);
487
473
488
-
return smcr == TIM_SMCR_SMS ? 0 : -EINVAL;
474
+
return (smcr & TIM_SMCR_SMS) == TIM_SMCR_SMS ? 0 : -EINVAL;
489
475
}
490
476
491
477
static const struct iio_enum stm32_trigger_mode_enum = {
···
521
507
{
522
508
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
523
509
int sms = stm32_enable_mode2sms(mode);
510
+
u32 val;
524
511
525
512
if (sms < 0)
526
513
return sms;
514
+
/*
515
+
* Triggered mode sets CEN bit automatically by hardware. So, first
516
+
* enable counter clock, so it can use it. Keeps it in sync with CEN.
517
+
*/
518
+
if (sms == 6) {
519
+
regmap_read(priv->regmap, TIM_CR1, &val);
520
+
if (!(val & TIM_CR1_CEN))
521
+
clk_enable(priv->clk);
522
+
}
527
523
528
524
regmap_update_bits(priv->regmap, TIM_SMCR, TIM_SMCR_SMS, sms);
529
525
···
595
571
{
596
572
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
597
573
u32 smcr;
574
+
int mode;
598
575
599
576
regmap_read(priv->regmap, TIM_SMCR, &smcr);
600
-
smcr &= TIM_SMCR_SMS;
577
+
mode = (smcr & TIM_SMCR_SMS) - 1;
578
+
if ((mode < 0) || (mode > ARRAY_SIZE(stm32_quadrature_modes)))
579
+
return -EINVAL;
601
580
602
-
return smcr - 1;
581
+
return mode;
603
582
}
604
583
605
584
static const struct iio_enum stm32_quadrature_mode_enum = {
···
619
592
620
593
static int stm32_set_count_direction(struct iio_dev *indio_dev,
621
594
const struct iio_chan_spec *chan,
622
-
unsigned int mode)
595
+
unsigned int dir)
623
596
{
624
597
struct stm32_timer_trigger *priv = iio_priv(indio_dev);
598
+
u32 val;
599
+
int mode;
625
600
626
-
regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR, mode);
601
+
/* In encoder mode, direction is RO (given by TI1/TI2 signals) */
602
+
regmap_read(priv->regmap, TIM_SMCR, &val);
603
+
mode = (val & TIM_SMCR_SMS) - 1;
604
+
if ((mode >= 0) || (mode < ARRAY_SIZE(stm32_quadrature_modes)))
605
+
return -EBUSY;
627
606
628
-
return 0;
607
+
return regmap_update_bits(priv->regmap, TIM_CR1, TIM_CR1_DIR,
608
+
dir ? TIM_CR1_DIR : 0);
629
609
}
630
610
631
611
static int stm32_get_count_direction(struct iio_dev *indio_dev,
···
643
609
644
610
regmap_read(priv->regmap, TIM_CR1, &cr1);
645
611
646
-
return (cr1 & TIM_CR1_DIR);
612
+
return ((cr1 & TIM_CR1_DIR) ? 1 : 0);
647
613
}
648
614
649
615
static const struct iio_enum stm32_count_direction_enum = {
···
706
672
static const struct iio_chan_spec stm32_trigger_channel = {
707
673
.type = IIO_COUNT,
708
674
.channel = 0,
709
-
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
675
+
.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
676
+
BIT(IIO_CHAN_INFO_ENABLE) |
677
+
BIT(IIO_CHAN_INFO_SCALE),
710
678
.ext_info = stm32_trigger_count_info,
711
679
.indexed = 1
712
680
};
+3
-3
drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
+3
-3
drivers/staging/fsl-mc/bus/fsl-mc-allocator.c
···
16
16
17
17
static bool __must_check fsl_mc_is_allocatable(const char *obj_type)
18
18
{
19
-
return strcmp(obj_type, "dpbp") ||
20
-
strcmp(obj_type, "dpmcp") ||
21
-
strcmp(obj_type, "dpcon");
19
+
return strcmp(obj_type, "dpbp") == 0 ||
20
+
strcmp(obj_type, "dpmcp") == 0 ||
21
+
strcmp(obj_type, "dpcon") == 0;
22
22
}
23
23
24
24
/**
+1
drivers/staging/rtl8188eu/os_dep/usb_intf.c
+1
drivers/staging/rtl8188eu/os_dep/usb_intf.c
···
45
45
{USB_DEVICE(0x2001, 0x3311)}, /* DLink GO-USB-N150 REV B1 */
46
46
{USB_DEVICE(0x2357, 0x010c)}, /* TP-Link TL-WN722N v2 */
47
47
{USB_DEVICE(0x0df6, 0x0076)}, /* Sitecom N150 v2 */
48
+
{USB_DEVICE(USB_VENDER_ID_REALTEK, 0xffef)}, /* Rosewill RNX-N150NUB */
48
49
{} /* Terminating entry */
49
50
};
50
51
+1
-1
include/linux/iio/iio.h
+1
-1
include/linux/iio/iio.h
···
535
535
* @scan_timestamp: [INTERN] set if any buffers have requested timestamp
536
536
* @scan_index_timestamp:[INTERN] cache of the index to the timestamp
537
537
* @trig: [INTERN] current device trigger (buffer modes)
538
-
* @trig_readonly [INTERN] mark the current trigger immutable
538
+
* @trig_readonly: [INTERN] mark the current trigger immutable
539
539
* @pollfunc: [DRIVER] function run on trigger being received
540
540
* @pollfunc_event: [DRIVER] function run on events trigger being received
541
541
* @channels: [DRIVER] channel specification structure table
+2
-2
include/linux/iio/trigger.h
+2
-2
include/linux/iio/trigger.h
···
144
144
/**
145
145
* iio_trigger_set_immutable() - set an immutable trigger on destination
146
146
*
147
-
* @indio_dev - IIO device structure containing the device
148
-
* @trig - trigger to assign to device
147
+
* @indio_dev: IIO device structure containing the device
148
+
* @trig: trigger to assign to device
149
149
*
150
150
**/
151
151
int iio_trigger_set_immutable(struct iio_dev *indio_dev, struct iio_trigger *trig);