tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

phy: rockchip-pcie: Enable all four lanes if required

Current code enables only Lane 0 because pwr_cnt will be incremented on
first call to the function. Let's reorder the enablement code to enable
all 4 lanes through GRF.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>

Signed-off-by: Valmantas Paliksa <walmis@gmail.com>
Signed-off-by: Geraldo Nascimento <geraldogabriel@gmail.com>
Reviewed-by: Robin Murphy <robin.murphy@arm.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/16b610aab34e069fd31d9f57260c10df2a968f80.1751322015.git.geraldogabriel@gmail.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>

authored by

Valmantas Paliksa and committed by
Vinod Koul c3fe7071 dfef90f2

+6 -6
+6 -6
drivers/phy/rockchip/phy-rockchip-pcie.c
··· 160 160 161 161 guard(mutex)(&rk_phy->pcie_mutex); 162 162 163 + regmap_write(rk_phy->reg_base, 164 + rk_phy->phy_data->pcie_laneoff, 165 + HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, 166 + PHY_LANE_IDLE_MASK, 167 + PHY_LANE_IDLE_A_SHIFT + inst->index)); 168 + 163 169 if (rk_phy->pwr_cnt++) { 164 170 return 0; 165 171 } ··· 181 175 HIWORD_UPDATE(PHY_CFG_PLL_LOCK, 182 176 PHY_CFG_ADDR_MASK, 183 177 PHY_CFG_ADDR_SHIFT)); 184 - 185 - regmap_write(rk_phy->reg_base, 186 - rk_phy->phy_data->pcie_laneoff, 187 - HIWORD_UPDATE(!PHY_LANE_IDLE_OFF, 188 - PHY_LANE_IDLE_MASK, 189 - PHY_LANE_IDLE_A_SHIFT + inst->index)); 190 178 191 179 /* 192 180 * No documented timeout value for phy operation below,