Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'drm-fixes-2026-04-11' of https://gitlab.freedesktop.org/drm/kernel
Pull drm fixes from Dave Airlie:
"Last set of fixes, a few vc4, and i915, one xe and one ethosu Kconfig
fix.
xe:
- Fix HW engine idleness unit conversion
i915:
- Drop check for changed VM in EXECBUF
- Fix refcount underflow race in intel_engine_park_heartbeat
- Do not use pipe_src as borders for SU area in PSR
vc4:
- runtime pm reference fix
- memory leak fixes
- locking fix
ethosu:
- make ARM only"
* tag 'drm-fixes-2026-04-11' of https://gitlab.freedesktop.org/drm/kernel:
drm/i915/gem: Drop check for changed VM in EXECBUF
drm/i915/gt: fix refcount underflow in intel_engine_park_heartbeat
drm/xe: Fix bug in idledly unit conversion
drm/i915/psr: Do not use pipe_src as borders for SU area
accel: ethosu: Add hardware dependency hint
drm/vc4: Protect madv read in vc4_gem_object_mmap() with madv_lock
drm/vc4: Fix a memory leak in hang state error path
drm/vc4: Fix memory leak of BO array in hang state
drm/vc4: Release runtime PM reference after binding V3D
+55
-30
+1
drivers/accel/ethosu/Kconfig
+1
drivers/accel/ethosu/Kconfig
+19
-11
drivers/gpu/drm/i915/display/intel_psr.c
+19
-11
drivers/gpu/drm/i915/display/intel_psr.c
···
2678
2678
2679
2679
static void clip_area_update(struct drm_rect *overlap_damage_area,
2680
2680
struct drm_rect *damage_area,
2681
-
struct drm_rect *pipe_src)
2681
+
struct drm_rect *display_area)
2682
2682
{
2683
-
if (!drm_rect_intersect(damage_area, pipe_src))
2683
+
if (!drm_rect_intersect(damage_area, display_area))
2684
2684
return;
2685
2685
2686
2686
if (overlap_damage_area->y1 == -1) {
···
2731
2731
static void
2732
2732
intel_psr2_sel_fetch_et_alignment(struct intel_atomic_state *state,
2733
2733
struct intel_crtc *crtc,
2734
+
struct drm_rect *display_area,
2734
2735
bool *cursor_in_su_area)
2735
2736
{
2736
2737
struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
···
2759
2758
continue;
2760
2759
2761
2760
clip_area_update(&crtc_state->psr2_su_area, &new_plane_state->uapi.dst,
2762
-
&crtc_state->pipe_src);
2761
+
display_area);
2763
2762
*cursor_in_su_area = true;
2764
2763
}
2765
2764
}
···
2856
2855
struct intel_crtc_state *crtc_state = intel_atomic_get_new_crtc_state(state, crtc);
2857
2856
struct intel_plane_state *new_plane_state, *old_plane_state;
2858
2857
struct intel_plane *plane;
2858
+
struct drm_rect display_area = {
2859
+
.x1 = 0,
2860
+
.y1 = 0,
2861
+
.x2 = crtc_state->hw.adjusted_mode.crtc_hdisplay,
2862
+
.y2 = crtc_state->hw.adjusted_mode.crtc_vdisplay,
2863
+
};
2859
2864
bool full_update = false, su_area_changed;
2860
2865
int i, ret;
2861
2866
···
2875
2868
2876
2869
crtc_state->psr2_su_area.x1 = 0;
2877
2870
crtc_state->psr2_su_area.y1 = -1;
2878
-
crtc_state->psr2_su_area.x2 = drm_rect_width(&crtc_state->pipe_src);
2871
+
crtc_state->psr2_su_area.x2 = drm_rect_width(&display_area);
2879
2872
crtc_state->psr2_su_area.y2 = -1;
2880
2873
2881
2874
/*
···
2913
2906
damaged_area.y1 = old_plane_state->uapi.dst.y1;
2914
2907
damaged_area.y2 = old_plane_state->uapi.dst.y2;
2915
2908
clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
2916
-
&crtc_state->pipe_src);
2909
+
&display_area);
2917
2910
}
2918
2911
2919
2912
if (new_plane_state->uapi.visible) {
2920
2913
damaged_area.y1 = new_plane_state->uapi.dst.y1;
2921
2914
damaged_area.y2 = new_plane_state->uapi.dst.y2;
2922
2915
clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
2923
-
&crtc_state->pipe_src);
2916
+
&display_area);
2924
2917
}
2925
2918
continue;
2926
2919
} else if (new_plane_state->uapi.alpha != old_plane_state->uapi.alpha) {
···
2928
2921
damaged_area.y1 = new_plane_state->uapi.dst.y1;
2929
2922
damaged_area.y2 = new_plane_state->uapi.dst.y2;
2930
2923
clip_area_update(&crtc_state->psr2_su_area, &damaged_area,
2931
-
&crtc_state->pipe_src);
2924
+
&display_area);
2932
2925
continue;
2933
2926
}
2934
2927
···
2944
2937
damaged_area.x1 += new_plane_state->uapi.dst.x1 - src.x1;
2945
2938
damaged_area.x2 += new_plane_state->uapi.dst.x1 - src.x1;
2946
2939
2947
-
clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &crtc_state->pipe_src);
2940
+
clip_area_update(&crtc_state->psr2_su_area, &damaged_area, &display_area);
2948
2941
}
2949
2942
2950
2943
/*
···
2979
2972
* cursor is added into affected planes even when
2980
2973
* cursor is not updated by itself.
2981
2974
*/
2982
-
intel_psr2_sel_fetch_et_alignment(state, crtc, &cursor_in_su_area);
2975
+
intel_psr2_sel_fetch_et_alignment(state, crtc, &display_area,
2976
+
&cursor_in_su_area);
2983
2977
2984
2978
su_area_changed = intel_psr2_sel_fetch_pipe_alignment(crtc_state);
2985
2979
···
3056
3048
3057
3049
skip_sel_fetch_set_loop:
3058
3050
if (full_update)
3059
-
clip_area_update(&crtc_state->psr2_su_area, &crtc_state->pipe_src,
3060
-
&crtc_state->pipe_src);
3051
+
clip_area_update(&crtc_state->psr2_su_area, &display_area,
3052
+
&display_area);
3061
3053
3062
3054
psr2_man_trk_ctl_calc(crtc_state, full_update);
3063
3055
crtc_state->pipe_srcsz_early_tpt =
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+1
-1
drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c
+18
-8
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
+18
-8
drivers/gpu/drm/i915/gt/intel_engine_heartbeat.c
···
148
148
/* Just in case everything has gone horribly wrong, give it a kick */
149
149
intel_engine_flush_submission(engine);
150
150
151
-
rq = engine->heartbeat.systole;
152
-
if (rq && i915_request_completed(rq)) {
153
-
i915_request_put(rq);
154
-
engine->heartbeat.systole = NULL;
151
+
rq = xchg(&engine->heartbeat.systole, NULL);
152
+
if (rq) {
153
+
if (i915_request_completed(rq))
154
+
i915_request_put(rq);
155
+
else
156
+
engine->heartbeat.systole = rq;
155
157
}
156
158
157
159
if (!intel_engine_pm_get_if_awake(engine))
···
234
232
unlock:
235
233
mutex_unlock(&ce->timeline->mutex);
236
234
out:
237
-
if (!engine->i915->params.enable_hangcheck || !next_heartbeat(engine))
238
-
i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
235
+
if (!engine->i915->params.enable_hangcheck || !next_heartbeat(engine)) {
236
+
rq = xchg(&engine->heartbeat.systole, NULL);
237
+
if (rq)
238
+
i915_request_put(rq);
239
+
}
239
240
intel_engine_pm_put(engine);
240
241
}
241
242
···
252
247
253
248
void intel_engine_park_heartbeat(struct intel_engine_cs *engine)
254
249
{
255
-
if (cancel_delayed_work(&engine->heartbeat.work))
256
-
i915_request_put(fetch_and_zero(&engine->heartbeat.systole));
250
+
if (cancel_delayed_work(&engine->heartbeat.work)) {
251
+
struct i915_request *rq;
252
+
253
+
rq = xchg(&engine->heartbeat.systole, NULL);
254
+
if (rq)
255
+
i915_request_put(rq);
256
+
}
257
257
}
258
258
259
259
void intel_gt_unpark_heartbeats(struct intel_gt *gt)
+3
drivers/gpu/drm/vc4/vc4_bo.c
+3
drivers/gpu/drm/vc4/vc4_bo.c
···
738
738
return -EINVAL;
739
739
}
740
740
741
+
mutex_lock(&bo->madv_lock);
741
742
if (bo->madv != VC4_MADV_WILLNEED) {
742
743
DRM_DEBUG("mmapping of %s BO not allowed\n",
743
744
bo->madv == VC4_MADV_DONTNEED ?
744
745
"purgeable" : "purged");
746
+
mutex_unlock(&bo->madv_lock);
745
747
return -EINVAL;
746
748
}
749
+
mutex_unlock(&bo->madv_lock);
747
750
748
751
return drm_gem_dma_mmap(&bo->base, vma);
749
752
}
+11
-8
drivers/gpu/drm/vc4/vc4_gem.c
+11
-8
drivers/gpu/drm/vc4/vc4_gem.c
···
62
62
for (i = 0; i < state->user_state.bo_count; i++)
63
63
drm_gem_object_put(state->bo[i]);
64
64
65
+
kfree(state->bo);
65
66
kfree(state);
66
67
}
67
68
···
171
170
spin_lock_irqsave(&vc4->job_lock, irqflags);
172
171
exec[0] = vc4_first_bin_job(vc4);
173
172
exec[1] = vc4_first_render_job(vc4);
174
-
if (!exec[0] && !exec[1]) {
175
-
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
176
-
return;
177
-
}
173
+
if (!exec[0] && !exec[1])
174
+
goto err_free_state;
178
175
179
176
/* Get the bos from both binner and renderer into hang state. */
180
177
state->bo_count = 0;
···
189
190
kernel_state->bo = kzalloc_objs(*kernel_state->bo, state->bo_count,
190
191
GFP_ATOMIC);
191
192
192
-
if (!kernel_state->bo) {
193
-
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
194
-
return;
195
-
}
193
+
if (!kernel_state->bo)
194
+
goto err_free_state;
196
195
197
196
k = 0;
198
197
for (i = 0; i < 2; i++) {
···
282
285
vc4->hang_state = kernel_state;
283
286
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
284
287
}
288
+
289
+
return;
290
+
291
+
err_free_state:
292
+
spin_unlock_irqrestore(&vc4->job_lock, irqflags);
293
+
kfree(kernel_state);
285
294
}
286
295
287
296
static void
+1
drivers/gpu/drm/vc4/vc4_v3d.c
+1
drivers/gpu/drm/vc4/vc4_v3d.c
+1
-2
drivers/gpu/drm/xe/xe_hw_engine.c
+1
-2
drivers/gpu/drm/xe/xe_hw_engine.c
···
595
595
maxcnt *= maxcnt_units_ns;
596
596
597
597
if (xe_gt_WARN_ON(gt, idledly >= maxcnt || inhibit_switch)) {
598
-
idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * maxcnt_units_ns),
598
+
idledly = DIV_ROUND_CLOSEST(((maxcnt - 1) * 1000),
599
599
idledly_units_ps);
600
-
idledly = DIV_ROUND_CLOSEST(idledly, 1000);
601
600
xe_mmio_write32(>->mmio, RING_IDLEDLY(hwe->mmio_base), idledly);
602
601
}
603
602
}