selftests/resctrl: Fix closing IMC fds on error and open-code R+W instead of loops

The imc perf fd close() calls are missing from all error paths. In
addition, get_mem_bw_imc() handles fds in a for loop but close() is
based on two fixed indexes READ and WRITE.

Open code inner for loops to READ+WRITE entries for clarity and add a
function to close() IMC fds properly in all cases.

Fixes: 7f4d257e3a2a ("selftests/resctrl: Add callback to start a benchmark")
Suggested-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
Tested-by: Babu Moger <babu.moger@amd.com>
Reviewed-by: Reinette Chatre <reinette.chatre@intel.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>

authored by

Ilpo Järvinen and committed by

Shuah Khan 2 years ago c44000b6 b47619a3

+36 -18

1 changed file

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tools

testing

selftests

resctrl

resctrl_val.c

+36 -18

tools/testing/selftests/resctrl/resctrl_val.c

··· 293 293 return 0; 294 294 } 295 295 296 + static void perf_close_imc_mem_bw(void) 297 + { 298 + int mc; 299 + 300 + for (mc = 0; mc < imcs; mc++) { 301 + if (imc_counters_config[mc][READ].fd != -1) 302 + close(imc_counters_config[mc][READ].fd); 303 + if (imc_counters_config[mc][WRITE].fd != -1) 304 + close(imc_counters_config[mc][WRITE].fd); 305 + } 306 + } 307 + 296 308 /* 297 309 * get_mem_bw_imc: Memory band width as reported by iMC counters 298 310 * @cpu_no: CPU number that the benchmark PID is binded to ··· 318 306 static int get_mem_bw_imc(int cpu_no, char *bw_report, float *bw_imc) 319 307 { 320 308 float reads, writes, of_mul_read, of_mul_write; 321 - int imc, j, ret; 309 + int imc, ret; 310 + 311 + for (imc = 0; imc < imcs; imc++) { 312 + imc_counters_config[imc][READ].fd = -1; 313 + imc_counters_config[imc][WRITE].fd = -1; 314 + } 322 315 323 316 /* Start all iMC counters to log values (both read and write) */ 324 317 reads = 0, writes = 0, of_mul_read = 1, of_mul_write = 1; 325 318 for (imc = 0; imc < imcs; imc++) { 326 - for (j = 0; j < 2; j++) { 327 - ret = open_perf_event(imc, cpu_no, j); 328 - if (ret) 329 - return -1; 330 - } 331 - for (j = 0; j < 2; j++) 332 - membw_ioctl_perf_event_ioc_reset_enable(imc, j); 319 + ret = open_perf_event(imc, cpu_no, READ); 320 + if (ret) 321 + goto close_fds; 322 + ret = open_perf_event(imc, cpu_no, WRITE); 323 + if (ret) 324 + goto close_fds; 325 + 326 + membw_ioctl_perf_event_ioc_reset_enable(imc, READ); 327 + membw_ioctl_perf_event_ioc_reset_enable(imc, WRITE); 333 328 } 334 329 335 330 sleep(1); 336 331 337 332 /* Stop counters after a second to get results (both read and write) */ 338 333 for (imc = 0; imc < imcs; imc++) { 339 - for (j = 0; j < 2; j++) 340 - membw_ioctl_perf_event_ioc_disable(imc, j); 334 + membw_ioctl_perf_event_ioc_disable(imc, READ); 335 + membw_ioctl_perf_event_ioc_disable(imc, WRITE); 341 336 } 342 337 343 338 /* ··· 360 341 if (read(r->fd, &r->return_value, 361 342 sizeof(struct membw_read_format)) == -1) { 362 343 ksft_perror("Couldn't get read b/w through iMC"); 363 - 364 - return -1; 344 + goto close_fds; 365 345 } 366 346 367 347 if (read(w->fd, &w->return_value, 368 348 sizeof(struct membw_read_format)) == -1) { 369 349 ksft_perror("Couldn't get write bw through iMC"); 370 - 371 - return -1; 350 + goto close_fds; 372 351 } 373 352 374 353 __u64 r_time_enabled = r->return_value.time_enabled; ··· 386 369 writes += w->return_value.value * of_mul_write * SCALE; 387 370 } 388 371 389 - for (imc = 0; imc < imcs; imc++) { 390 - close(imc_counters_config[imc][READ].fd); 391 - close(imc_counters_config[imc][WRITE].fd); 392 - } 372 + perf_close_imc_mem_bw(); 393 373 394 374 if (strcmp(bw_report, "reads") == 0) { 395 375 *bw_imc = reads; ··· 400 386 401 387 *bw_imc = reads + writes; 402 388 return 0; 389 + 390 + close_fds: 391 + perf_close_imc_mem_bw(); 392 + return -1; 403 393 } 404 394 405 395 void set_mbm_path(const char *ctrlgrp, const char *mongrp, int domain_id)

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