Merge tag 'char-misc-5.17-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

+4 -1

drivers/iio/accel/bmc150-accel-core.c

··· 1783 1783 ret = iio_device_register(indio_dev); 1784 1784 if (ret < 0) { 1785 1785 dev_err(dev, "Unable to register iio device\n"); 1786 - goto err_trigger_unregister; 1786 + goto err_pm_cleanup; 1787 1787 } 1788 1788 1789 1789 return 0; 1790 1790 1791 + err_pm_cleanup: 1792 + pm_runtime_dont_use_autosuspend(dev); 1793 + pm_runtime_disable(dev); 1791 1794 err_trigger_unregister: 1792 1795 bmc150_accel_unregister_triggers(data, BMC150_ACCEL_TRIGGERS - 1); 1793 1796 err_buffer_cleanup:

+10 -2

drivers/iio/accel/fxls8962af-core.c

··· 173 173 u16 upper_thres; 174 174 }; 175 175 176 - const struct regmap_config fxls8962af_regmap_conf = { 176 + const struct regmap_config fxls8962af_i2c_regmap_conf = { 177 177 .reg_bits = 8, 178 178 .val_bits = 8, 179 179 .max_register = FXLS8962AF_MAX_REG, 180 180 }; 181 - EXPORT_SYMBOL_GPL(fxls8962af_regmap_conf); 181 + EXPORT_SYMBOL_GPL(fxls8962af_i2c_regmap_conf); 182 + 183 + const struct regmap_config fxls8962af_spi_regmap_conf = { 184 + .reg_bits = 8, 185 + .pad_bits = 8, 186 + .val_bits = 8, 187 + .max_register = FXLS8962AF_MAX_REG, 188 + }; 189 + EXPORT_SYMBOL_GPL(fxls8962af_spi_regmap_conf); 182 190 183 191 enum { 184 192 fxls8962af_idx_x,

+1 -1

drivers/iio/accel/fxls8962af-i2c.c

··· 18 18 { 19 19 struct regmap *regmap; 20 20 21 - regmap = devm_regmap_init_i2c(client, &fxls8962af_regmap_conf); 21 + regmap = devm_regmap_init_i2c(client, &fxls8962af_i2c_regmap_conf); 22 22 if (IS_ERR(regmap)) { 23 23 dev_err(&client->dev, "Failed to initialize i2c regmap\n"); 24 24 return PTR_ERR(regmap);

+1 -1

drivers/iio/accel/fxls8962af-spi.c

··· 18 18 { 19 19 struct regmap *regmap; 20 20 21 - regmap = devm_regmap_init_spi(spi, &fxls8962af_regmap_conf); 21 + regmap = devm_regmap_init_spi(spi, &fxls8962af_spi_regmap_conf); 22 22 if (IS_ERR(regmap)) { 23 23 dev_err(&spi->dev, "Failed to initialize spi regmap\n"); 24 24 return PTR_ERR(regmap);

+2 -1

drivers/iio/accel/fxls8962af.h

··· 17 17 int fxls8962af_core_remove(struct device *dev); 18 18 19 19 extern const struct dev_pm_ops fxls8962af_pm_ops; 20 - extern const struct regmap_config fxls8962af_regmap_conf; 20 + extern const struct regmap_config fxls8962af_i2c_regmap_conf; 21 + extern const struct regmap_config fxls8962af_spi_regmap_conf; 21 22 22 23 #endif /* _FXLS8962AF_H_ */

+4 -1

drivers/iio/accel/kxcjk-1013.c

··· 1590 1590 ret = iio_device_register(indio_dev); 1591 1591 if (ret < 0) { 1592 1592 dev_err(&client->dev, "unable to register iio device\n"); 1593 - goto err_buffer_cleanup; 1593 + goto err_pm_cleanup; 1594 1594 } 1595 1595 1596 1596 return 0; 1597 1597 1598 + err_pm_cleanup: 1599 + pm_runtime_dont_use_autosuspend(&client->dev); 1600 + pm_runtime_disable(&client->dev); 1598 1601 err_buffer_cleanup: 1599 1602 iio_triggered_buffer_cleanup(indio_dev); 1600 1603 err_trigger_unregister:

+4 -1

drivers/iio/accel/mma9551.c

··· 495 495 ret = iio_device_register(indio_dev); 496 496 if (ret < 0) { 497 497 dev_err(&client->dev, "unable to register iio device\n"); 498 - goto out_poweroff; 498 + goto err_pm_cleanup; 499 499 } 500 500 501 501 return 0; 502 502 503 + err_pm_cleanup: 504 + pm_runtime_dont_use_autosuspend(&client->dev); 505 + pm_runtime_disable(&client->dev); 503 506 out_poweroff: 504 507 mma9551_set_device_state(client, false); 505 508

+4 -1

drivers/iio/accel/mma9553.c

··· 1134 1134 ret = iio_device_register(indio_dev); 1135 1135 if (ret < 0) { 1136 1136 dev_err(&client->dev, "unable to register iio device\n"); 1137 - goto out_poweroff; 1137 + goto err_pm_cleanup; 1138 1138 } 1139 1139 1140 1140 dev_dbg(&indio_dev->dev, "Registered device %s\n", name); 1141 1141 return 0; 1142 1142 1143 + err_pm_cleanup: 1144 + pm_runtime_dont_use_autosuspend(&client->dev); 1145 + pm_runtime_disable(&client->dev); 1143 1146 out_poweroff: 1144 1147 mma9551_set_device_state(client, false); 1145 1148 return ret;

+1 -1

drivers/iio/adc/ad7124.c

··· 76 76 #define AD7124_CONFIG_REF_SEL(x) FIELD_PREP(AD7124_CONFIG_REF_SEL_MSK, x) 77 77 #define AD7124_CONFIG_PGA_MSK GENMASK(2, 0) 78 78 #define AD7124_CONFIG_PGA(x) FIELD_PREP(AD7124_CONFIG_PGA_MSK, x) 79 - #define AD7124_CONFIG_IN_BUFF_MSK GENMASK(7, 6) 79 + #define AD7124_CONFIG_IN_BUFF_MSK GENMASK(6, 5) 80 80 #define AD7124_CONFIG_IN_BUFF(x) FIELD_PREP(AD7124_CONFIG_IN_BUFF_MSK, x) 81 81 82 82 /* AD7124_FILTER_X */

+8 -1

drivers/iio/adc/men_z188_adc.c

··· 103 103 struct z188_adc *adc; 104 104 struct iio_dev *indio_dev; 105 105 struct resource *mem; 106 + int ret; 106 107 107 108 indio_dev = devm_iio_device_alloc(&dev->dev, sizeof(struct z188_adc)); 108 109 if (!indio_dev) ··· 129 128 adc->mem = mem; 130 129 mcb_set_drvdata(dev, indio_dev); 131 130 132 - return iio_device_register(indio_dev); 131 + ret = iio_device_register(indio_dev); 132 + if (ret) 133 + goto err_unmap; 133 134 135 + return 0; 136 + 137 + err_unmap: 138 + iounmap(adc->base); 134 139 err: 135 140 mcb_release_mem(mem); 136 141 return -ENXIO;

+2 -2

drivers/iio/adc/ti-tsc2046.c

··· 388 388 mutex_lock(&priv->slock); 389 389 390 390 size = 0; 391 - for_each_set_bit(ch_idx, active_scan_mask, indio_dev->num_channels) { 391 + for_each_set_bit(ch_idx, active_scan_mask, ARRAY_SIZE(priv->l)) { 392 392 size += tsc2046_adc_group_set_layout(priv, group, ch_idx); 393 393 tsc2046_adc_group_set_cmd(priv, group, ch_idx); 394 394 group++; ··· 548 548 * enabled. 549 549 */ 550 550 size = 0; 551 - for (ch_idx = 0; ch_idx < priv->dcfg->num_channels; ch_idx++) 551 + for (ch_idx = 0; ch_idx < ARRAY_SIZE(priv->l); ch_idx++) 552 552 size += tsc2046_adc_group_set_layout(priv, ch_idx, ch_idx); 553 553 554 554 priv->tx = devm_kzalloc(&priv->spi->dev, size, GFP_KERNEL);

+8 -9

drivers/iio/addac/ad74413r.c

··· 134 134 #define AD74413R_CH_EN_MASK(x) BIT(x) 135 135 136 136 #define AD74413R_REG_DIN_COMP_OUT 0x25 137 - #define AD74413R_DIN_COMP_OUT_SHIFT_X(x) x 138 137 139 138 #define AD74413R_REG_ADC_RESULT_X(x) (0x26 + (x)) 140 139 #define AD74413R_ADC_RESULT_MAX GENMASK(15, 0) ··· 287 288 unsigned int offset = 0; 288 289 int ret; 289 290 290 - for_each_set_bit_from(offset, mask, AD74413R_CHANNEL_MAX) { 291 + for_each_set_bit_from(offset, mask, chip->ngpio) { 291 292 unsigned int real_offset = st->gpo_gpio_offsets[offset]; 292 293 293 294 ret = ad74413r_set_gpo_config(st, real_offset, ··· 315 316 if (ret) 316 317 return ret; 317 318 318 - status &= AD74413R_DIN_COMP_OUT_SHIFT_X(real_offset); 319 + status &= BIT(real_offset); 319 320 320 321 return status ? 1 : 0; 321 322 } ··· 333 334 if (ret) 334 335 return ret; 335 336 336 - for_each_set_bit_from(offset, mask, AD74413R_CHANNEL_MAX) { 337 + for_each_set_bit_from(offset, mask, chip->ngpio) { 337 338 unsigned int real_offset = st->comp_gpio_offsets[offset]; 338 339 339 - if (val & BIT(real_offset)) 340 - *bits |= offset; 340 + __assign_bit(offset, bits, val & BIT(real_offset)); 341 341 } 342 342 343 343 return ret; ··· 838 840 { 839 841 struct ad74413r_state *st = iio_priv(indio_dev); 840 842 struct spi_transfer *xfer = st->adc_samples_xfer; 841 - u8 *rx_buf = &st->adc_samples_buf.rx_buf[-1 * AD74413R_FRAME_SIZE]; 843 + u8 *rx_buf = st->adc_samples_buf.rx_buf; 842 844 u8 *tx_buf = st->adc_samples_tx_buf; 843 845 unsigned int channel; 844 846 int ret = -EINVAL; ··· 892 894 893 895 spi_message_add_tail(xfer, &st->adc_samples_msg); 894 896 895 - xfer++; 896 897 tx_buf += AD74413R_FRAME_SIZE; 897 - rx_buf += AD74413R_FRAME_SIZE; 898 + if (xfer != st->adc_samples_xfer) 899 + rx_buf += AD74413R_FRAME_SIZE; 900 + xfer++; 898 901 } 899 902 900 903 xfer->rx_buf = rx_buf;

+1 -1

drivers/iio/frequency/admv1013.c

··· 348 348 349 349 vcm = regulator_get_voltage(st->reg); 350 350 351 - if (vcm >= 0 && vcm < 1800000) 351 + if (vcm < 1800000) 352 352 mixer_vgate = (2389 * vcm / 1000000 + 8100) / 100; 353 353 else if (vcm > 1800000 && vcm < 2600000) 354 354 mixer_vgate = (2375 * vcm / 1000000 + 125) / 100;

+4 -1

drivers/iio/gyro/bmg160_core.c

··· 1188 1188 ret = iio_device_register(indio_dev); 1189 1189 if (ret < 0) { 1190 1190 dev_err(dev, "unable to register iio device\n"); 1191 - goto err_buffer_cleanup; 1191 + goto err_pm_cleanup; 1192 1192 } 1193 1193 1194 1194 return 0; 1195 1195 1196 + err_pm_cleanup: 1197 + pm_runtime_dont_use_autosuspend(dev); 1198 + pm_runtime_disable(dev); 1196 1199 err_buffer_cleanup: 1197 1200 iio_triggered_buffer_cleanup(indio_dev); 1198 1201 err_trigger_unregister:

+6 -1

drivers/iio/imu/adis16480.c

··· 1403 1403 { 1404 1404 const struct spi_device_id *id = spi_get_device_id(spi); 1405 1405 const struct adis_data *adis16480_data; 1406 + irq_handler_t trigger_handler = NULL; 1406 1407 struct iio_dev *indio_dev; 1407 1408 struct adis16480 *st; 1408 1409 int ret; ··· 1475 1474 st->clk_freq = st->chip_info->int_clk; 1476 1475 } 1477 1476 1477 + /* Only use our trigger handler if burst mode is supported */ 1478 + if (adis16480_data->burst_len) 1479 + trigger_handler = adis16480_trigger_handler; 1480 + 1478 1481 ret = devm_adis_setup_buffer_and_trigger(&st->adis, indio_dev, 1479 - adis16480_trigger_handler); 1482 + trigger_handler); 1480 1483 if (ret) 1481 1484 return ret; 1482 1485

+4 -1

drivers/iio/imu/kmx61.c

··· 1385 1385 ret = iio_device_register(data->acc_indio_dev); 1386 1386 if (ret < 0) { 1387 1387 dev_err(&client->dev, "Failed to register acc iio device\n"); 1388 - goto err_buffer_cleanup_mag; 1388 + goto err_pm_cleanup; 1389 1389 } 1390 1390 1391 1391 ret = iio_device_register(data->mag_indio_dev); ··· 1398 1398 1399 1399 err_iio_unregister_acc: 1400 1400 iio_device_unregister(data->acc_indio_dev); 1401 + err_pm_cleanup: 1402 + pm_runtime_dont_use_autosuspend(&client->dev); 1403 + pm_runtime_disable(&client->dev); 1401 1404 err_buffer_cleanup_mag: 1402 1405 if (client->irq > 0) 1403 1406 iio_triggered_buffer_cleanup(data->mag_indio_dev);

+5 -1

drivers/iio/imu/st_lsm6dsx/st_lsm6dsx_core.c

··· 1374 1374 if (err < 0) 1375 1375 return err; 1376 1376 1377 + /* 1378 + * we need to wait for sensor settling time before 1379 + * reading data in order to avoid corrupted samples 1380 + */ 1377 1381 delay = 1000000000 / sensor->odr; 1378 - usleep_range(delay, 2 * delay); 1382 + usleep_range(3 * delay, 4 * delay); 1379 1383 1380 1384 err = st_lsm6dsx_read_locked(hw, addr, &data, sizeof(data)); 1381 1385 if (err < 0)

+3 -2

drivers/iio/magnetometer/bmc150_magn.c

··· 962 962 ret = iio_device_register(indio_dev); 963 963 if (ret < 0) { 964 964 dev_err(dev, "unable to register iio device\n"); 965 - goto err_disable_runtime_pm; 965 + goto err_pm_cleanup; 966 966 } 967 967 968 968 dev_dbg(dev, "Registered device %s\n", name); 969 969 return 0; 970 970 971 - err_disable_runtime_pm: 971 + err_pm_cleanup: 972 + pm_runtime_dont_use_autosuspend(dev); 972 973 pm_runtime_disable(dev); 973 974 err_buffer_cleanup: 974 975 iio_triggered_buffer_cleanup(indio_dev);

+2

drivers/mtd/mtdcore.c

··· 546 546 config.stride = 1; 547 547 config.read_only = true; 548 548 config.root_only = true; 549 + config.ignore_wp = true; 549 550 config.no_of_node = !of_device_is_compatible(node, "nvmem-cells"); 550 551 config.priv = mtd; 551 552 ··· 834 833 config.owner = THIS_MODULE; 835 834 config.type = NVMEM_TYPE_OTP; 836 835 config.root_only = true; 836 + config.ignore_wp = true; 837 837 config.reg_read = reg_read; 838 838 config.size = size; 839 839 config.of_node = np;

+1 -1

drivers/nvmem/core.c

··· 771 771 772 772 if (config->wp_gpio) 773 773 nvmem->wp_gpio = config->wp_gpio; 774 - else 774 + else if (!config->ignore_wp) 775 775 nvmem->wp_gpio = gpiod_get_optional(config->dev, "wp", 776 776 GPIOD_OUT_HIGH); 777 777 if (IS_ERR(nvmem->wp_gpio)) {

+3 -1

include/linux/nvmem-provider.h

··· 70 70 * @word_size: Minimum read/write access granularity. 71 71 * @stride: Minimum read/write access stride. 72 72 * @priv: User context passed to read/write callbacks. 73 - * @wp-gpio: Write protect pin 73 + * @wp-gpio: Write protect pin 74 + * @ignore_wp: Write Protect pin is managed by the provider. 74 75 * 75 76 * Note: A default "nvmem<id>" name will be assigned to the device if 76 77 * no name is specified in its configuration. In such case "<id>" is ··· 93 92 enum nvmem_type type; 94 93 bool read_only; 95 94 bool root_only; 95 + bool ignore_wp; 96 96 struct device_node *of_node; 97 97 bool no_of_node; 98 98 nvmem_reg_read_t reg_read;

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