tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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Merge tag 'sparc-for-6.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/alarsson/linux-sparc

Pull sparc updates from Andreas Larsson:

- Add relocation handling for R_SPARC_UA64 for sparc64 that is
generated by llvm and clarify printout on missing relocation handler

- Fix missing hugetlb tte initialization for sun4u

- Code cleanup for redundant use of __GPF_NOWARN for sparc64

- Fix prototypes of reads[bwl]() for sparc64 by adding missing const
and volatile pointer qualifiers

- Fix bugs in accurate exception reporting in multiple machine specific
sparc64 variants of copy_{from,to}_user() for sparc64

- Fix memory leak in error handling for sparc32

- Drop -ansi from asflags and replace __ASSEMBLY__ with __ASSEMBLER__
in headers for all arch/sparc

- Replace strcpy() with strscpy() for all arch/sparc

* tag 'sparc-for-6.18-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/alarsson/linux-sparc: (22 commits)
sparc: Replace deprecated strcpy() with strscpy() in handle_nextprop_quirks()
sparc64: Replace deprecated strcpy() with strscpy() in build_path_component()
sparc: Replace deprecated strcpy() with strscpy() in prom_32.c
sparc: Replace deprecated strcpy() with strscpy() in domain services driver
sparc64: Replace deprecated strcpy() with strscpy() in prom_nextprop()
sparc: floppy: Replace deprecated strcpy() with strscpy() in sun_floppy_init()
sparc: parport: Replace deprecated strcpy() with strscpy() in ecpp_probe()
sparc: PCI: Replace deprecated strcpy() with strscpy()
sparc: Replace __ASSEMBLY__ with __ASSEMBLER__ in non-uapi headers
sparc: Replace __ASSEMBLY__ with __ASSEMBLER__ in uapi headers
sparc: Drop the "-ansi" from the asflags
sparc: fix error handling in scan_one_device()
sparc: fix accurate exception reporting in copy_{from,to}_user for M7
sparc: fix accurate exception reporting in copy_to_user for Niagara 4
sparc: fix accurate exception reporting in copy_{from_to}_user for Niagara
sparc: fix accurate exception reporting in copy_{from_to}_user for UltraSPARC III
sparc: fix accurate exception reporting in copy_{from_to}_user for UltraSPARC
sparc64: fix prototypes of reads[bwl]()
sparc64: Remove redundant __GFP_NOWARN
sparc64: fix hugetlb for sun4u
...

Linus Torvalds c4c8bcab 86bcf7be

+312 -262
+2 -2
arch/sparc/include/asm/adi_64.h
··· 9 9 10 10 #include <linux/types.h> 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 14 14 struct adi_caps { 15 15 __u64 blksz; ··· 41 41 return adi_state.caps.nbits; 42 42 } 43 43 44 - #endif /* __ASSEMBLY__ */ 44 + #endif /* __ASSEMBLER__ */ 45 45 46 46 #endif /* !(__ASM_SPARC64_ADI_H) */
+2 -2
arch/sparc/include/asm/auxio.h
··· 2 2 #ifndef ___ASM_SPARC_AUXIO_H 3 3 #define ___ASM_SPARC_AUXIO_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 extern void __iomem *auxio_register; 8 8 9 - #endif /* ifndef __ASSEMBLY__ */ 9 + #endif /* ifndef __ASSEMBLER__ */ 10 10 11 11 #if defined(__sparc__) && defined(__arch64__) 12 12 #include <asm/auxio_64.h>
+2 -2
arch/sparc/include/asm/auxio_32.h
··· 29 29 #define AUXIO_FLPY_EJCT 0x02 /* Eject floppy disk. Write only. */ 30 30 #define AUXIO_LED 0x01 /* On if set, off if unset. Read/Write */ 31 31 32 - #ifndef __ASSEMBLY__ 32 + #ifndef __ASSEMBLER__ 33 33 34 34 /* 35 35 * NOTE: these routines are implementation dependent-- ··· 75 75 } \ 76 76 } while (0) 77 77 78 - #endif /* !(__ASSEMBLY__) */ 78 + #endif /* !(__ASSEMBLER__) */ 79 79 80 80 81 81 /* AUXIO2 (Power Off Control) */
+2 -2
arch/sparc/include/asm/auxio_64.h
··· 74 74 #define AUXIO_PCIO_CPWR_OFF 0x02 /* Courtesy Power Off */ 75 75 #define AUXIO_PCIO_SPWR_OFF 0x01 /* System Power Off */ 76 76 77 - #ifndef __ASSEMBLY__ 77 + #ifndef __ASSEMBLER__ 78 78 79 79 #define AUXIO_LTE_ON 1 80 80 #define AUXIO_LTE_OFF 0 ··· 94 94 */ 95 95 void auxio_set_led(int on); 96 96 97 - #endif /* ifndef __ASSEMBLY__ */ 97 + #endif /* ifndef __ASSEMBLER__ */ 98 98 99 99 #endif /* !(_SPARC64_AUXIO_H) */
+2 -2
arch/sparc/include/asm/cacheflush_64.h
··· 4 4 5 5 #include <asm/page.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 9 9 #include <linux/mm.h> 10 10 ··· 78 78 #define flush_cache_vmap_early(start, end) do { } while (0) 79 79 #define flush_cache_vunmap(start, end) do { } while (0) 80 80 81 - #endif /* !__ASSEMBLY__ */ 81 + #endif /* !__ASSEMBLER__ */ 82 82 83 83 #endif /* _SPARC64_CACHEFLUSH_H */
+2 -2
arch/sparc/include/asm/cpudata.h
··· 2 2 #ifndef ___ASM_SPARC_CPUDATA_H 3 3 #define ___ASM_SPARC_CPUDATA_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <linux/threads.h> 8 8 #include <linux/percpu.h> 9 9 10 10 extern const struct seq_operations cpuinfo_op; 11 11 12 - #endif /* !(__ASSEMBLY__) */ 12 + #endif /* !(__ASSEMBLER__) */ 13 13 14 14 #if defined(__sparc__) && defined(__arch64__) 15 15 #include <asm/cpudata_64.h>
+2 -2
arch/sparc/include/asm/cpudata_64.h
··· 7 7 #ifndef _SPARC64_CPUDATA_H 8 8 #define _SPARC64_CPUDATA_H 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 typedef struct { 13 13 /* Dcache line 1 */ ··· 35 35 #define cpu_data(__cpu) per_cpu(__cpu_data, (__cpu)) 36 36 #define local_cpu_data() (*this_cpu_ptr(&__cpu_data)) 37 37 38 - #endif /* !(__ASSEMBLY__) */ 38 + #endif /* !(__ASSEMBLER__) */ 39 39 40 40 #include <asm/trap_block.h> 41 41
+2 -2
arch/sparc/include/asm/delay_64.h
··· 7 7 #ifndef _SPARC64_DELAY_H 8 8 #define _SPARC64_DELAY_H 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 void __delay(unsigned long loops); 13 13 void udelay(unsigned long usecs); 14 14 #define mdelay(n) udelay((n) * 1000) 15 15 16 - #endif /* !__ASSEMBLY__ */ 16 + #endif /* !__ASSEMBLER__ */ 17 17 18 18 #endif /* _SPARC64_DELAY_H */
+1
arch/sparc/include/asm/elf_64.h
··· 58 58 #define R_SPARC_7 43 59 59 #define R_SPARC_5 44 60 60 #define R_SPARC_6 45 61 + #define R_SPARC_UA64 54 61 62 62 63 /* Bits present in AT_HWCAP, primarily for Sparc32. */ 63 64 #define HWCAP_SPARC_FLUSH 0x00000001
+2 -1
arch/sparc/include/asm/floppy_64.h
··· 13 13 #include <linux/of.h> 14 14 #include <linux/of_platform.h> 15 15 #include <linux/dma-mapping.h> 16 + #include <linux/string.h> 16 17 17 18 #include <asm/auxio.h> 18 19 ··· 616 615 sun_pci_fd_ebus_dma.callback = sun_pci_fd_dma_callback; 617 616 sun_pci_fd_ebus_dma.client_cookie = NULL; 618 617 sun_pci_fd_ebus_dma.irq = FLOPPY_IRQ; 619 - strcpy(sun_pci_fd_ebus_dma.name, "floppy"); 618 + strscpy(sun_pci_fd_ebus_dma.name, "floppy"); 620 619 if (ebus_dma_register(&sun_pci_fd_ebus_dma)) 621 620 return 0; 622 621
+1 -1
arch/sparc/include/asm/ftrace.h
··· 6 6 #define MCOUNT_ADDR ((unsigned long)(_mcount)) 7 7 #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ 8 8 9 - #ifndef __ASSEMBLY__ 9 + #ifndef __ASSEMBLER__ 10 10 void _mcount(void); 11 11 #endif 12 12
+1 -1
arch/sparc/include/asm/hvtramp.h
··· 2 2 #ifndef _SPARC64_HVTRAP_H 3 3 #define _SPARC64_HVTRAP_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <linux/types.h> 8 8
+46 -46
arch/sparc/include/asm/hypervisor.h
··· 102 102 */ 103 103 #define HV_FAST_MACH_EXIT 0x00 104 104 105 - #ifndef __ASSEMBLY__ 105 + #ifndef __ASSEMBLER__ 106 106 void sun4v_mach_exit(unsigned long exit_code); 107 107 #endif 108 108 ··· 131 131 */ 132 132 #define HV_FAST_MACH_DESC 0x01 133 133 134 - #ifndef __ASSEMBLY__ 134 + #ifndef __ASSEMBLER__ 135 135 unsigned long sun4v_mach_desc(unsigned long buffer_pa, 136 136 unsigned long buf_len, 137 137 unsigned long *real_buf_len); ··· 152 152 */ 153 153 #define HV_FAST_MACH_SIR 0x02 154 154 155 - #ifndef __ASSEMBLY__ 155 + #ifndef __ASSEMBLER__ 156 156 void sun4v_mach_sir(void); 157 157 #endif 158 158 ··· 208 208 */ 209 209 #define HV_FAST_MACH_SET_WATCHDOG 0x05 210 210 211 - #ifndef __ASSEMBLY__ 211 + #ifndef __ASSEMBLER__ 212 212 unsigned long sun4v_mach_set_watchdog(unsigned long timeout, 213 213 unsigned long *orig_timeout); 214 214 #endif ··· 254 254 */ 255 255 #define HV_FAST_CPU_START 0x10 256 256 257 - #ifndef __ASSEMBLY__ 257 + #ifndef __ASSEMBLER__ 258 258 unsigned long sun4v_cpu_start(unsigned long cpuid, 259 259 unsigned long pc, 260 260 unsigned long rtba, ··· 282 282 */ 283 283 #define HV_FAST_CPU_STOP 0x11 284 284 285 - #ifndef __ASSEMBLY__ 285 + #ifndef __ASSEMBLER__ 286 286 unsigned long sun4v_cpu_stop(unsigned long cpuid); 287 287 #endif 288 288 ··· 299 299 */ 300 300 #define HV_FAST_CPU_YIELD 0x12 301 301 302 - #ifndef __ASSEMBLY__ 302 + #ifndef __ASSEMBLER__ 303 303 unsigned long sun4v_cpu_yield(void); 304 304 #endif 305 305 ··· 317 317 */ 318 318 #define HV_FAST_CPU_POKE 0x13 319 319 320 - #ifndef __ASSEMBLY__ 320 + #ifndef __ASSEMBLER__ 321 321 unsigned long sun4v_cpu_poke(unsigned long cpuid); 322 322 #endif 323 323 ··· 363 363 #define HV_CPU_QUEUE_RES_ERROR 0x3e 364 364 #define HV_CPU_QUEUE_NONRES_ERROR 0x3f 365 365 366 - #ifndef __ASSEMBLY__ 366 + #ifndef __ASSEMBLER__ 367 367 unsigned long sun4v_cpu_qconf(unsigned long type, 368 368 unsigned long queue_paddr, 369 369 unsigned long num_queue_entries); ··· 416 416 */ 417 417 #define HV_FAST_CPU_MONDO_SEND 0x42 418 418 419 - #ifndef __ASSEMBLY__ 419 + #ifndef __ASSEMBLER__ 420 420 unsigned long sun4v_cpu_mondo_send(unsigned long cpu_count, 421 421 unsigned long cpu_list_pa, 422 422 unsigned long mondo_block_pa); ··· 449 449 #define HV_CPU_STATE_RUNNING 0x02 450 450 #define HV_CPU_STATE_ERROR 0x03 451 451 452 - #ifndef __ASSEMBLY__ 452 + #ifndef __ASSEMBLER__ 453 453 long sun4v_cpu_state(unsigned long cpuid); 454 454 #endif 455 455 ··· 485 485 * 486 486 * Layout of a TSB description for mmu_tsb_ctx{,non}0() calls. 487 487 */ 488 - #ifndef __ASSEMBLY__ 488 + #ifndef __ASSEMBLER__ 489 489 struct hv_tsb_descr { 490 490 unsigned short pgsz_idx; 491 491 unsigned short assoc; ··· 536 536 * The fault status block is a multiple of 64-bytes and must be aligned 537 537 * on a 64-byte boundary. 538 538 */ 539 - #ifndef __ASSEMBLY__ 539 + #ifndef __ASSEMBLER__ 540 540 struct hv_fault_status { 541 541 unsigned long i_fault_type; 542 542 unsigned long i_fault_addr; ··· 651 651 */ 652 652 #define HV_FAST_MMU_TSB_CTX0 0x20 653 653 654 - #ifndef __ASSEMBLY__ 654 + #ifndef __ASSEMBLER__ 655 655 unsigned long sun4v_mmu_tsb_ctx0(unsigned long num_descriptions, 656 656 unsigned long tsb_desc_ra); 657 657 #endif ··· 736 736 */ 737 737 #define HV_FAST_MMU_DEMAP_ALL 0x24 738 738 739 - #ifndef __ASSEMBLY__ 739 + #ifndef __ASSEMBLER__ 740 740 void sun4v_mmu_demap_all(void); 741 741 #endif 742 742 ··· 766 766 */ 767 767 #define HV_FAST_MMU_MAP_PERM_ADDR 0x25 768 768 769 - #ifndef __ASSEMBLY__ 769 + #ifndef __ASSEMBLER__ 770 770 unsigned long sun4v_mmu_map_perm_addr(unsigned long vaddr, 771 771 unsigned long set_to_zero, 772 772 unsigned long tte, ··· 990 990 */ 991 991 992 992 #define HV_CCB_SUBMIT 0x34 993 - #ifndef __ASSEMBLY__ 993 + #ifndef __ASSEMBLER__ 994 994 unsigned long sun4v_ccb_submit(unsigned long ccb_buf, 995 995 unsigned long len, 996 996 unsigned long flags, ··· 1035 1035 */ 1036 1036 1037 1037 #define HV_CCB_INFO 0x35 1038 - #ifndef __ASSEMBLY__ 1038 + #ifndef __ASSEMBLER__ 1039 1039 unsigned long sun4v_ccb_info(unsigned long ca, 1040 1040 void *info_arr); 1041 1041 #endif ··· 1069 1069 */ 1070 1070 1071 1071 #define HV_CCB_KILL 0x36 1072 - #ifndef __ASSEMBLY__ 1072 + #ifndef __ASSEMBLER__ 1073 1073 unsigned long sun4v_ccb_kill(unsigned long ca, 1074 1074 void *kill_status); 1075 1075 #endif ··· 1104 1104 */ 1105 1105 #define HV_FAST_TOD_GET 0x50 1106 1106 1107 - #ifndef __ASSEMBLY__ 1107 + #ifndef __ASSEMBLER__ 1108 1108 unsigned long sun4v_tod_get(unsigned long *time); 1109 1109 #endif 1110 1110 ··· 1121 1121 */ 1122 1122 #define HV_FAST_TOD_SET 0x51 1123 1123 1124 - #ifndef __ASSEMBLY__ 1124 + #ifndef __ASSEMBLER__ 1125 1125 unsigned long sun4v_tod_set(unsigned long time); 1126 1126 #endif 1127 1127 ··· 1197 1197 */ 1198 1198 #define HV_FAST_CONS_WRITE 0x63 1199 1199 1200 - #ifndef __ASSEMBLY__ 1200 + #ifndef __ASSEMBLER__ 1201 1201 long sun4v_con_getchar(long *status); 1202 1202 long sun4v_con_putchar(long c); 1203 1203 long sun4v_con_read(unsigned long buffer, ··· 1239 1239 #define HV_SOFT_STATE_NORMAL 0x01 1240 1240 #define HV_SOFT_STATE_TRANSITION 0x02 1241 1241 1242 - #ifndef __ASSEMBLY__ 1242 + #ifndef __ASSEMBLER__ 1243 1243 unsigned long sun4v_mach_set_soft_state(unsigned long soft_state, 1244 1244 unsigned long msg_string_ra); 1245 1245 #endif ··· 1318 1318 */ 1319 1319 #define HV_FAST_SVC_CLRSTATUS 0x84 1320 1320 1321 - #ifndef __ASSEMBLY__ 1321 + #ifndef __ASSEMBLER__ 1322 1322 unsigned long sun4v_svc_send(unsigned long svc_id, 1323 1323 unsigned long buffer, 1324 1324 unsigned long buffer_size, ··· 1348 1348 * start (offset 0) of the trap trace buffer, and is described as 1349 1349 * follows: 1350 1350 */ 1351 - #ifndef __ASSEMBLY__ 1351 + #ifndef __ASSEMBLER__ 1352 1352 struct hv_trap_trace_control { 1353 1353 unsigned long head_offset; 1354 1354 unsigned long tail_offset; ··· 1367 1367 * 1368 1368 * Each trap trace buffer entry is laid out as follows: 1369 1369 */ 1370 - #ifndef __ASSEMBLY__ 1370 + #ifndef __ASSEMBLER__ 1371 1371 struct hv_trap_trace_entry { 1372 1372 unsigned char type; /* Hypervisor or guest entry? */ 1373 1373 unsigned char hpstate; /* Hyper-privileged state */ ··· 1617 1617 */ 1618 1618 #define HV_FAST_INTR_DEVINO2SYSINO 0xa0 1619 1619 1620 - #ifndef __ASSEMBLY__ 1620 + #ifndef __ASSEMBLER__ 1621 1621 unsigned long sun4v_devino_to_sysino(unsigned long devhandle, 1622 1622 unsigned long devino); 1623 1623 #endif ··· 1635 1635 */ 1636 1636 #define HV_FAST_INTR_GETENABLED 0xa1 1637 1637 1638 - #ifndef __ASSEMBLY__ 1638 + #ifndef __ASSEMBLER__ 1639 1639 unsigned long sun4v_intr_getenabled(unsigned long sysino); 1640 1640 #endif 1641 1641 ··· 1651 1651 */ 1652 1652 #define HV_FAST_INTR_SETENABLED 0xa2 1653 1653 1654 - #ifndef __ASSEMBLY__ 1654 + #ifndef __ASSEMBLER__ 1655 1655 unsigned long sun4v_intr_setenabled(unsigned long sysino, 1656 1656 unsigned long intr_enabled); 1657 1657 #endif ··· 1668 1668 */ 1669 1669 #define HV_FAST_INTR_GETSTATE 0xa3 1670 1670 1671 - #ifndef __ASSEMBLY__ 1671 + #ifndef __ASSEMBLER__ 1672 1672 unsigned long sun4v_intr_getstate(unsigned long sysino); 1673 1673 #endif 1674 1674 ··· 1688 1688 */ 1689 1689 #define HV_FAST_INTR_SETSTATE 0xa4 1690 1690 1691 - #ifndef __ASSEMBLY__ 1691 + #ifndef __ASSEMBLER__ 1692 1692 unsigned long sun4v_intr_setstate(unsigned long sysino, unsigned long intr_state); 1693 1693 #endif 1694 1694 ··· 1706 1706 */ 1707 1707 #define HV_FAST_INTR_GETTARGET 0xa5 1708 1708 1709 - #ifndef __ASSEMBLY__ 1709 + #ifndef __ASSEMBLER__ 1710 1710 unsigned long sun4v_intr_gettarget(unsigned long sysino); 1711 1711 #endif 1712 1712 ··· 1723 1723 */ 1724 1724 #define HV_FAST_INTR_SETTARGET 0xa6 1725 1725 1726 - #ifndef __ASSEMBLY__ 1726 + #ifndef __ASSEMBLER__ 1727 1727 unsigned long sun4v_intr_settarget(unsigned long sysino, unsigned long cpuid); 1728 1728 #endif 1729 1729 ··· 1807 1807 */ 1808 1808 #define HV_FAST_VINTR_SET_TARGET 0xae 1809 1809 1810 - #ifndef __ASSEMBLY__ 1810 + #ifndef __ASSEMBLER__ 1811 1811 unsigned long sun4v_vintr_get_cookie(unsigned long dev_handle, 1812 1812 unsigned long dev_ino, 1813 1813 unsigned long *cookie); ··· 3047 3047 #define LDC_MTE_SZ64K 0x0000000000000001 /* 64K page */ 3048 3048 #define LDC_MTE_SZ8K 0x0000000000000000 /* 8K page */ 3049 3049 3050 - #ifndef __ASSEMBLY__ 3050 + #ifndef __ASSEMBLER__ 3051 3051 struct ldc_mtable_entry { 3052 3052 unsigned long mte; 3053 3053 unsigned long cookie; ··· 3130 3130 */ 3131 3131 #define HV_FAST_LDC_REVOKE 0xef 3132 3132 3133 - #ifndef __ASSEMBLY__ 3133 + #ifndef __ASSEMBLER__ 3134 3134 unsigned long sun4v_ldc_tx_qconf(unsigned long channel, 3135 3135 unsigned long ra, 3136 3136 unsigned long num_entries); ··· 3230 3230 #define HV_FAST_N2_GET_PERFREG 0x104 3231 3231 #define HV_FAST_N2_SET_PERFREG 0x105 3232 3232 3233 - #ifndef __ASSEMBLY__ 3233 + #ifndef __ASSEMBLER__ 3234 3234 unsigned long sun4v_niagara_getperf(unsigned long reg, 3235 3235 unsigned long *val); 3236 3236 unsigned long sun4v_niagara_setperf(unsigned long reg, ··· 3247 3247 * a buffer where these statistics can be collected. It is continually 3248 3248 * updated once configured. The layout is as follows: 3249 3249 */ 3250 - #ifndef __ASSEMBLY__ 3250 + #ifndef __ASSEMBLER__ 3251 3251 struct hv_mmu_statistics { 3252 3252 unsigned long immu_tsb_hits_ctx0_8k_tte; 3253 3253 unsigned long immu_tsb_ticks_ctx0_8k_tte; ··· 3332 3332 */ 3333 3333 #define HV_FAST_MMUSTAT_INFO 0x103 3334 3334 3335 - #ifndef __ASSEMBLY__ 3335 + #ifndef __ASSEMBLER__ 3336 3336 unsigned long sun4v_mmustat_conf(unsigned long ra, unsigned long *orig_ra); 3337 3337 unsigned long sun4v_mmustat_info(unsigned long *ra); 3338 3338 #endif ··· 3343 3343 #define HV_NCS_QCONF 0x01 3344 3344 #define HV_NCS_QTAIL_UPDATE 0x02 3345 3345 3346 - #ifndef __ASSEMBLY__ 3346 + #ifndef __ASSEMBLER__ 3347 3347 struct hv_ncs_queue_entry { 3348 3348 /* MAU Control Register */ 3349 3349 unsigned long mau_control; ··· 3422 3422 */ 3423 3423 #define HV_FAST_NCS_REQUEST 0x110 3424 3424 3425 - #ifndef __ASSEMBLY__ 3425 + #ifndef __ASSEMBLER__ 3426 3426 unsigned long sun4v_ncs_request(unsigned long request, 3427 3427 unsigned long arg_ra, 3428 3428 unsigned long arg_size); ··· 3433 3433 3434 3434 #define HV_FAST_REBOOT_DATA_SET 0x172 3435 3435 3436 - #ifndef __ASSEMBLY__ 3436 + #ifndef __ASSEMBLER__ 3437 3437 unsigned long sun4v_reboot_data_set(unsigned long ra, 3438 3438 unsigned long len); 3439 3439 #endif ··· 3441 3441 #define HV_FAST_VT_GET_PERFREG 0x184 3442 3442 #define HV_FAST_VT_SET_PERFREG 0x185 3443 3443 3444 - #ifndef __ASSEMBLY__ 3444 + #ifndef __ASSEMBLER__ 3445 3445 unsigned long sun4v_vt_get_perfreg(unsigned long reg_num, 3446 3446 unsigned long *reg_val); 3447 3447 unsigned long sun4v_vt_set_perfreg(unsigned long reg_num, ··· 3451 3451 #define HV_FAST_T5_GET_PERFREG 0x1a8 3452 3452 #define HV_FAST_T5_SET_PERFREG 0x1a9 3453 3453 3454 - #ifndef __ASSEMBLY__ 3454 + #ifndef __ASSEMBLER__ 3455 3455 unsigned long sun4v_t5_get_perfreg(unsigned long reg_num, 3456 3456 unsigned long *reg_val); 3457 3457 unsigned long sun4v_t5_set_perfreg(unsigned long reg_num, ··· 3462 3462 #define HV_FAST_M7_GET_PERFREG 0x43 3463 3463 #define HV_FAST_M7_SET_PERFREG 0x44 3464 3464 3465 - #ifndef __ASSEMBLY__ 3465 + #ifndef __ASSEMBLER__ 3466 3466 unsigned long sun4v_m7_get_perfreg(unsigned long reg_num, 3467 3467 unsigned long *reg_val); 3468 3468 unsigned long sun4v_m7_set_perfreg(unsigned long reg_num, ··· 3506 3506 #define HV_GRP_T5_CPU 0x0211 3507 3507 #define HV_GRP_DIAG 0x0300 3508 3508 3509 - #ifndef __ASSEMBLY__ 3509 + #ifndef __ASSEMBLER__ 3510 3510 unsigned long sun4v_get_version(unsigned long group, 3511 3511 unsigned long *major, 3512 3512 unsigned long *minor);
+3 -3
arch/sparc/include/asm/io_64.h
··· 250 250 #define insw insw 251 251 #define insl insl 252 252 253 - static inline void readsb(void __iomem *port, void *buf, unsigned long count) 253 + static inline void readsb(const volatile void __iomem *port, void *buf, unsigned long count) 254 254 { 255 255 insb((unsigned long __force)port, buf, count); 256 256 } 257 257 #define readsb readsb 258 258 259 - static inline void readsw(void __iomem *port, void *buf, unsigned long count) 259 + static inline void readsw(const volatile void __iomem *port, void *buf, unsigned long count) 260 260 { 261 261 insw((unsigned long __force)port, buf, count); 262 262 } 263 263 #define readsw readsw 264 264 265 - static inline void readsl(void __iomem *port, void *buf, unsigned long count) 265 + static inline void readsl(const volatile void __iomem *port, void *buf, unsigned long count) 266 266 { 267 267 insl((unsigned long __force)port, buf, count); 268 268 }
+2 -2
arch/sparc/include/asm/irqflags_32.h
··· 11 11 #ifndef _ASM_IRQFLAGS_H 12 12 #define _ASM_IRQFLAGS_H 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 16 16 #include <linux/types.h> 17 17 #include <asm/psr.h> ··· 43 43 return arch_irqs_disabled_flags(arch_local_save_flags()); 44 44 } 45 45 46 - #endif /* (__ASSEMBLY__) */ 46 + #endif /* (__ASSEMBLER__) */ 47 47 48 48 #endif /* !(_ASM_IRQFLAGS_H) */
+2 -2
arch/sparc/include/asm/irqflags_64.h
··· 13 13 14 14 #include <asm/pil.h> 15 15 16 - #ifndef __ASSEMBLY__ 16 + #ifndef __ASSEMBLER__ 17 17 18 18 static inline notrace unsigned long arch_local_save_flags(void) 19 19 { ··· 93 93 return flags; 94 94 } 95 95 96 - #endif /* (__ASSEMBLY__) */ 96 + #endif /* (__ASSEMBLER__) */ 97 97 98 98 #endif /* !(_ASM_IRQFLAGS_H) */
+2 -2
arch/sparc/include/asm/jump_label.h
··· 2 2 #ifndef _ASM_SPARC_JUMP_LABEL_H 3 3 #define _ASM_SPARC_JUMP_LABEL_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <linux/types.h> 8 8 ··· 48 48 jump_label_t key; 49 49 }; 50 50 51 - #endif /* __ASSEMBLY__ */ 51 + #endif /* __ASSEMBLER__ */ 52 52 #endif
+2 -2
arch/sparc/include/asm/kdebug_32.h
··· 19 19 20 20 #define DEBUG_BP_TRAP 126 21 21 22 - #ifndef __ASSEMBLY__ 22 + #ifndef __ASSEMBLER__ 23 23 /* The debug vector is passed in %o1 at boot time. It is a pointer to 24 24 * a structure in the debuggers address space. Here is its format. 25 25 */ ··· 64 64 DIE_OOPS, 65 65 }; 66 66 67 - #endif /* !(__ASSEMBLY__) */ 67 + #endif /* !(__ASSEMBLER__) */ 68 68 69 69 /* Some nice offset defines for assembler code. */ 70 70 #define KDEBUG_ENTRY_OFF 0x0
+4 -4
arch/sparc/include/asm/leon.h
··· 59 59 #define ASI_LEON3_SYSCTRL_CFG_SNOOPING (1 << 27) 60 60 #define ASI_LEON3_SYSCTRL_CFG_SSIZE(c) (1 << ((c >> 20) & 0xf)) 61 61 62 - #ifndef __ASSEMBLY__ 62 + #ifndef __ASSEMBLER__ 63 63 64 64 /* do a physical address bypass write, i.e. for 0x80000000 */ 65 65 static inline void leon_store_reg(unsigned long paddr, unsigned long value) ··· 132 132 return sparc_leon3_asr17() >> 28; 133 133 } 134 134 135 - #endif /*!__ASSEMBLY__*/ 135 + #endif /*!__ASSEMBLER__*/ 136 136 137 137 #ifdef CONFIG_SMP 138 138 # define LEON3_IRQ_IPI_DEFAULT 13 ··· 194 194 #define LEON2_CCR_DSETS_MASK 0x03000000UL 195 195 #define LEON2_CFG_SSIZE_MASK 0x00007000UL 196 196 197 - #ifndef __ASSEMBLY__ 197 + #ifndef __ASSEMBLER__ 198 198 struct vm_area_struct; 199 199 200 200 unsigned long leon_swprobe(unsigned long vaddr, unsigned long *paddr); ··· 247 247 248 248 #endif /* CONFIG_SMP */ 249 249 250 - #endif /* __ASSEMBLY__ */ 250 + #endif /* __ASSEMBLER__ */ 251 251 252 252 /* macros used in leon_mm.c */ 253 253 #define PFN(x) ((x) >> PAGE_SHIFT)
+3 -3
arch/sparc/include/asm/leon_amba.h
··· 8 8 #ifndef LEON_AMBA_H_INCLUDE 9 9 #define LEON_AMBA_H_INCLUDE 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 struct amba_prom_registers { 14 14 unsigned int phys_addr; /* The physical address of this register */ ··· 89 89 #define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7) 90 90 #define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0) 91 91 92 - #ifndef __ASSEMBLY__ 92 + #ifndef __ASSEMBLER__ 93 93 94 94 struct leon3_irqctrl_regs_map { 95 95 u32 ilevel; ··· 189 189 extern unsigned long leon3_gptimer_irq; 190 190 extern unsigned int sparc_leon_eirq; 191 191 192 - #endif /* __ASSEMBLY__ */ 192 + #endif /* __ASSEMBLER__ */ 193 193 194 194 #define LEON3_IO_AREA 0xfff00000 195 195 #define LEON3_CONF_AREA 0xff000
+2 -2
arch/sparc/include/asm/mman.h
··· 4 4 5 5 #include <uapi/asm/mman.h> 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 #define arch_mmap_check(addr,len,flags) sparc_mmap_check(addr,len) 9 9 int sparc_mmap_check(unsigned long addr, unsigned long len); 10 10 ··· 87 87 } 88 88 #endif /* CONFIG_SPARC64 */ 89 89 90 - #endif /* __ASSEMBLY__ */ 90 + #endif /* __ASSEMBLER__ */ 91 91 #endif /* __SPARC_MMAN_H__ */
+2 -2
arch/sparc/include/asm/mmu_64.h
··· 59 59 #define CTX_HWBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_HW_MASK) 60 60 #define CTX_NRBITS(__ctx) ((__ctx.sparc64_ctx_val) & CTX_NR_MASK) 61 61 62 - #ifndef __ASSEMBLY__ 62 + #ifndef __ASSEMBLER__ 63 63 64 64 #define TSB_ENTRY_ALIGNMENT 16 65 65 ··· 117 117 spinlock_t tag_lock; 118 118 } mm_context_t; 119 119 120 - #endif /* !__ASSEMBLY__ */ 120 + #endif /* !__ASSEMBLER__ */ 121 121 122 122 #define TSB_CONFIG_TSB 0x00 123 123 #define TSB_CONFIG_RSS_LIMIT 0x08
+2 -2
arch/sparc/include/asm/mmu_context_32.h
··· 2 2 #ifndef __SPARC_MMU_CONTEXT_H 3 3 #define __SPARC_MMU_CONTEXT_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 7 7 #include <asm-generic/mm_hooks.h> 8 8 ··· 29 29 30 30 #include <asm-generic/mmu_context.h> 31 31 32 - #endif /* !(__ASSEMBLY__) */ 32 + #endif /* !(__ASSEMBLER__) */ 33 33 34 34 #endif /* !(__SPARC_MMU_CONTEXT_H) */
+2 -2
arch/sparc/include/asm/mmu_context_64.h
··· 4 4 5 5 /* Derived heavily from Linus's Alpha/AXP ASN code... */ 6 6 7 - #ifndef __ASSEMBLY__ 7 + #ifndef __ASSEMBLER__ 8 8 9 9 #include <linux/spinlock.h> 10 10 #include <linux/mm_types.h> ··· 193 193 194 194 #include <asm-generic/mmu_context.h> 195 195 196 - #endif /* !(__ASSEMBLY__) */ 196 + #endif /* !(__ASSEMBLER__) */ 197 197 198 198 #endif /* !(__SPARC64_MMU_CONTEXT_H) */
+2 -2
arch/sparc/include/asm/mxcc.h
··· 84 84 * MID: The moduleID of the cpu your read this from. 85 85 */ 86 86 87 - #ifndef __ASSEMBLY__ 87 + #ifndef __ASSEMBLER__ 88 88 89 89 static inline void mxcc_set_stream_src(unsigned long *paddr) 90 90 { ··· 133 133 "i" (ASI_M_MXCC)); 134 134 } 135 135 136 - #endif /* !__ASSEMBLY__ */ 136 + #endif /* !__ASSEMBLER__ */ 137 137 138 138 #endif /* !(_SPARC_MXCC_H) */
+2 -2
arch/sparc/include/asm/obio.h
··· 97 97 #define CC_EREG 0x1F00E00 /* Error code register */ 98 98 #define CC_CID 0x1F00F04 /* Component ID */ 99 99 100 - #ifndef __ASSEMBLY__ 100 + #ifndef __ASSEMBLER__ 101 101 102 102 static inline int bw_get_intr_mask(int sbus_level) 103 103 { ··· 221 221 "i" (ASI_M_MXCC)); 222 222 } 223 223 224 - #endif /* !__ASSEMBLY__ */ 224 + #endif /* !__ASSEMBLER__ */ 225 225 226 226 #endif /* !(_SPARC_OBIO_H) */
+2 -2
arch/sparc/include/asm/openprom.h
··· 11 11 /* Empirical constants... */ 12 12 #define LINUX_OPPROM_MAGIC 0x10010407 13 13 14 - #ifndef __ASSEMBLY__ 14 + #ifndef __ASSEMBLER__ 15 15 #include <linux/of.h> 16 16 17 17 /* V0 prom device operations. */ ··· 275 275 unsigned int interrupt; 276 276 }; 277 277 278 - #endif /* !(__ASSEMBLY__) */ 278 + #endif /* !(__ASSEMBLER__) */ 279 279 280 280 #endif /* !(__SPARC_OPENPROM_H) */
+4 -4
arch/sparc/include/asm/page_32.h
··· 13 13 14 14 #include <vdso/page.h> 15 15 16 - #ifndef __ASSEMBLY__ 16 + #ifndef __ASSEMBLER__ 17 17 18 18 #define clear_page(page) memset((void *)(page), 0, PAGE_SIZE) 19 19 #define copy_page(to,from) memcpy((void *)(to), (void *)(from), PAGE_SIZE) ··· 108 108 109 109 #define TASK_UNMAPPED_BASE 0x50000000 110 110 111 - #else /* !(__ASSEMBLY__) */ 111 + #else /* !(__ASSEMBLER__) */ 112 112 113 113 #define __pgprot(x) (x) 114 114 115 - #endif /* !(__ASSEMBLY__) */ 115 + #endif /* !(__ASSEMBLER__) */ 116 116 117 117 #define PAGE_OFFSET 0xf0000000 118 - #ifndef __ASSEMBLY__ 118 + #ifndef __ASSEMBLER__ 119 119 extern unsigned long phys_base; 120 120 extern unsigned long pfn_base; 121 121 #endif
+4 -4
arch/sparc/include/asm/page_64.h
··· 30 30 #define HUGE_MAX_HSTATE 5 31 31 #endif 32 32 33 - #ifndef __ASSEMBLY__ 33 + #ifndef __ASSEMBLER__ 34 34 35 35 #if defined(CONFIG_HUGETLB_PAGE) || defined(CONFIG_TRANSPARENT_HUGEPAGE) 36 36 struct pt_regs; ··· 128 128 129 129 extern unsigned long PAGE_OFFSET; 130 130 131 - #endif /* !(__ASSEMBLY__) */ 131 + #endif /* !(__ASSEMBLER__) */ 132 132 133 133 /* The maximum number of physical memory address bits we support. The 134 134 * largest value we can support is whatever "KPGD_SHIFT + KPTE_BITS" ··· 139 139 #define ILOG2_4MB 22 140 140 #define ILOG2_256MB 28 141 141 142 - #ifndef __ASSEMBLY__ 142 + #ifndef __ASSEMBLER__ 143 143 144 144 #define __pa(x) ((unsigned long)(x) - PAGE_OFFSET) 145 145 #define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET)) ··· 153 153 #define virt_to_phys __pa 154 154 #define phys_to_virt __va 155 155 156 - #endif /* !(__ASSEMBLY__) */ 156 + #endif /* !(__ASSEMBLER__) */ 157 157 158 158 #include <asm-generic/getorder.h> 159 159
+2 -1
arch/sparc/include/asm/parport_64.h
··· 9 9 10 10 #include <linux/of.h> 11 11 #include <linux/platform_device.h> 12 + #include <linux/string.h> 12 13 13 14 #include <asm/ebus_dma.h> 14 15 #include <asm/ns87303.h> ··· 150 149 sparc_ebus_dmas[slot].info.callback = NULL; 151 150 sparc_ebus_dmas[slot].info.client_cookie = NULL; 152 151 sparc_ebus_dmas[slot].info.irq = 0xdeadbeef; 153 - strcpy(sparc_ebus_dmas[slot].info.name, "parport"); 152 + strscpy(sparc_ebus_dmas[slot].info.name, "parport"); 154 153 if (ebus_dma_register(&sparc_ebus_dmas[slot].info)) 155 154 goto out_unmap_regs; 156 155
+1 -1
arch/sparc/include/asm/pcic.h
··· 8 8 #ifndef __SPARC_PCIC_H 9 9 #define __SPARC_PCIC_H 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 #include <linux/types.h> 14 14 #include <linux/smp.h>
+2 -2
arch/sparc/include/asm/pgtable_32.h
··· 21 21 #define PGDIR_MASK (~(PGDIR_SIZE-1)) 22 22 #define PGDIR_ALIGN(__addr) (((__addr) + ~PGDIR_MASK) & PGDIR_MASK) 23 23 24 - #ifndef __ASSEMBLY__ 24 + #ifndef __ASSEMBLER__ 25 25 #include <asm-generic/pgtable-nopud.h> 26 26 27 27 #include <linux/spinlock.h> ··· 423 423 __changed; \ 424 424 }) 425 425 426 - #endif /* !(__ASSEMBLY__) */ 426 + #endif /* !(__ASSEMBLER__) */ 427 427 428 428 #define VMALLOC_START _AC(0xfe600000,UL) 429 429 #define VMALLOC_END _AC(0xffc00000,UL)
+4 -4
arch/sparc/include/asm/pgtable_64.h
··· 79 79 #error PMD_SHIFT must equal HPAGE_SHIFT for transparent huge pages. 80 80 #endif 81 81 82 - #ifndef __ASSEMBLY__ 82 + #ifndef __ASSEMBLER__ 83 83 84 84 extern unsigned long VMALLOC_END; 85 85 ··· 106 106 pr_err("%s:%d: bad pgd %p(%016lx) seen at (%pS)\n", \ 107 107 __FILE__, __LINE__, &(e), pgd_val(e), __builtin_return_address(0)) 108 108 109 - #endif /* !(__ASSEMBLY__) */ 109 + #endif /* !(__ASSEMBLER__) */ 110 110 111 111 /* PTE bits which are the same in SUN4U and SUN4V format. */ 112 112 #define _PAGE_VALID _AC(0x8000000000000000,UL) /* Valid TTE */ ··· 191 191 /* We borrow bit 20 to store the exclusive marker in swap PTEs. */ 192 192 #define _PAGE_SWP_EXCLUSIVE _AC(0x0000000000100000, UL) 193 193 194 - #ifndef __ASSEMBLY__ 194 + #ifndef __ASSEMBLER__ 195 195 196 196 pte_t mk_pte_io(unsigned long, pgprot_t, int, unsigned long); 197 197 ··· 1177 1177 1178 1178 #endif /* CONFIG_HUGETLB_PAGE */ 1179 1179 1180 - #endif /* !(__ASSEMBLY__) */ 1180 + #endif /* !(__ASSEMBLER__) */ 1181 1181 1182 1182 #endif /* !(_SPARC64_PGTABLE_H) */
+3 -3
arch/sparc/include/asm/pgtsrmmu.h
··· 10 10 11 11 #include <asm/page.h> 12 12 13 - #ifdef __ASSEMBLY__ 13 + #ifdef __ASSEMBLER__ 14 14 #include <asm/thread_info.h> /* TI_UWINMASK for WINDOW_FLUSH */ 15 15 #endif 16 16 ··· 97 97 bne 99b; \ 98 98 restore %g0, %g0, %g0; 99 99 100 - #ifndef __ASSEMBLY__ 100 + #ifndef __ASSEMBLER__ 101 101 extern unsigned long last_valid_pfn; 102 102 103 103 /* This makes sense. Honest it does - Anton */ ··· 136 136 return entry; 137 137 } 138 138 139 - #endif /* !(__ASSEMBLY__) */ 139 + #endif /* !(__ASSEMBLER__) */ 140 140 141 141 #endif /* !(_SPARC_PGTSRMMU_H) */
+5 -5
arch/sparc/include/asm/processor_64.h
··· 21 21 * XXX No longer using virtual page tables, kill this upper limit... 22 22 */ 23 23 #define VA_BITS 44 24 - #ifndef __ASSEMBLY__ 24 + #ifndef __ASSEMBLER__ 25 25 #define VPTE_SIZE (1UL << (VA_BITS - PAGE_SHIFT + 3)) 26 26 #else 27 27 #define VPTE_SIZE (1 << (VA_BITS - PAGE_SHIFT + 3)) ··· 45 45 46 46 #endif 47 47 48 - #ifndef __ASSEMBLY__ 48 + #ifndef __ASSEMBLER__ 49 49 50 50 /* The Sparc processor specific thread struct. */ 51 51 /* XXX This should die, everything can go into thread_info now. */ ··· 62 62 #endif 63 63 }; 64 64 65 - #endif /* !(__ASSEMBLY__) */ 65 + #endif /* !(__ASSEMBLER__) */ 66 66 67 67 #ifndef CONFIG_DEBUG_SPINLOCK 68 68 #define INIT_THREAD { \ ··· 75 75 } 76 76 #endif /* !(CONFIG_DEBUG_SPINLOCK) */ 77 77 78 - #ifndef __ASSEMBLY__ 78 + #ifndef __ASSEMBLER__ 79 79 80 80 #include <linux/types.h> 81 81 #include <asm/fpumacro.h> ··· 242 242 243 243 int do_mathemu(struct pt_regs *regs, struct fpustate *f, bool illegal_insn_trap); 244 244 245 - #endif /* !(__ASSEMBLY__) */ 245 + #endif /* !(__ASSEMBLER__) */ 246 246 247 247 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
+2 -2
arch/sparc/include/asm/psr.h
··· 14 14 #include <uapi/asm/psr.h> 15 15 16 16 17 - #ifndef __ASSEMBLY__ 17 + #ifndef __ASSEMBLER__ 18 18 /* Get the %psr register. */ 19 19 static inline unsigned int get_psr(void) 20 20 { ··· 63 63 return fsr; 64 64 } 65 65 66 - #endif /* !(__ASSEMBLY__) */ 66 + #endif /* !(__ASSEMBLER__) */ 67 67 68 68 #endif /* !(__LINUX_SPARC_PSR_H) */
+6 -6
arch/sparc/include/asm/ptrace.h
··· 5 5 #include <uapi/asm/ptrace.h> 6 6 7 7 #if defined(__sparc__) && defined(__arch64__) 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 10 10 #include <linux/compiler.h> 11 11 #include <linux/threads.h> ··· 113 113 { 114 114 return regs->u_regs[UREG_I6]; 115 115 } 116 - #else /* __ASSEMBLY__ */ 117 - #endif /* __ASSEMBLY__ */ 116 + #else /* __ASSEMBLER__ */ 117 + #endif /* __ASSEMBLER__ */ 118 118 #else /* (defined(__sparc__) && defined(__arch64__)) */ 119 - #ifndef __ASSEMBLY__ 119 + #ifndef __ASSEMBLER__ 120 120 #include <asm/switch_to.h> 121 121 122 122 static inline bool pt_regs_is_syscall(struct pt_regs *regs) ··· 144 144 #define instruction_pointer(regs) ((regs)->pc) 145 145 #define user_stack_pointer(regs) ((regs)->u_regs[UREG_FP]) 146 146 unsigned long profile_pc(struct pt_regs *); 147 - #else /* (!__ASSEMBLY__) */ 148 - #endif /* (!__ASSEMBLY__) */ 147 + #else /* (!__ASSEMBLER__) */ 148 + #endif /* (!__ASSEMBLER__) */ 149 149 #endif /* (defined(__sparc__) && defined(__arch64__)) */ 150 150 #define STACK_BIAS 2047 151 151
+2 -2
arch/sparc/include/asm/ross.h
··· 95 95 #define HYPERSPARC_ICCR_FTD 0x00000002 96 96 #define HYPERSPARC_ICCR_ICE 0x00000001 97 97 98 - #ifndef __ASSEMBLY__ 98 + #ifndef __ASSEMBLER__ 99 99 100 100 static inline unsigned int get_ross_icr(void) 101 101 { ··· 187 187 } 188 188 } 189 189 190 - #endif /* !(__ASSEMBLY__) */ 190 + #endif /* !(__ASSEMBLER__) */ 191 191 192 192 #endif /* !(_SPARC_ROSS_H) */
+2 -2
arch/sparc/include/asm/sbi.h
··· 64 64 */ 65 65 66 66 67 - #ifndef __ASSEMBLY__ 67 + #ifndef __ASSEMBLER__ 68 68 69 69 static inline int acquire_sbi(int devid, int mask) 70 70 { ··· 111 111 "i" (ASI_M_CTL)); 112 112 } 113 113 114 - #endif /* !__ASSEMBLY__ */ 114 + #endif /* !__ASSEMBLER__ */ 115 115 116 116 #endif /* !(_SPARC_SBI_H) */
+2 -2
arch/sparc/include/asm/sigcontext.h
··· 5 5 #include <asm/ptrace.h> 6 6 #include <uapi/asm/sigcontext.h> 7 7 8 - #ifndef __ASSEMBLY__ 8 + #ifndef __ASSEMBLER__ 9 9 10 10 #define __SUNOS_MAXWIN 31 11 11 ··· 104 104 #endif /* (CONFIG_SPARC64) */ 105 105 106 106 107 - #endif /* !(__ASSEMBLY__) */ 107 + #endif /* !(__ASSEMBLER__) */ 108 108 109 109 #endif /* !(__SPARC_SIGCONTEXT_H) */
+3 -3
arch/sparc/include/asm/signal.h
··· 2 2 #ifndef __SPARC_SIGNAL_H 3 3 #define __SPARC_SIGNAL_H 4 4 5 - #ifndef __ASSEMBLY__ 5 + #ifndef __ASSEMBLER__ 6 6 #include <linux/personality.h> 7 7 #include <linux/types.h> 8 8 #endif 9 9 #include <uapi/asm/signal.h> 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 #define __ARCH_HAS_KA_RESTORER 14 14 #define __ARCH_HAS_SA_RESTORER 15 15 16 - #endif /* !(__ASSEMBLY__) */ 16 + #endif /* !(__ASSEMBLER__) */ 17 17 #endif /* !(__SPARC_SIGNAL_H) */
+4 -4
arch/sparc/include/asm/smp_32.h
··· 10 10 #include <linux/threads.h> 11 11 #include <asm/head.h> 12 12 13 - #ifndef __ASSEMBLY__ 13 + #ifndef __ASSEMBLER__ 14 14 15 15 #include <linux/cpumask.h> 16 16 17 - #endif /* __ASSEMBLY__ */ 17 + #endif /* __ASSEMBLER__ */ 18 18 19 19 #ifdef CONFIG_SMP 20 20 21 - #ifndef __ASSEMBLY__ 21 + #ifndef __ASSEMBLER__ 22 22 23 23 #include <asm/ptrace.h> 24 24 #include <asm/asi.h> ··· 105 105 106 106 void smp_setup_cpu_possible_map(void); 107 107 108 - #endif /* !(__ASSEMBLY__) */ 108 + #endif /* !(__ASSEMBLER__) */ 109 109 110 110 /* Sparc specific messages. */ 111 111 #define MSG_CROSS_CALL 0x0005 /* run func on cpus */
+4 -4
arch/sparc/include/asm/smp_64.h
··· 12 12 #include <asm/starfire.h> 13 13 #include <asm/spitfire.h> 14 14 15 - #ifndef __ASSEMBLY__ 15 + #ifndef __ASSEMBLER__ 16 16 17 17 #include <linux/cpumask.h> 18 18 #include <linux/cache.h> 19 19 20 - #endif /* !(__ASSEMBLY__) */ 20 + #endif /* !(__ASSEMBLER__) */ 21 21 22 22 #ifdef CONFIG_SMP 23 23 24 - #ifndef __ASSEMBLY__ 24 + #ifndef __ASSEMBLER__ 25 25 26 26 /* 27 27 * Private routines/data ··· 68 68 void __cpu_die(unsigned int cpu); 69 69 #endif 70 70 71 - #endif /* !(__ASSEMBLY__) */ 71 + #endif /* !(__ASSEMBLER__) */ 72 72 73 73 #else 74 74
+2 -2
arch/sparc/include/asm/spinlock_32.h
··· 7 7 #ifndef __SPARC_SPINLOCK_H 8 8 #define __SPARC_SPINLOCK_H 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 #include <asm/psr.h> 13 13 #include <asm/barrier.h> ··· 183 183 res; \ 184 184 }) 185 185 186 - #endif /* !(__ASSEMBLY__) */ 186 + #endif /* !(__ASSEMBLER__) */ 187 187 188 188 #endif /* __SPARC_SPINLOCK_H */
+2 -2
arch/sparc/include/asm/spinlock_64.h
··· 7 7 #ifndef __SPARC64_SPINLOCK_H 8 8 #define __SPARC64_SPINLOCK_H 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 #include <asm/processor.h> 13 13 #include <asm/barrier.h> 14 14 #include <asm/qspinlock.h> 15 15 #include <asm/qrwlock.h> 16 16 17 - #endif /* !(__ASSEMBLY__) */ 17 + #endif /* !(__ASSEMBLER__) */ 18 18 19 19 #endif /* !(__SPARC64_SPINLOCK_H) */
+2 -2
arch/sparc/include/asm/spitfire.h
··· 68 68 #define CPU_ID_M8 ('8') 69 69 #define CPU_ID_SONOMA1 ('N') 70 70 71 - #ifndef __ASSEMBLY__ 71 + #ifndef __ASSEMBLER__ 72 72 73 73 enum ultra_tlb_layout { 74 74 spitfire = 0, ··· 363 363 "i" (ASI_ITLB_DATA_ACCESS)); 364 364 } 365 365 366 - #endif /* !(__ASSEMBLY__) */ 366 + #endif /* !(__ASSEMBLER__) */ 367 367 #endif /* CONFIG_SPARC64 */ 368 368 #endif /* !(_SPARC64_SPITFIRE_H) */
+1 -1
arch/sparc/include/asm/starfire.h
··· 8 8 #ifndef _SPARC64_STARFIRE_H 9 9 #define _SPARC64_STARFIRE_H 10 10 11 - #ifndef __ASSEMBLY__ 11 + #ifndef __ASSEMBLER__ 12 12 13 13 extern int this_is_starfire; 14 14
+2 -2
arch/sparc/include/asm/thread_info_32.h
··· 14 14 15 15 #ifdef __KERNEL__ 16 16 17 - #ifndef __ASSEMBLY__ 17 + #ifndef __ASSEMBLER__ 18 18 19 19 #include <asm/ptrace.h> 20 20 #include <asm/page.h> ··· 72 72 */ 73 73 #define THREAD_SIZE_ORDER 1 74 74 75 - #endif /* __ASSEMBLY__ */ 75 + #endif /* __ASSEMBLER__ */ 76 76 77 77 /* Size of kernel stack for each process */ 78 78 #define THREAD_SIZE (2 * PAGE_SIZE)
+6 -6
arch/sparc/include/asm/thread_info_64.h
··· 26 26 27 27 #include <asm/page.h> 28 28 29 - #ifndef __ASSEMBLY__ 29 + #ifndef __ASSEMBLER__ 30 30 31 31 #include <asm/ptrace.h> 32 32 #include <asm/types.h> ··· 64 64 __attribute__ ((aligned(64))); 65 65 }; 66 66 67 - #endif /* !(__ASSEMBLY__) */ 67 + #endif /* !(__ASSEMBLER__) */ 68 68 69 69 /* offsets into the thread_info struct for assembly code access */ 70 70 #define TI_TASK 0x00000000 ··· 110 110 /* 111 111 * macros/functions for gaining access to the thread information structure 112 112 */ 113 - #ifndef __ASSEMBLY__ 113 + #ifndef __ASSEMBLER__ 114 114 115 115 #define INIT_THREAD_INFO(tsk) \ 116 116 { \ ··· 150 150 #define set_thread_fpdepth(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_FPDEPTH] = (val)) 151 151 #define get_thread_wsaved() (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED]) 152 152 #define set_thread_wsaved(val) (__cur_thread_flag_byte_ptr[TI_FLAG_BYTE_WSAVED] = (val)) 153 - #endif /* !(__ASSEMBLY__) */ 153 + #endif /* !(__ASSEMBLER__) */ 154 154 155 155 /* 156 156 * Thread information flags, only 16 bits are available as we encode ··· 228 228 * Note that there are only 8 bits available. 229 229 */ 230 230 231 - #ifndef __ASSEMBLY__ 231 + #ifndef __ASSEMBLER__ 232 232 233 233 #define thread32_stack_is_64bit(__SP) (((__SP) & 0x1) != 0) 234 234 #define test_thread_64bit_stack(__SP) \ 235 235 ((test_thread_flag(TIF_32BIT) && !thread32_stack_is_64bit(__SP)) ? \ 236 236 false : true) 237 237 238 - #endif /* !__ASSEMBLY__ */ 238 + #endif /* !__ASSEMBLER__ */ 239 239 240 240 #endif /* __KERNEL__ */ 241 241
+2 -2
arch/sparc/include/asm/trap_block.h
··· 7 7 #include <asm/hypervisor.h> 8 8 #include <asm/asi.h> 9 9 10 - #ifndef __ASSEMBLY__ 10 + #ifndef __ASSEMBLER__ 11 11 12 12 /* Trap handling code needs to get at a few critical values upon 13 13 * trap entry and to process TSB misses. These cannot be in the ··· 91 91 __sun_m7_2insn_patch_end; 92 92 93 93 94 - #endif /* !(__ASSEMBLY__) */ 94 + #endif /* !(__ASSEMBLER__) */ 95 95 96 96 #define TRAP_PER_CPU_THREAD 0x00 97 97 #define TRAP_PER_CPU_PGD_PADDR 0x08
+2 -2
arch/sparc/include/asm/traps.h
··· 9 9 10 10 #include <uapi/asm/traps.h> 11 11 12 - #ifndef __ASSEMBLY__ 12 + #ifndef __ASSEMBLER__ 13 13 /* This is for V8 compliant Sparc CPUS */ 14 14 struct tt_entry { 15 15 unsigned long inst_one; ··· 21 21 /* We set this to _start in system setup. */ 22 22 extern struct tt_entry *sparc_ttable; 23 23 24 - #endif /* !(__ASSEMBLY__) */ 24 + #endif /* !(__ASSEMBLER__) */ 25 25 #endif /* !(_SPARC_TRAPS_H) */
+1 -1
arch/sparc/include/asm/tsb.h
··· 59 59 * The kernel TSB is locked into the TLB by virtue of being in the 60 60 * kernel image, so we don't play these games for swapper_tsb access. 61 61 */ 62 - #ifndef __ASSEMBLY__ 62 + #ifndef __ASSEMBLER__ 63 63 struct tsb_ldquad_phys_patch_entry { 64 64 unsigned int addr; 65 65 unsigned int sun4u_insn;
+1 -1
arch/sparc/include/asm/ttable.h
··· 5 5 #include <asm/utrap.h> 6 6 #include <asm/pil.h> 7 7 8 - #ifdef __ASSEMBLY__ 8 + #ifdef __ASSEMBLER__ 9 9 #include <asm/thread_info.h> 10 10 #endif 11 11
+2 -2
arch/sparc/include/asm/turbosparc.h
··· 57 57 #define TURBOSPARC_WTENABLE 0x00000020 /* Write thru for dcache */ 58 58 #define TURBOSPARC_SNENABLE 0x40000000 /* DVMA snoop enable */ 59 59 60 - #ifndef __ASSEMBLY__ 60 + #ifndef __ASSEMBLER__ 61 61 62 62 /* Bits [13:5] select one of 512 instruction cache tags */ 63 63 static inline void turbosparc_inv_insn_tag(unsigned long addr) ··· 121 121 return regval; 122 122 } 123 123 124 - #endif /* !__ASSEMBLY__ */ 124 + #endif /* !__ASSEMBLER__ */ 125 125 126 126 #endif /* !(_SPARC_TURBOSPARC_H) */
+2 -2
arch/sparc/include/asm/upa.h
··· 24 24 #define UPA_PORTID_ID 0x000000000000ffff /* Module Identification bits */ 25 25 26 26 /* UPA I/O space accessors */ 27 - #if defined(__KERNEL__) && !defined(__ASSEMBLY__) 27 + #if defined(__KERNEL__) && !defined(__ASSEMBLER__) 28 28 static inline unsigned char _upa_readb(unsigned long addr) 29 29 { 30 30 unsigned char ret; ··· 105 105 #define upa_writew(__w, __addr) (_upa_writew((__w), (unsigned long)(__addr))) 106 106 #define upa_writel(__l, __addr) (_upa_writel((__l), (unsigned long)(__addr))) 107 107 #define upa_writeq(__q, __addr) (_upa_writeq((__q), (unsigned long)(__addr))) 108 - #endif /* __KERNEL__ && !__ASSEMBLY__ */ 108 + #endif /* __KERNEL__ && !__ASSEMBLER__ */ 109 109 110 110 #endif /* !(_SPARC64_UPA_H) */
+1 -1
arch/sparc/include/asm/vaddrs.h
··· 31 31 */ 32 32 #define SRMMU_NOCACHE_ALCRATIO 64 /* 256 pages per 64MB of system RAM */ 33 33 34 - #ifndef __ASSEMBLY__ 34 + #ifndef __ASSEMBLER__ 35 35 #include <asm/kmap_size.h> 36 36 37 37 enum fixed_addresses {
+2 -2
arch/sparc/include/asm/viking.h
··· 110 110 #define VIKING_PTAG_DIRTY 0x00010000 /* Block has been modified */ 111 111 #define VIKING_PTAG_SHARED 0x00000100 /* Shared with some other cache */ 112 112 113 - #ifndef __ASSEMBLY__ 113 + #ifndef __ASSEMBLER__ 114 114 115 115 static inline void viking_flush_icache(void) 116 116 { ··· 250 250 return val; 251 251 } 252 252 253 - #endif /* !__ASSEMBLY__ */ 253 + #endif /* !__ASSEMBLER__ */ 254 254 255 255 #endif /* !(_SPARC_VIKING_H) */
+1 -1
arch/sparc/include/asm/visasm.h
··· 45 45 #define VISExitHalfFast \ 46 46 wr %o5, 0, %fprs; 47 47 48 - #ifndef __ASSEMBLY__ 48 + #ifndef __ASSEMBLER__ 49 49 static inline void save_and_clear_fpu(void) { 50 50 __asm__ __volatile__ ( 51 51 " rd %%fprs, %%o5\n"
+12 -12
arch/sparc/include/uapi/asm/ptrace.h
··· 15 15 */ 16 16 #define PT_REGS_MAGIC 0x57ac6c00 17 17 18 - #ifndef __ASSEMBLY__ 18 + #ifndef __ASSEMBLER__ 19 19 20 20 #include <linux/types.h> 21 21 ··· 88 88 unsigned long _unused; 89 89 struct pt_regs *regs; 90 90 }; 91 - #endif /* (!__ASSEMBLY__) */ 91 + #endif /* (!__ASSEMBLER__) */ 92 92 #else 93 93 /* 32 bit sparc */ 94 94 ··· 97 97 /* This struct defines the way the registers are stored on the 98 98 * stack during a system call and basically all traps. 99 99 */ 100 - #ifndef __ASSEMBLY__ 100 + #ifndef __ASSEMBLER__ 101 101 102 102 #include <linux/types.h> 103 103 ··· 125 125 unsigned long xargs[6]; 126 126 unsigned long xxargs[1]; 127 127 }; 128 - #endif /* (!__ASSEMBLY__) */ 128 + #endif /* (!__ASSEMBLER__) */ 129 129 130 130 #endif /* (defined(__sparc__) && defined(__arch64__))*/ 131 131 132 - #ifndef __ASSEMBLY__ 132 + #ifndef __ASSEMBLER__ 133 133 134 134 #define TRACEREG_SZ sizeof(struct pt_regs) 135 135 #define STACKFRAME_SZ sizeof(struct sparc_stackf) ··· 137 137 #define TRACEREG32_SZ sizeof(struct pt_regs32) 138 138 #define STACKFRAME32_SZ sizeof(struct sparc_stackf32) 139 139 140 - #endif /* (!__ASSEMBLY__) */ 140 + #endif /* (!__ASSEMBLER__) */ 141 141 142 142 #define UREG_G0 0 143 143 #define UREG_G1 1 ··· 161 161 #if defined(__sparc__) && defined(__arch64__) 162 162 /* 64 bit sparc */ 163 163 164 - #ifndef __ASSEMBLY__ 164 + #ifndef __ASSEMBLER__ 165 165 166 166 167 - #else /* __ASSEMBLY__ */ 167 + #else /* __ASSEMBLER__ */ 168 168 /* For assembly code. */ 169 169 #define TRACEREG_SZ 0xa0 170 170 #define STACKFRAME_SZ 0xc0 171 171 172 172 #define TRACEREG32_SZ 0x50 173 173 #define STACKFRAME32_SZ 0x60 174 - #endif /* __ASSEMBLY__ */ 174 + #endif /* __ASSEMBLER__ */ 175 175 176 176 #else /* (defined(__sparc__) && defined(__arch64__)) */ 177 177 178 178 /* 32 bit sparc */ 179 179 180 - #ifndef __ASSEMBLY__ 180 + #ifndef __ASSEMBLER__ 181 181 182 182 183 - #else /* (!__ASSEMBLY__) */ 183 + #else /* (!__ASSEMBLER__) */ 184 184 /* For assembly code. */ 185 185 #define TRACEREG_SZ 0x50 186 186 #define STACKFRAME_SZ 0x60 187 - #endif /* (!__ASSEMBLY__) */ 187 + #endif /* (!__ASSEMBLER__) */ 188 188 189 189 #endif /* (defined(__sparc__) && defined(__arch64__)) */ 190 190
+2 -2
arch/sparc/include/uapi/asm/signal.h
··· 105 105 #define __old_sigaction32 sigaction32 106 106 #endif 107 107 108 - #ifndef __ASSEMBLY__ 108 + #ifndef __ASSEMBLER__ 109 109 110 110 typedef unsigned long __old_sigset_t; /* at least 32 bits */ 111 111 ··· 176 176 } stack_t; 177 177 178 178 179 - #endif /* !(__ASSEMBLY__) */ 179 + #endif /* !(__ASSEMBLER__) */ 180 180 181 181 #endif /* _UAPI__SPARC_SIGNAL_H */
+2 -2
arch/sparc/include/uapi/asm/traps.h
··· 10 10 11 11 #define NUM_SPARC_TRAPS 255 12 12 13 - #ifndef __ASSEMBLY__ 14 - #endif /* !(__ASSEMBLY__) */ 13 + #ifndef __ASSEMBLER__ 14 + #endif /* !(__ASSEMBLER__) */ 15 15 16 16 /* For patching the trap table at boot time, we need to know how to 17 17 * form various common Sparc instructions. Thus these macros...
+2 -2
arch/sparc/include/uapi/asm/utrap.h
··· 44 44 45 45 #define UTH_NOCHANGE (-1) 46 46 47 - #ifndef __ASSEMBLY__ 47 + #ifndef __ASSEMBLER__ 48 48 typedef int utrap_entry_t; 49 49 typedef void *utrap_handler_t; 50 - #endif /* __ASSEMBLY__ */ 50 + #endif /* __ASSEMBLER__ */ 51 51 52 52 #endif /* !(__ASM_SPARC64_PROCESSOR_H) */
-2
arch/sparc/kernel/Makefile
··· 4 4 # Makefile for the linux kernel. 5 5 # 6 6 7 - asflags-y := -ansi 8 - 9 7 # Undefine sparc when processing vmlinux.lds - it is used 10 8 # And teach CPP we are doing $(BITS) builds (for this case) 11 9 CPPFLAGS_vmlinux.lds := -Usparc -m$(BITS)
+2 -2
arch/sparc/kernel/adi_64.c
··· 202 202 203 203 } else { 204 204 size = sizeof(tag_storage_desc_t)*max_desc; 205 - mm->context.tag_store = kzalloc(size, GFP_NOWAIT|__GFP_NOWARN); 205 + mm->context.tag_store = kzalloc(size, GFP_NOWAIT); 206 206 if (mm->context.tag_store == NULL) { 207 207 tag_desc = NULL; 208 208 goto out; ··· 281 281 size = (size + (PAGE_SIZE-adi_blksize()))/PAGE_SIZE; 282 282 size = size * PAGE_SIZE; 283 283 } 284 - tags = kzalloc(size, GFP_NOWAIT|__GFP_NOWARN); 284 + tags = kzalloc(size, GFP_NOWAIT); 285 285 if (tags == NULL) { 286 286 tag_desc->tag_users = 0; 287 287 tag_desc = NULL;
+15 -12
arch/sparc/kernel/ds.c
··· 781 781 } pkt; 782 782 char *base, *p; 783 783 int msg_len, loops; 784 + size_t var_len, value_len; 784 785 785 - if (strlen(var) + strlen(value) + 2 > 786 - sizeof(pkt) - sizeof(pkt.header)) { 787 - printk(KERN_ERR PFX 788 - "contents length: %zu, which more than max: %lu," 789 - "so could not set (%s) variable to (%s).\n", 790 - strlen(var) + strlen(value) + 2, 791 - sizeof(pkt) - sizeof(pkt.header), var, value); 786 + var_len = strlen(var) + 1; 787 + value_len = strlen(value) + 1; 788 + 789 + if (var_len + value_len > sizeof(pkt) - sizeof(pkt.header)) { 790 + pr_err(PFX 791 + "contents length: %zu, which more than max: %lu," 792 + "so could not set (%s) variable to (%s).\n", 793 + var_len + value_len, 794 + sizeof(pkt) - sizeof(pkt.header), var, value); 792 795 return; 793 796 } 794 797 ··· 800 797 pkt.header.data.handle = cp->handle; 801 798 pkt.header.msg.hdr.type = DS_VAR_SET_REQ; 802 799 base = p = &pkt.header.msg.name_and_value[0]; 803 - strcpy(p, var); 804 - p += strlen(var) + 1; 805 - strcpy(p, value); 806 - p += strlen(value) + 1; 800 + strscpy(p, var, var_len); 801 + p += var_len; 802 + strscpy(p, value, value_len); 803 + p += value_len; 807 804 808 805 msg_len = (sizeof(struct ds_data) + 809 806 sizeof(struct ds_var_set_msg) + ··· 913 910 pbuf.req.handle = cp->handle; 914 911 pbuf.req.major = 1; 915 912 pbuf.req.minor = 0; 916 - strcpy(pbuf.id_buf, cp->service_id); 913 + strscpy(pbuf.id_buf, cp->service_id); 917 914 918 915 err = __ds_send(lp, &pbuf, msg_len); 919 916 if (err > 0)
+2 -1
arch/sparc/kernel/module.c
··· 87 87 break; 88 88 #ifdef CONFIG_SPARC64 89 89 case R_SPARC_64: 90 + case R_SPARC_UA64: 90 91 location[0] = v >> 56; 91 92 location[1] = v >> 48; 92 93 location[2] = v >> 40; ··· 142 141 break; 143 142 144 143 default: 145 - printk(KERN_ERR "module %s: Unknown relocation: %x\n", 144 + printk(KERN_ERR "module %s: Unknown relocation: 0x%x\n", 146 145 me->name, 147 146 (int) (ELF_R_TYPE(rel[i].r_info) & 0xff)); 148 147 return -ENOEXEC;
+1
arch/sparc/kernel/of_device_32.c
··· 387 387 388 388 if (of_device_register(op)) { 389 389 printk("%pOF: Could not register of device.\n", dp); 390 + put_device(&op->dev); 390 391 kfree(op); 391 392 op = NULL; 392 393 }
+1
arch/sparc/kernel/of_device_64.c
··· 677 677 678 678 if (of_device_register(op)) { 679 679 printk("%pOF: Could not register of device.\n", dp); 680 + put_device(&op->dev); 680 681 kfree(op); 681 682 op = NULL; 682 683 }
+4 -3
arch/sparc/kernel/pcic.c
··· 16 16 #include <linux/init.h> 17 17 #include <linux/mm.h> 18 18 #include <linux/slab.h> 19 + #include <linux/string.h> 19 20 #include <linux/jiffies.h> 20 21 21 22 #include <asm/swift.h> /* for cache flushing. */ ··· 353 352 pbm = &pcic->pbm; 354 353 pbm->prom_node = node; 355 354 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 356 - strcpy(pbm->prom_name, namebuf); 355 + strscpy(pbm->prom_name, namebuf); 357 356 358 357 { 359 358 extern int pcic_nmi_trap_patch[4]; ··· 478 477 int j; 479 478 480 479 if (node == 0 || node == -1) { 481 - strcpy(namebuf, "???"); 480 + strscpy(namebuf, "???"); 482 481 } else { 483 482 prom_getstring(node, "name", namebuf, 63); namebuf[63] = 0; 484 483 } ··· 537 536 char namebuf[64]; 538 537 539 538 if (node == 0 || node == -1) { 540 - strcpy(namebuf, "???"); 539 + strscpy(namebuf, "???"); 541 540 } else { 542 541 prom_getstring(node, "name", namebuf, sizeof(namebuf)); 543 542 }
+8 -5
arch/sparc/kernel/prom_32.c
··· 187 187 { 188 188 const char *name = of_get_property(dp, "name", NULL); 189 189 char tmp_buf[64], *n; 190 + size_t n_sz; 190 191 191 192 tmp_buf[0] = '\0'; 192 193 __build_path_component(dp, tmp_buf); 193 194 if (tmp_buf[0] == '\0') 194 - strcpy(tmp_buf, name); 195 + strscpy(tmp_buf, name); 195 196 196 - n = prom_early_alloc(strlen(tmp_buf) + 1); 197 - strcpy(n, tmp_buf); 197 + n_sz = strlen(tmp_buf) + 1; 198 + n = prom_early_alloc(n_sz); 199 + strscpy(n, tmp_buf, n_sz); 198 200 199 201 return n; 200 202 } ··· 206 204 void __init of_console_init(void) 207 205 { 208 206 char *msg = "OF stdout device is: %s\n"; 207 + const size_t of_console_path_sz = 256; 209 208 struct device_node *dp; 210 209 unsigned long flags; 211 210 const char *type; 212 211 phandle node; 213 212 int skip, tmp, fd; 214 213 215 - of_console_path = prom_early_alloc(256); 214 + of_console_path = prom_early_alloc(of_console_path_sz); 216 215 217 216 switch (prom_vers) { 218 217 case PROM_V0: ··· 300 297 prom_printf("No stdout-path in root node.\n"); 301 298 prom_halt(); 302 299 } 303 - strcpy(of_console_path, path); 300 + strscpy(of_console_path, path, of_console_path_sz); 304 301 } 305 302 break; 306 303 }
+5 -3
arch/sparc/kernel/prom_64.c
··· 361 361 { 362 362 const char *name = of_get_property(dp, "name", NULL); 363 363 char tmp_buf[64], *n; 364 + size_t n_sz; 364 365 365 366 tmp_buf[0] = '\0'; 366 367 __build_path_component(dp, tmp_buf); 367 368 if (tmp_buf[0] == '\0') 368 - strcpy(tmp_buf, name); 369 + strscpy(tmp_buf, name); 369 370 370 - n = prom_early_alloc(strlen(tmp_buf) + 1); 371 - strcpy(n, tmp_buf); 371 + n_sz = strlen(tmp_buf) + 1; 372 + n = prom_early_alloc(n_sz); 373 + strscpy(n, tmp_buf, n_sz); 372 374 373 375 return n; 374 376 }
+5 -2
arch/sparc/kernel/prom_common.c
··· 120 120 */ 121 121 static int __init handle_nextprop_quirks(char *buf, const char *name) 122 122 { 123 - if (!name || strlen(name) == 0) 123 + size_t name_len; 124 + 125 + name_len = name ? strlen(name) : 0; 126 + if (name_len == 0) 124 127 return -1; 125 128 126 129 #ifdef CONFIG_SPARC32 127 - strcpy(buf, name); 130 + strscpy(buf, name, name_len + 1); 128 131 #endif 129 132 return 0; 130 133 }
+10 -10
arch/sparc/lib/M7memcpy.S
··· 696 696 EX_LD_FP(LOAD(ldd, %o4+40, %f26), memcpy_retl_o2_plus_o5_plus_40) 697 697 faligndata %f24, %f26, %f10 698 698 EX_ST_FP(STORE(std, %f6, %o0+24), memcpy_retl_o2_plus_o5_plus_40) 699 - EX_LD_FP(LOAD(ldd, %o4+48, %f28), memcpy_retl_o2_plus_o5_plus_40) 699 + EX_LD_FP(LOAD(ldd, %o4+48, %f28), memcpy_retl_o2_plus_o5_plus_32) 700 700 faligndata %f26, %f28, %f12 701 - EX_ST_FP(STORE(std, %f8, %o0+32), memcpy_retl_o2_plus_o5_plus_40) 701 + EX_ST_FP(STORE(std, %f8, %o0+32), memcpy_retl_o2_plus_o5_plus_32) 702 702 add %o4, 64, %o4 703 - EX_LD_FP(LOAD(ldd, %o4-8, %f30), memcpy_retl_o2_plus_o5_plus_40) 703 + EX_LD_FP(LOAD(ldd, %o4-8, %f30), memcpy_retl_o2_plus_o5_plus_24) 704 704 faligndata %f28, %f30, %f14 705 - EX_ST_FP(STORE(std, %f10, %o0+40), memcpy_retl_o2_plus_o5_plus_40) 706 - EX_ST_FP(STORE(std, %f12, %o0+48), memcpy_retl_o2_plus_o5_plus_40) 705 + EX_ST_FP(STORE(std, %f10, %o0+40), memcpy_retl_o2_plus_o5_plus_24) 706 + EX_ST_FP(STORE(std, %f12, %o0+48), memcpy_retl_o2_plus_o5_plus_16) 707 707 add %o0, 64, %o0 708 - EX_ST_FP(STORE(std, %f14, %o0-8), memcpy_retl_o2_plus_o5_plus_40) 708 + EX_ST_FP(STORE(std, %f14, %o0-8), memcpy_retl_o2_plus_o5_plus_8) 709 709 fsrc2 %f30, %f14 710 710 bgu,pt %xcc, .Lunalign_sloop 711 711 prefetch [%o4 + (8 * BLOCK_SIZE)], 20 ··· 728 728 add %o4, 8, %o4 729 729 faligndata %f0, %f2, %f16 730 730 subcc %o5, 8, %o5 731 - EX_ST_FP(STORE(std, %f16, %o0), memcpy_retl_o2_plus_o5) 731 + EX_ST_FP(STORE(std, %f16, %o0), memcpy_retl_o2_plus_o5_plus_8) 732 732 fsrc2 %f2, %f0 733 733 bgu,pt %xcc, .Lunalign_by8 734 734 add %o0, 8, %o0 ··· 772 772 subcc %o5, 0x20, %o5 773 773 EX_ST(STORE(stx, %o3, %o0 + 0x00), memcpy_retl_o2_plus_o5_plus_32) 774 774 EX_ST(STORE(stx, %g2, %o0 + 0x08), memcpy_retl_o2_plus_o5_plus_24) 775 - EX_ST(STORE(stx, %g7, %o0 + 0x10), memcpy_retl_o2_plus_o5_plus_24) 775 + EX_ST(STORE(stx, %g7, %o0 + 0x10), memcpy_retl_o2_plus_o5_plus_16) 776 776 EX_ST(STORE(stx, %o4, %o0 + 0x18), memcpy_retl_o2_plus_o5_plus_8) 777 777 bne,pt %xcc, 1b 778 778 add %o0, 0x20, %o0 ··· 804 804 brz,pt %o3, 2f 805 805 sub %o2, %o3, %o2 806 806 807 - 1: EX_LD(LOAD(ldub, %o1 + 0x00, %g2), memcpy_retl_o2_plus_g1) 807 + 1: EX_LD(LOAD(ldub, %o1 + 0x00, %g2), memcpy_retl_o2_plus_o3) 808 808 add %o1, 1, %o1 809 809 subcc %o3, 1, %o3 810 810 add %o0, 1, %o0 811 811 bne,pt %xcc, 1b 812 - EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_g1_plus_1) 812 + EX_ST(STORE(stb, %g2, %o0 - 0x01), memcpy_retl_o2_plus_o3_plus_1) 813 813 2: 814 814 and %o1, 0x7, %o3 815 815 brz,pn %o3, .Lmedium_noprefetch_cp
+1 -1
arch/sparc/lib/Makefile
··· 2 2 # Makefile for Sparc library files.. 3 3 # 4 4 5 - asflags-y := -ansi -DST_DIV0=0x02 5 + asflags-y := -DST_DIV0=0x02 6 6 7 7 lib-$(CONFIG_SPARC32) += ashrdi3.o 8 8 lib-$(CONFIG_SPARC32) += memcpy.o memset.o
+9
arch/sparc/lib/Memcpy_utils.S
··· 137 137 ba,pt %xcc, __restore_asi 138 138 add %o2, 8, %o0 139 139 ENDPROC(memcpy_retl_o2_plus_63_8) 140 + ENTRY(memcpy_retl_o2_plus_o3) 141 + ba,pt %xcc, __restore_asi 142 + add %o2, %o3, %o0 143 + ENDPROC(memcpy_retl_o2_plus_o3) 144 + ENTRY(memcpy_retl_o2_plus_o3_plus_1) 145 + add %o3, 1, %o3 146 + ba,pt %xcc, __restore_asi 147 + add %o2, %o3, %o0 148 + ENDPROC(memcpy_retl_o2_plus_o3_plus_1) 140 149 ENTRY(memcpy_retl_o2_plus_o5) 141 150 ba,pt %xcc, __restore_asi 142 151 add %o2, %o5, %o0
+1 -1
arch/sparc/lib/NG4memcpy.S
··· 281 281 subcc %o5, 0x20, %o5 282 282 EX_ST(STORE(stx, %g1, %o0 + 0x00), memcpy_retl_o2_plus_o5_plus_32) 283 283 EX_ST(STORE(stx, %g2, %o0 + 0x08), memcpy_retl_o2_plus_o5_plus_24) 284 - EX_ST(STORE(stx, GLOBAL_SPARE, %o0 + 0x10), memcpy_retl_o2_plus_o5_plus_24) 284 + EX_ST(STORE(stx, GLOBAL_SPARE, %o0 + 0x10), memcpy_retl_o2_plus_o5_plus_16) 285 285 EX_ST(STORE(stx, %o4, %o0 + 0x18), memcpy_retl_o2_plus_o5_plus_8) 286 286 bne,pt %icc, 1b 287 287 add %o0, 0x20, %o0
+18 -11
arch/sparc/lib/NGmemcpy.S
··· 79 79 #ifndef EX_RETVAL 80 80 #define EX_RETVAL(x) x 81 81 __restore_asi: 82 - ret 83 82 wr %g0, ASI_AIUS, %asi 83 + ret 84 84 restore 85 85 ENTRY(NG_ret_i2_plus_i4_plus_1) 86 86 ba,pt %xcc, __restore_asi ··· 125 125 ba,pt %xcc, __restore_asi 126 126 add %i2, %g1, %i0 127 127 ENDPROC(NG_ret_i2_plus_g1_minus_56) 128 - ENTRY(NG_ret_i2_plus_i4) 128 + ENTRY(NG_ret_i2_plus_i4_plus_16) 129 + add %i4, 16, %i4 129 130 ba,pt %xcc, __restore_asi 130 131 add %i2, %i4, %i0 131 - ENDPROC(NG_ret_i2_plus_i4) 132 - ENTRY(NG_ret_i2_plus_i4_minus_8) 133 - sub %i4, 8, %i4 132 + ENDPROC(NG_ret_i2_plus_i4_plus_16) 133 + ENTRY(NG_ret_i2_plus_i4_plus_8) 134 + add %i4, 8, %i4 134 135 ba,pt %xcc, __restore_asi 135 136 add %i2, %i4, %i0 136 - ENDPROC(NG_ret_i2_plus_i4_minus_8) 137 + ENDPROC(NG_ret_i2_plus_i4_plus_8) 137 138 ENTRY(NG_ret_i2_plus_8) 138 139 ba,pt %xcc, __restore_asi 139 140 add %i2, 8, %i0 ··· 158 157 ENDPROC(NG_ret_i2) 159 158 ENTRY(NG_ret_i2_and_7_plus_i4) 160 159 and %i2, 7, %i2 160 + ba,pt %xcc, __restore_asi 161 + add %i2, %i4, %i0 162 + ENDPROC(NG_ret_i2_and_7_plus_i4) 163 + ENTRY(NG_ret_i2_and_7_plus_i4_plus_8) 164 + and %i2, 7, %i2 165 + add %i4, 8, %i4 161 166 ba,pt %xcc, __restore_asi 162 167 add %i2, %i4, %i0 163 168 ENDPROC(NG_ret_i2_and_7_plus_i4) ··· 412 405 andn %i2, 0xf, %i4 413 406 and %i2, 0xf, %i2 414 407 1: subcc %i4, 0x10, %i4 415 - EX_LD(LOAD(ldx, %i1, %o4), NG_ret_i2_plus_i4) 408 + EX_LD(LOAD(ldx, %i1, %o4), NG_ret_i2_plus_i4_plus_16) 416 409 add %i1, 0x08, %i1 417 - EX_LD(LOAD(ldx, %i1, %g1), NG_ret_i2_plus_i4) 410 + EX_LD(LOAD(ldx, %i1, %g1), NG_ret_i2_plus_i4_plus_16) 418 411 sub %i1, 0x08, %i1 419 - EX_ST(STORE(stx, %o4, %i1 + %i3), NG_ret_i2_plus_i4) 412 + EX_ST(STORE(stx, %o4, %i1 + %i3), NG_ret_i2_plus_i4_plus_16) 420 413 add %i1, 0x8, %i1 421 - EX_ST(STORE(stx, %g1, %i1 + %i3), NG_ret_i2_plus_i4_minus_8) 414 + EX_ST(STORE(stx, %g1, %i1 + %i3), NG_ret_i2_plus_i4_plus_8) 422 415 bgu,pt %XCC, 1b 423 416 add %i1, 0x8, %i1 424 417 73: andcc %i2, 0x8, %g0 ··· 475 468 subcc %i4, 0x8, %i4 476 469 srlx %g3, %i3, %i5 477 470 or %i5, %g2, %i5 478 - EX_ST(STORE(stx, %i5, %o0), NG_ret_i2_and_7_plus_i4) 471 + EX_ST(STORE(stx, %i5, %o0), NG_ret_i2_and_7_plus_i4_plus_8) 479 472 add %o0, 0x8, %o0 480 473 bgu,pt %icc, 1b 481 474 sllx %g3, %g1, %g2
+10 -9
arch/sparc/lib/U1memcpy.S
··· 164 164 retl 165 165 add %o0, %o2, %o0 166 166 ENDPROC(U1_gs_40_fp) 167 - ENTRY(U1_g3_0_fp) 168 - VISExitHalf 169 - retl 170 - add %g3, %o2, %o0 171 - ENDPROC(U1_g3_0_fp) 172 167 ENTRY(U1_g3_8_fp) 173 168 VISExitHalf 174 169 add %g3, 8, %g3 175 170 retl 176 171 add %g3, %o2, %o0 177 172 ENDPROC(U1_g3_8_fp) 173 + ENTRY(U1_g3_16_fp) 174 + VISExitHalf 175 + add %g3, 16, %g3 176 + retl 177 + add %g3, %o2, %o0 178 + ENDPROC(U1_g3_16_fp) 178 179 ENTRY(U1_o2_0_fp) 179 180 VISExitHalf 180 181 retl ··· 548 547 62: FINISH_VISCHUNK(o0, f44, f46) 549 548 63: UNEVEN_VISCHUNK_LAST(o0, f46, f0) 550 549 551 - 93: EX_LD_FP(LOAD(ldd, %o1, %f2), U1_g3_0_fp) 550 + 93: EX_LD_FP(LOAD(ldd, %o1, %f2), U1_g3_8_fp) 552 551 add %o1, 8, %o1 553 552 subcc %g3, 8, %g3 554 553 faligndata %f0, %f2, %f8 555 - EX_ST_FP(STORE(std, %f8, %o0), U1_g3_8_fp) 554 + EX_ST_FP(STORE(std, %f8, %o0), U1_g3_16_fp) 556 555 bl,pn %xcc, 95f 557 556 add %o0, 8, %o0 558 - EX_LD_FP(LOAD(ldd, %o1, %f0), U1_g3_0_fp) 557 + EX_LD_FP(LOAD(ldd, %o1, %f0), U1_g3_8_fp) 559 558 add %o1, 8, %o1 560 559 subcc %g3, 8, %g3 561 560 faligndata %f2, %f0, %f8 562 - EX_ST_FP(STORE(std, %f8, %o0), U1_g3_8_fp) 561 + EX_ST_FP(STORE(std, %f8, %o0), U1_g3_16_fp) 563 562 bge,pt %xcc, 93b 564 563 add %o0, 8, %o0 565 564
+1 -1
arch/sparc/lib/U3memcpy.S
··· 267 267 faligndata %f10, %f12, %f26 268 268 EX_LD_FP(LOAD(ldd, %o1 + 0x040, %f0), U3_retl_o2) 269 269 270 + and %o2, 0x3f, %o2 270 271 subcc GLOBAL_SPARE, 0x80, GLOBAL_SPARE 271 272 add %o1, 0x40, %o1 272 273 bgu,pt %XCC, 1f ··· 337 336 * Also notice how this code is careful not to perform a 338 337 * load past the end of the src buffer. 339 338 */ 340 - and %o2, 0x3f, %o2 341 339 andcc %o2, 0x38, %g2 342 340 be,pn %XCC, 2f 343 341 subcc %g2, 0x8, %g2
-2
arch/sparc/mm/Makefile
··· 2 2 # Makefile for the linux Sparc-specific parts of the memory manager. 3 3 # 4 4 5 - asflags-y := -ansi 6 - 7 5 obj-$(CONFIG_SPARC64) += ultra.o tlb.o tsb.o 8 6 obj-y += fault_$(BITS).o 9 7 obj-y += init_$(BITS).o
+20
arch/sparc/mm/hugetlbpage.c
··· 22 22 23 23 static pte_t sun4u_hugepage_shift_to_tte(pte_t entry, unsigned int shift) 24 24 { 25 + unsigned long hugepage_size = _PAGE_SZ4MB_4U; 26 + 27 + pte_val(entry) = pte_val(entry) & ~_PAGE_SZALL_4U; 28 + 29 + switch (shift) { 30 + case HPAGE_256MB_SHIFT: 31 + hugepage_size = _PAGE_SZ256MB_4U; 32 + pte_val(entry) |= _PAGE_PMD_HUGE; 33 + break; 34 + case HPAGE_SHIFT: 35 + pte_val(entry) |= _PAGE_PMD_HUGE; 36 + break; 37 + case HPAGE_64K_SHIFT: 38 + hugepage_size = _PAGE_SZ64K_4U; 39 + break; 40 + default: 41 + WARN_ONCE(1, "unsupported hugepage shift=%u\n", shift); 42 + } 43 + 44 + pte_val(entry) = pte_val(entry) | hugepage_size; 25 45 return entry; 26 46 } 27 47
-1
arch/sparc/prom/Makefile
··· 2 2 # Makefile for the Sun Boot PROM interface library under 3 3 # Linux. 4 4 # 5 - asflags := -ansi 6 5 7 6 lib-y := bootstr_$(BITS).o 8 7 lib-y += init_$(BITS).o
+1 -1
arch/sparc/prom/tree_64.c
··· 272 272 return buffer; 273 273 } 274 274 if (oprop == buffer) { 275 - strcpy (buf, oprop); 275 + strscpy(buf, oprop); 276 276 oprop = buf; 277 277 } 278 278
+2 -2
drivers/char/hw_random/n2rng.h
··· 48 48 49 49 #define HV_RNG_NUM_CONTROL 4 50 50 51 - #ifndef __ASSEMBLY__ 51 + #ifndef __ASSEMBLER__ 52 52 extern unsigned long sun4v_rng_get_diag_ctl(void); 53 53 extern unsigned long sun4v_rng_ctl_read_v1(unsigned long ctl_regs_ra, 54 54 unsigned long *state, ··· 147 147 #define N2RNG_BUSY_LIMIT 100 148 148 #define N2RNG_HCHECK_LIMIT 100 149 149 150 - #endif /* !(__ASSEMBLY__) */ 150 + #endif /* !(__ASSEMBLER__) */ 151 151 152 152 #endif /* _N2RNG_H */