Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'loongarch-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson
Pull LoongArch fixes from Huacai Chen:
"Fix some bugs in kernel-fpu, cpu idle function, hibernation and
uprobes"
* tag 'loongarch-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
LoongArch: uprobes: Remove redundant code about resume_era
LoongArch: uprobes: Remove user_{en,dis}able_single_step()
LoongArch: Save and restore CSR.CNTC for hibernation
LoongArch: Move __arch_cpu_idle() to .cpuidle.text section
LoongArch: Fix MAX_REG_OFFSET calculation
LoongArch: Prevent cond_resched() occurring within kernel-fpu
+31
-17
+1
-1
arch/loongarch/include/asm/ptrace.h
+1
-1
arch/loongarch/include/asm/ptrace.h
···
55
55
56
56
/* Query offset/name of register from its name/offset */
57
57
extern int regs_query_register_offset(const char *name);
58
-
#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last))
58
+
#define MAX_REG_OFFSET (offsetof(struct pt_regs, __last) - sizeof(unsigned long))
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59
60
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/**
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61
* regs_get_register() - get register value from its offset
-1
arch/loongarch/include/asm/uprobes.h
-1
arch/loongarch/include/asm/uprobes.h
+5
-2
arch/loongarch/kernel/genex.S
+5
-2
arch/loongarch/kernel/genex.S
···
16
16
#include <asm/stackframe.h>
17
17
#include <asm/thread_info.h>
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18
19
+
.section .cpuidle.text, "ax"
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.align 5
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21
SYM_FUNC_START(__arch_cpu_idle)
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/* start of idle interrupt region */
···
32
31
*/
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32
idle 0
34
33
/* end of idle interrupt region */
35
-
1: jr ra
34
+
idle_exit:
35
+
jr ra
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SYM_FUNC_END(__arch_cpu_idle)
37
+
.previous
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SYM_CODE_START(handle_vint)
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40
UNWIND_HINT_UNDEFINED
40
41
BACKUP_T0T1
41
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SAVE_ALL
42
-
la_abs t1, 1b
43
+
la_abs t1, idle_exit
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44
LONG_L t0, sp, PT_ERA
44
45
/* 3 instructions idle interrupt region */
45
46
ori t0, t0, 0b1100
+20
-2
arch/loongarch/kernel/kfpu.c
+20
-2
arch/loongarch/kernel/kfpu.c
···
18
18
static DEFINE_PER_CPU(bool, in_kernel_fpu);
19
19
static DEFINE_PER_CPU(unsigned int, euen_current);
20
20
21
+
static inline void fpregs_lock(void)
22
+
{
23
+
if (IS_ENABLED(CONFIG_PREEMPT_RT))
24
+
preempt_disable();
25
+
else
26
+
local_bh_disable();
27
+
}
28
+
29
+
static inline void fpregs_unlock(void)
30
+
{
31
+
if (IS_ENABLED(CONFIG_PREEMPT_RT))
32
+
preempt_enable();
33
+
else
34
+
local_bh_enable();
35
+
}
36
+
21
37
void kernel_fpu_begin(void)
22
38
{
23
39
unsigned int *euen_curr;
24
40
25
-
preempt_disable();
41
+
if (!irqs_disabled())
42
+
fpregs_lock();
26
43
27
44
WARN_ON(this_cpu_read(in_kernel_fpu));
28
45
···
90
73
91
74
this_cpu_write(in_kernel_fpu, false);
92
75
93
-
preempt_enable();
76
+
if (!irqs_disabled())
77
+
fpregs_unlock();
94
78
}
95
79
EXPORT_SYMBOL_GPL(kernel_fpu_end);
96
80
+1
-1
arch/loongarch/kernel/time.c
+1
-1
arch/loongarch/kernel/time.c
+1
-10
arch/loongarch/kernel/uprobes.c
+1
-10
arch/loongarch/kernel/uprobes.c
···
42
42
utask->autask.saved_trap_nr = current->thread.trap_nr;
43
43
current->thread.trap_nr = UPROBE_TRAP_NR;
44
44
instruction_pointer_set(regs, utask->xol_vaddr);
45
-
user_enable_single_step(current);
46
45
47
46
return 0;
48
47
}
···
52
53
53
54
WARN_ON_ONCE(current->thread.trap_nr != UPROBE_TRAP_NR);
54
55
current->thread.trap_nr = utask->autask.saved_trap_nr;
55
-
56
-
if (auprobe->simulate)
57
-
instruction_pointer_set(regs, auprobe->resume_era);
58
-
else
59
-
instruction_pointer_set(regs, utask->vaddr + LOONGARCH_INSN_SIZE);
60
-
61
-
user_disable_single_step(current);
56
+
instruction_pointer_set(regs, utask->vaddr + LOONGARCH_INSN_SIZE);
62
57
63
58
return 0;
64
59
}
···
63
70
64
71
current->thread.trap_nr = utask->autask.saved_trap_nr;
65
72
instruction_pointer_set(regs, utask->vaddr);
66
-
user_disable_single_step(current);
67
73
}
68
74
69
75
bool arch_uprobe_xol_was_trapped(struct task_struct *t)
···
82
90
83
91
insn.word = auprobe->insn[0];
84
92
arch_simulate_insn(insn, regs);
85
-
auprobe->resume_era = regs->csr_era;
86
93
87
94
return true;
88
95
}
+3
arch/loongarch/power/hibernate.c
+3
arch/loongarch/power/hibernate.c
···
2
2
#include <asm/fpu.h>
3
3
#include <asm/loongson.h>
4
4
#include <asm/sections.h>
5
+
#include <asm/time.h>
5
6
#include <asm/tlbflush.h>
6
7
#include <linux/suspend.h>
7
8
···
15
14
16
15
void save_processor_state(void)
17
16
{
17
+
save_counter();
18
18
saved_crmd = csr_read32(LOONGARCH_CSR_CRMD);
19
19
saved_prmd = csr_read32(LOONGARCH_CSR_PRMD);
20
20
saved_euen = csr_read32(LOONGARCH_CSR_EUEN);
···
28
26
29
27
void restore_processor_state(void)
30
28
{
29
+
sync_counter();
31
30
csr_write32(saved_crmd, LOONGARCH_CSR_CRMD);
32
31
csr_write32(saved_prmd, LOONGARCH_CSR_PRMD);
33
32
csr_write32(saved_euen, LOONGARCH_CSR_EUEN);