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Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux

Pull nouveau and radeon fixes from Dave Airlie:
"Just some nouveau and radeon/amdgpu fixes.

The nouveau fixes look large as the firmware context files are
regenerated, but the actual change is quite small"

* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon: make some dpm errors debug only
drm/nouveau/volt/pwm/gk104: fix an off-by-one resulting in the voltage not being set
drm/nouveau/nvif: allow userspace access to its own client object
drm/nouveau/gr/gf100-: fix oops when calling zbc methods
drm/nouveau/gr/gf117-: assume no PPC if NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK is zero
drm/nouveau/gr/gf117-: read NV_PGRAPH_GPC_GPM_PD_PES_TPC_ID_MASK from correct GPC
drm/nouveau/gr/gf100-: split out per-gpc address calculation macro
drm/nouveau/bios: return actual size of the buffer retrieved via _ROM
drm/nouveau/instmem: protect instobj list with a spinlock
drm/nouveau/pci: enable c800 magic for some unknown Samsung laptop
drm/nouveau/pci: enable c800 magic for Clevo P157SM
drm/radeon: make rv770_set_sw_state failures non-fatal
drm/amdgpu: move dependency handling out of atomic section v2
drm/amdgpu: optimize scheduler fence handling
drm/amdgpu: remove vm->mutex
drm/amdgpu: add mutex for ba_va->valids/invalids
drm/amdgpu: adapt vce session create interface changes
drm/amdgpu: vce use multiple cache surface starting from stoney
drm/amdgpu: reset vce trap interrupt flag

+1095 -995
+1 -2
drivers/gpu/drm/amd/amdgpu/amdgpu.h
··· 496 496 497 497 /* bo virtual addresses in a specific vm */ 498 498 struct amdgpu_bo_va { 499 + struct mutex mutex; 499 500 /* protected by bo being reserved */ 500 501 struct list_head bo_list; 501 502 struct fence *last_pt_update; ··· 929 928 }; 930 929 931 930 struct amdgpu_vm { 932 - struct mutex mutex; 933 - 934 931 struct rb_root va; 935 932 936 933 /* protecting invalidated */
-4
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c
··· 784 784 { 785 785 struct amdgpu_device *adev = dev->dev_private; 786 786 union drm_amdgpu_cs *cs = data; 787 - struct amdgpu_fpriv *fpriv = filp->driver_priv; 788 - struct amdgpu_vm *vm = &fpriv->vm; 789 787 struct amdgpu_cs_parser parser = {}; 790 788 bool reserved_buffers = false; 791 789 int i, r; ··· 801 803 r = amdgpu_cs_handle_lockup(adev, r); 802 804 return r; 803 805 } 804 - mutex_lock(&vm->mutex); 805 806 r = amdgpu_cs_parser_relocs(&parser); 806 807 if (r == -ENOMEM) 807 808 DRM_ERROR("Not enough memory for command submission!\n"); ··· 885 888 886 889 out: 887 890 amdgpu_cs_parser_fini(&parser, r, reserved_buffers); 888 - mutex_unlock(&vm->mutex); 889 891 r = amdgpu_cs_handle_lockup(adev, r); 890 892 return r; 891 893 }
+2 -12
drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
··· 115 115 struct amdgpu_vm *vm = &fpriv->vm; 116 116 struct amdgpu_bo_va *bo_va; 117 117 int r; 118 - mutex_lock(&vm->mutex); 119 118 r = amdgpu_bo_reserve(rbo, false); 120 - if (r) { 121 - mutex_unlock(&vm->mutex); 119 + if (r) 122 120 return r; 123 - } 124 121 125 122 bo_va = amdgpu_vm_bo_find(vm, rbo); 126 123 if (!bo_va) { ··· 126 129 ++bo_va->ref_count; 127 130 } 128 131 amdgpu_bo_unreserve(rbo); 129 - mutex_unlock(&vm->mutex); 130 132 return 0; 131 133 } 132 134 ··· 138 142 struct amdgpu_vm *vm = &fpriv->vm; 139 143 struct amdgpu_bo_va *bo_va; 140 144 int r; 141 - mutex_lock(&vm->mutex); 142 145 r = amdgpu_bo_reserve(rbo, true); 143 146 if (r) { 144 - mutex_unlock(&vm->mutex); 145 147 dev_err(adev->dev, "leaking bo va because " 146 148 "we fail to reserve bo (%d)\n", r); 147 149 return; ··· 151 157 } 152 158 } 153 159 amdgpu_bo_unreserve(rbo); 154 - mutex_unlock(&vm->mutex); 155 160 } 156 161 157 162 static int amdgpu_gem_handle_lockup(struct amdgpu_device *adev, int r) ··· 546 553 gobj = drm_gem_object_lookup(dev, filp, args->handle); 547 554 if (gobj == NULL) 548 555 return -ENOENT; 549 - mutex_lock(&fpriv->vm.mutex); 550 556 rbo = gem_to_amdgpu_bo(gobj); 551 557 INIT_LIST_HEAD(&list); 552 558 INIT_LIST_HEAD(&duplicates); ··· 560 568 } 561 569 r = ttm_eu_reserve_buffers(&ticket, &list, true, &duplicates); 562 570 if (r) { 563 - mutex_unlock(&fpriv->vm.mutex); 564 571 drm_gem_object_unreference_unlocked(gobj); 565 572 return r; 566 573 } ··· 568 577 if (!bo_va) { 569 578 ttm_eu_backoff_reservation(&ticket, &list); 570 579 drm_gem_object_unreference_unlocked(gobj); 571 - mutex_unlock(&fpriv->vm.mutex); 572 580 return -ENOENT; 573 581 } 574 582 ··· 592 602 ttm_eu_backoff_reservation(&ticket, &list); 593 603 if (!r && !(args->flags & AMDGPU_VM_DELAY_UPDATE)) 594 604 amdgpu_gem_va_update_vm(adev, bo_va, args->operation); 595 - mutex_unlock(&fpriv->vm.mutex); 605 + 596 606 drm_gem_object_unreference_unlocked(gobj); 597 607 return r; 598 608 }
+10 -1
drivers/gpu/drm/amd/amdgpu/amdgpu_vce.c
··· 392 392 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ 393 393 ib->ptr[ib->length_dw++] = handle; 394 394 395 - ib->ptr[ib->length_dw++] = 0x00000030; /* len */ 395 + if ((ring->adev->vce.fw_version >> 24) >= 52) 396 + ib->ptr[ib->length_dw++] = 0x00000040; /* len */ 397 + else 398 + ib->ptr[ib->length_dw++] = 0x00000030; /* len */ 396 399 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ 397 400 ib->ptr[ib->length_dw++] = 0x00000000; 398 401 ib->ptr[ib->length_dw++] = 0x00000042; ··· 407 404 ib->ptr[ib->length_dw++] = 0x00000100; 408 405 ib->ptr[ib->length_dw++] = 0x0000000c; 409 406 ib->ptr[ib->length_dw++] = 0x00000000; 407 + if ((ring->adev->vce.fw_version >> 24) >= 52) { 408 + ib->ptr[ib->length_dw++] = 0x00000000; 409 + ib->ptr[ib->length_dw++] = 0x00000000; 410 + ib->ptr[ib->length_dw++] = 0x00000000; 411 + ib->ptr[ib->length_dw++] = 0x00000000; 412 + } 410 413 411 414 ib->ptr[ib->length_dw++] = 0x00000014; /* len */ 412 415 ib->ptr[ib->length_dw++] = 0x05000005; /* feedback buffer */
+11 -8
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
··· 922 922 bo_va = list_first_entry(&vm->invalidated, 923 923 struct amdgpu_bo_va, vm_status); 924 924 spin_unlock(&vm->status_lock); 925 - 925 + mutex_lock(&bo_va->mutex); 926 926 r = amdgpu_vm_bo_update(adev, bo_va, NULL); 927 + mutex_unlock(&bo_va->mutex); 927 928 if (r) 928 929 return r; 929 930 ··· 968 967 INIT_LIST_HEAD(&bo_va->valids); 969 968 INIT_LIST_HEAD(&bo_va->invalids); 970 969 INIT_LIST_HEAD(&bo_va->vm_status); 971 - 970 + mutex_init(&bo_va->mutex); 972 971 list_add_tail(&bo_va->bo_list, &bo->va); 973 972 974 973 return bo_va; ··· 1046 1045 mapping->offset = offset; 1047 1046 mapping->flags = flags; 1048 1047 1048 + mutex_lock(&bo_va->mutex); 1049 1049 list_add(&mapping->list, &bo_va->invalids); 1050 + mutex_unlock(&bo_va->mutex); 1050 1051 spin_lock(&vm->it_lock); 1051 1052 interval_tree_insert(&mapping->it, &vm->va); 1052 1053 spin_unlock(&vm->it_lock); ··· 1124 1121 bool valid = true; 1125 1122 1126 1123 saddr /= AMDGPU_GPU_PAGE_SIZE; 1127 - 1124 + mutex_lock(&bo_va->mutex); 1128 1125 list_for_each_entry(mapping, &bo_va->valids, list) { 1129 1126 if (mapping->it.start == saddr) 1130 1127 break; ··· 1138 1135 break; 1139 1136 } 1140 1137 1141 - if (&mapping->list == &bo_va->invalids) 1138 + if (&mapping->list == &bo_va->invalids) { 1139 + mutex_unlock(&bo_va->mutex); 1142 1140 return -ENOENT; 1141 + } 1143 1142 } 1144 - 1143 + mutex_unlock(&bo_va->mutex); 1145 1144 list_del(&mapping->list); 1146 1145 spin_lock(&vm->it_lock); 1147 1146 interval_tree_remove(&mapping->it, &vm->va); ··· 1195 1190 spin_unlock(&vm->it_lock); 1196 1191 kfree(mapping); 1197 1192 } 1198 - 1199 1193 fence_put(bo_va->last_pt_update); 1194 + mutex_destroy(&bo_va->mutex); 1200 1195 kfree(bo_va); 1201 1196 } 1202 1197 ··· 1241 1236 vm->ids[i].id = 0; 1242 1237 vm->ids[i].flushed_updates = NULL; 1243 1238 } 1244 - mutex_init(&vm->mutex); 1245 1239 vm->va = RB_ROOT; 1246 1240 spin_lock_init(&vm->status_lock); 1247 1241 INIT_LIST_HEAD(&vm->invalidated); ··· 1324 1320 fence_put(vm->ids[i].flushed_updates); 1325 1321 } 1326 1322 1327 - mutex_destroy(&vm->mutex); 1328 1323 } 1329 1324 1330 1325 /**
+19 -5
drivers/gpu/drm/amd/amdgpu/vce_v3_0.c
··· 40 40 41 41 #define GRBM_GFX_INDEX__VCE_INSTANCE__SHIFT 0x04 42 42 #define GRBM_GFX_INDEX__VCE_INSTANCE_MASK 0x10 43 + #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR0 0x8616 44 + #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR1 0x8617 45 + #define mmVCE_LMI_VCPU_CACHE_40BIT_BAR2 0x8618 43 46 44 47 #define VCE_V3_0_FW_SIZE (384 * 1024) 45 48 #define VCE_V3_0_STACK_SIZE (64 * 1024) ··· 133 130 134 131 /* set BUSY flag */ 135 132 WREG32_P(mmVCE_STATUS, 1, ~1); 136 - 137 - WREG32_P(mmVCE_VCPU_CNTL, VCE_VCPU_CNTL__CLK_EN_MASK, 138 - ~VCE_VCPU_CNTL__CLK_EN_MASK); 133 + if (adev->asic_type >= CHIP_STONEY) 134 + WREG32_P(mmVCE_VCPU_CNTL, 1, ~0x200001); 135 + else 136 + WREG32_P(mmVCE_VCPU_CNTL, VCE_VCPU_CNTL__CLK_EN_MASK, 137 + ~VCE_VCPU_CNTL__CLK_EN_MASK); 139 138 140 139 WREG32_P(mmVCE_SOFT_RESET, 141 140 VCE_SOFT_RESET__ECPU_SOFT_RESET_MASK, ··· 396 391 WREG32(mmVCE_LMI_SWAP_CNTL, 0); 397 392 WREG32(mmVCE_LMI_SWAP_CNTL1, 0); 398 393 WREG32(mmVCE_LMI_VM_CTRL, 0); 399 - 400 - WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); 394 + if (adev->asic_type >= CHIP_STONEY) { 395 + WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR0, (adev->vce.gpu_addr >> 8)); 396 + WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR1, (adev->vce.gpu_addr >> 8)); 397 + WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR2, (adev->vce.gpu_addr >> 8)); 398 + } else 399 + WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); 401 400 offset = AMDGPU_VCE_FIRMWARE_OFFSET; 402 401 size = VCE_V3_0_FW_SIZE; 403 402 WREG32(mmVCE_VCPU_CACHE_OFFSET0, offset & 0x7fffffff); ··· 585 576 struct amdgpu_iv_entry *entry) 586 577 { 587 578 DRM_DEBUG("IH: VCE\n"); 579 + 580 + WREG32_P(mmVCE_SYS_INT_STATUS, 581 + VCE_SYS_INT_STATUS__VCE_SYS_INT_TRAP_INTERRUPT_INT_MASK, 582 + ~VCE_SYS_INT_STATUS__VCE_SYS_INT_TRAP_INTERRUPT_INT_MASK); 583 + 588 584 switch (entry->src_data) { 589 585 case 0: 590 586 amdgpu_fence_process(&adev->vce.ring[0]);
+82 -40
drivers/gpu/drm/amd/scheduler/gpu_scheduler.c
··· 30 30 #define CREATE_TRACE_POINTS 31 31 #include "gpu_sched_trace.h" 32 32 33 - static struct amd_sched_job * 34 - amd_sched_entity_pop_job(struct amd_sched_entity *entity); 33 + static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity); 35 34 static void amd_sched_wakeup(struct amd_gpu_scheduler *sched); 36 35 37 36 struct kmem_cache *sched_fence_slab; ··· 63 64 } 64 65 65 66 /** 66 - * Select next job from a specified run queue with round robin policy. 67 - * Return NULL if nothing available. 67 + * Select an entity which could provide a job to run 68 + * 69 + * @rq The run queue to check. 70 + * 71 + * Try to find a ready entity, returns NULL if none found. 68 72 */ 69 - static struct amd_sched_job * 70 - amd_sched_rq_select_job(struct amd_sched_rq *rq) 73 + static struct amd_sched_entity * 74 + amd_sched_rq_select_entity(struct amd_sched_rq *rq) 71 75 { 72 76 struct amd_sched_entity *entity; 73 - struct amd_sched_job *sched_job; 74 77 75 78 spin_lock(&rq->lock); 76 79 77 80 entity = rq->current_entity; 78 81 if (entity) { 79 82 list_for_each_entry_continue(entity, &rq->entities, list) { 80 - sched_job = amd_sched_entity_pop_job(entity); 81 - if (sched_job) { 83 + if (amd_sched_entity_is_ready(entity)) { 82 84 rq->current_entity = entity; 83 85 spin_unlock(&rq->lock); 84 - return sched_job; 86 + return entity; 85 87 } 86 88 } 87 89 } 88 90 89 91 list_for_each_entry(entity, &rq->entities, list) { 90 92 91 - sched_job = amd_sched_entity_pop_job(entity); 92 - if (sched_job) { 93 + if (amd_sched_entity_is_ready(entity)) { 93 94 rq->current_entity = entity; 94 95 spin_unlock(&rq->lock); 95 - return sched_job; 96 + return entity; 96 97 } 97 98 98 99 if (entity == rq->current_entity) ··· 176 177 } 177 178 178 179 /** 180 + * Check if entity is ready 181 + * 182 + * @entity The pointer to a valid scheduler entity 183 + * 184 + * Return true if entity could provide a job. 185 + */ 186 + static bool amd_sched_entity_is_ready(struct amd_sched_entity *entity) 187 + { 188 + if (kfifo_is_empty(&entity->job_queue)) 189 + return false; 190 + 191 + if (ACCESS_ONCE(entity->dependency)) 192 + return false; 193 + 194 + return true; 195 + } 196 + 197 + /** 179 198 * Destroy a context entity 180 199 * 181 200 * @sched Pointer to scheduler instance ··· 228 211 amd_sched_wakeup(entity->sched); 229 212 } 230 213 214 + static bool amd_sched_entity_add_dependency_cb(struct amd_sched_entity *entity) 215 + { 216 + struct amd_gpu_scheduler *sched = entity->sched; 217 + struct fence * fence = entity->dependency; 218 + struct amd_sched_fence *s_fence; 219 + 220 + if (fence->context == entity->fence_context) { 221 + /* We can ignore fences from ourself */ 222 + fence_put(entity->dependency); 223 + return false; 224 + } 225 + 226 + s_fence = to_amd_sched_fence(fence); 227 + if (s_fence && s_fence->sched == sched) { 228 + /* Fence is from the same scheduler */ 229 + if (test_bit(AMD_SCHED_FENCE_SCHEDULED_BIT, &fence->flags)) { 230 + /* Ignore it when it is already scheduled */ 231 + fence_put(entity->dependency); 232 + return false; 233 + } 234 + 235 + /* Wait for fence to be scheduled */ 236 + entity->cb.func = amd_sched_entity_wakeup; 237 + list_add_tail(&entity->cb.node, &s_fence->scheduled_cb); 238 + return true; 239 + } 240 + 241 + if (!fence_add_callback(entity->dependency, &entity->cb, 242 + amd_sched_entity_wakeup)) 243 + return true; 244 + 245 + fence_put(entity->dependency); 246 + return false; 247 + } 248 + 231 249 static struct amd_sched_job * 232 250 amd_sched_entity_pop_job(struct amd_sched_entity *entity) 233 251 { 234 252 struct amd_gpu_scheduler *sched = entity->sched; 235 253 struct amd_sched_job *sched_job; 236 254 237 - if (ACCESS_ONCE(entity->dependency)) 238 - return NULL; 239 - 240 255 if (!kfifo_out_peek(&entity->job_queue, &sched_job, sizeof(sched_job))) 241 256 return NULL; 242 257 243 - while ((entity->dependency = sched->ops->dependency(sched_job))) { 244 - 245 - if (entity->dependency->context == entity->fence_context) { 246 - /* We can ignore fences from ourself */ 247 - fence_put(entity->dependency); 248 - continue; 249 - } 250 - 251 - if (fence_add_callback(entity->dependency, &entity->cb, 252 - amd_sched_entity_wakeup)) 253 - fence_put(entity->dependency); 254 - else 258 + while ((entity->dependency = sched->ops->dependency(sched_job))) 259 + if (amd_sched_entity_add_dependency_cb(entity)) 255 260 return NULL; 256 - } 257 261 258 262 return sched_job; 259 263 } ··· 342 304 } 343 305 344 306 /** 345 - * Select next to run 307 + * Select next entity to process 346 308 */ 347 - static struct amd_sched_job * 348 - amd_sched_select_job(struct amd_gpu_scheduler *sched) 309 + static struct amd_sched_entity * 310 + amd_sched_select_entity(struct amd_gpu_scheduler *sched) 349 311 { 350 - struct amd_sched_job *sched_job; 312 + struct amd_sched_entity *entity; 351 313 352 314 if (!amd_sched_ready(sched)) 353 315 return NULL; 354 316 355 317 /* Kernel run queue has higher priority than normal run queue*/ 356 - sched_job = amd_sched_rq_select_job(&sched->kernel_rq); 357 - if (sched_job == NULL) 358 - sched_job = amd_sched_rq_select_job(&sched->sched_rq); 318 + entity = amd_sched_rq_select_entity(&sched->kernel_rq); 319 + if (entity == NULL) 320 + entity = amd_sched_rq_select_entity(&sched->sched_rq); 359 321 360 - return sched_job; 322 + return entity; 361 323 } 362 324 363 325 static void amd_sched_process_job(struct fence *f, struct fence_cb *cb) ··· 419 381 unsigned long flags; 420 382 421 383 wait_event_interruptible(sched->wake_up_worker, 422 - kthread_should_stop() || 423 - (sched_job = amd_sched_select_job(sched))); 384 + (entity = amd_sched_select_entity(sched)) || 385 + kthread_should_stop()); 424 386 387 + if (!entity) 388 + continue; 389 + 390 + sched_job = amd_sched_entity_pop_job(entity); 425 391 if (!sched_job) 426 392 continue; 427 393 428 - entity = sched_job->s_entity; 429 394 s_fence = sched_job->s_fence; 430 395 431 396 if (sched->timeout != MAX_SCHEDULE_TIMEOUT) { ··· 441 400 442 401 atomic_inc(&sched->hw_rq_count); 443 402 fence = sched->ops->run_job(sched_job); 403 + amd_sched_fence_scheduled(s_fence); 444 404 if (fence) { 445 405 r = fence_add_callback(fence, &s_fence->cb, 446 406 amd_sched_process_job);
+4 -1
drivers/gpu/drm/amd/scheduler/gpu_scheduler.h
··· 27 27 #include <linux/kfifo.h> 28 28 #include <linux/fence.h> 29 29 30 + #define AMD_SCHED_FENCE_SCHEDULED_BIT FENCE_FLAG_USER_BITS 31 + 30 32 struct amd_gpu_scheduler; 31 33 struct amd_sched_rq; 32 34 ··· 70 68 struct amd_sched_fence { 71 69 struct fence base; 72 70 struct fence_cb cb; 71 + struct list_head scheduled_cb; 73 72 struct amd_gpu_scheduler *sched; 74 73 spinlock_t lock; 75 74 void *owner; ··· 137 134 138 135 struct amd_sched_fence *amd_sched_fence_create( 139 136 struct amd_sched_entity *s_entity, void *owner); 137 + void amd_sched_fence_scheduled(struct amd_sched_fence *fence); 140 138 void amd_sched_fence_signal(struct amd_sched_fence *fence); 141 - 142 139 143 140 #endif
+13
drivers/gpu/drm/amd/scheduler/sched_fence.c
··· 35 35 fence = kmem_cache_zalloc(sched_fence_slab, GFP_KERNEL); 36 36 if (fence == NULL) 37 37 return NULL; 38 + 39 + INIT_LIST_HEAD(&fence->scheduled_cb); 38 40 fence->owner = owner; 39 41 fence->sched = s_entity->sched; 40 42 spin_lock_init(&fence->lock); ··· 55 53 FENCE_TRACE(&fence->base, "signaled from irq context\n"); 56 54 else 57 55 FENCE_TRACE(&fence->base, "was already signaled\n"); 56 + } 57 + 58 + void amd_sched_fence_scheduled(struct amd_sched_fence *s_fence) 59 + { 60 + struct fence_cb *cur, *tmp; 61 + 62 + set_bit(AMD_SCHED_FENCE_SCHEDULED_BIT, &s_fence->base.flags); 63 + list_for_each_entry_safe(cur, tmp, &s_fence->scheduled_cb, node) { 64 + list_del_init(&cur->node); 65 + cur->func(&s_fence->base, cur); 66 + } 58 67 } 59 68 60 69 static const char *amd_sched_fence_get_driver_name(struct fence *fence)
+1
drivers/gpu/drm/nouveau/include/nvkm/subdev/instmem.h
··· 7 7 const struct nvkm_instmem_func *func; 8 8 struct nvkm_subdev subdev; 9 9 10 + spinlock_t lock; 10 11 struct list_head list; 11 12 u32 reserved; 12 13
+1
drivers/gpu/drm/nouveau/nouveau_acpi.c
··· 367 367 return -ENODEV; 368 368 } 369 369 obj = (union acpi_object *)buffer.pointer; 370 + len = min(len, (int)obj->buffer.length); 370 371 memcpy(bios+offset, obj->buffer.pointer, len); 371 372 kfree(buffer.pointer); 372 373 return len;
+3 -1
drivers/gpu/drm/nouveau/nouveau_drm.h
··· 39 39 40 40 #include <nvif/client.h> 41 41 #include <nvif/device.h> 42 + #include <nvif/ioctl.h> 42 43 43 44 #include <drmP.h> 44 45 ··· 66 65 }; 67 66 68 67 enum nouveau_drm_object_route { 69 - NVDRM_OBJECT_NVIF = 0, 68 + NVDRM_OBJECT_NVIF = NVIF_IOCTL_V0_OWNER_NVIF, 70 69 NVDRM_OBJECT_USIF, 71 70 NVDRM_OBJECT_ABI16, 71 + NVDRM_OBJECT_ANY = NVIF_IOCTL_V0_OWNER_ANY, 72 72 }; 73 73 74 74 enum nouveau_drm_notify_route {
+4 -1
drivers/gpu/drm/nouveau/nouveau_usif.c
··· 313 313 if (nvif_unpack(argv->v0, 0, 0, true)) { 314 314 /* block access to objects not created via this interface */ 315 315 owner = argv->v0.owner; 316 - argv->v0.owner = NVDRM_OBJECT_USIF; 316 + if (argv->v0.object == 0ULL) 317 + argv->v0.owner = NVDRM_OBJECT_ANY; /* except client */ 318 + else 319 + argv->v0.owner = NVDRM_OBJECT_USIF; 317 320 } else 318 321 goto done; 319 322
+14 -2
drivers/gpu/drm/nouveau/nvkm/engine/device/pci.c
··· 279 279 }; 280 280 281 281 static const struct nvkm_device_pci_vendor 282 + nvkm_device_pci_10de_0fe4[] = { 283 + { 0x144d, 0xc740, NULL, { .War00C800_0 = true } }, 284 + {} 285 + }; 286 + 287 + static const struct nvkm_device_pci_vendor 282 288 nvkm_device_pci_10de_104b[] = { 283 289 { 0x1043, 0x844c, "GeForce GT 625" }, 284 290 { 0x1043, 0x846b, "GeForce GT 625" }, ··· 691 685 nvkm_device_pci_10de_1199[] = { 692 686 { 0x1458, 0xd001, "GeForce GTX 760" }, 693 687 { 0x1462, 0x1106, "GeForce GTX 780M", { .War00C800_0 = true } }, /* Medion Erazer X7827 */ 688 + {} 689 + }; 690 + 691 + static const struct nvkm_device_pci_vendor 692 + nvkm_device_pci_10de_11e0[] = { 693 + { 0x1558, 0x5106, NULL, { .War00C800_0 = true } }, 694 694 {} 695 695 }; 696 696 ··· 1382 1370 { 0x0fe1, "GeForce GT 730M" }, 1383 1371 { 0x0fe2, "GeForce GT 745M" }, 1384 1372 { 0x0fe3, "GeForce GT 745M", nvkm_device_pci_10de_0fe3 }, 1385 - { 0x0fe4, "GeForce GT 750M" }, 1373 + { 0x0fe4, "GeForce GT 750M", nvkm_device_pci_10de_0fe4 }, 1386 1374 { 0x0fe9, "GeForce GT 750M" }, 1387 1375 { 0x0fea, "GeForce GT 755M" }, 1388 1376 { 0x0fec, "GeForce 710A" }, ··· 1497 1485 { 0x11c6, "GeForce GTX 650 Ti" }, 1498 1486 { 0x11c8, "GeForce GTX 650" }, 1499 1487 { 0x11cb, "GeForce GT 740" }, 1500 - { 0x11e0, "GeForce GTX 770M" }, 1488 + { 0x11e0, "GeForce GTX 770M", nvkm_device_pci_10de_11e0 }, 1501 1489 { 0x11e1, "GeForce GTX 765M" }, 1502 1490 { 0x11e2, "GeForce GTX 765M" }, 1503 1491 { 0x11e3, "GeForce GTX 760M", nvkm_device_pci_10de_11e3 },
+2
drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf117.c
··· 207 207 const u32 b = beta * gr->ppc_tpc_nr[gpc][ppc]; 208 208 const u32 t = timeslice_mode; 209 209 const u32 o = PPC_UNIT(gpc, ppc, 0); 210 + if (!(gr->ppc_mask[gpc] & (1 << ppc))) 211 + continue; 210 212 mmio_skip(info, o + 0xc0, (t << 28) | (b << 16) | ++bo); 211 213 mmio_wr32(info, o + 0xc0, (t << 28) | (b << 16) | --bo); 212 214 bo += grctx->attrib_nr_max * gr->ppc_tpc_nr[gpc][ppc];
+5 -3
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpc.fuc
··· 52 52 #endif 53 53 54 54 #ifdef INCLUDE_CODE 55 + #define gpc_addr(reg,addr) /* 56 + */ imm32(reg,addr) /* 57 + */ or reg NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE 55 58 #define gpc_wr32(addr,reg) /* 59 + */ gpc_addr($r14,addr) /* 56 60 */ mov b32 $r15 reg /* 57 - */ imm32($r14, addr) /* 58 - */ or $r14 NV_PGRAPH_GPCX_GPCCS_MMIO_CTRL_BASE_ENABLE /* 59 61 */ call(nv_wr32) 60 62 61 63 // reports an exception to the host ··· 163 161 164 162 #if NV_PGRAPH_GPCX_UNK__SIZE > 0 165 163 // figure out which, and how many, UNKs are actually present 166 - imm32($r14, 0x500c30) 164 + gpc_addr($r14, 0x500c30) 167 165 clear b32 $r2 168 166 clear b32 $r3 169 167 clear b32 $r4
+172 -172
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgf117.fuc3.h
··· 314 314 0x03f01200, 315 315 0x0002d000, 316 316 0x17f104bd, 317 - 0x10fe0542, 317 + 0x10fe0545, 318 318 0x0007f100, 319 319 0x0003f007, 320 320 0xbd0000d0, ··· 338 338 0x02d00103, 339 339 0xf104bd00, 340 340 0xf00c30e7, 341 - 0x24bd50e3, 342 - 0x44bd34bd, 343 - /* 0x0430: init_unk_loop */ 344 - 0xb06821f4, 345 - 0x0bf400f6, 346 - 0x01f7f00f, 347 - 0xfd04f2bb, 348 - 0x30b6054f, 349 - /* 0x0445: init_unk_next */ 350 - 0x0120b601, 351 - 0xb004e0b6, 352 - 0x1bf40126, 353 - /* 0x0451: init_unk_done */ 354 - 0x070380e2, 355 - 0xf1080480, 356 - 0xf0010027, 357 - 0x22cf0223, 358 - 0x9534bd00, 359 - 0x07f10825, 360 - 0x03f0c000, 361 - 0x0005d001, 362 - 0x07f104bd, 363 - 0x03f0c100, 364 - 0x0005d001, 365 - 0x0e9804bd, 366 - 0x010f9800, 367 - 0x015021f5, 368 - 0xbb002fbb, 369 - 0x0e98003f, 370 - 0x020f9801, 371 - 0x015021f5, 372 - 0xfd050e98, 373 - 0x2ebb00ef, 374 - 0x003ebb00, 375 - 0x98020e98, 376 - 0x21f5030f, 377 - 0x0e980150, 378 - 0x00effd07, 379 - 0xbb002ebb, 380 - 0x35b6003e, 381 - 0x0007f102, 382 - 0x0103f0d3, 383 - 0xbd0003d0, 384 - 0x0825b604, 385 - 0xb60635b6, 386 - 0x30b60120, 387 - 0x0824b601, 388 - 0xb90834b6, 389 - 0x21f5022f, 390 - 0x2fbb02d3, 391 - 0x003fbb00, 392 - 0x010007f1, 393 - 0xd00203f0, 341 + 0xe5f050e3, 342 + 0xbd24bd01, 343 + /* 0x0433: init_unk_loop */ 344 + 0xf444bd34, 345 + 0xf6b06821, 346 + 0x0f0bf400, 347 + 0xbb01f7f0, 348 + 0x4ffd04f2, 349 + 0x0130b605, 350 + /* 0x0448: init_unk_next */ 351 + 0xb60120b6, 352 + 0x26b004e0, 353 + 0xe21bf401, 354 + /* 0x0454: init_unk_done */ 355 + 0x80070380, 356 + 0x27f10804, 357 + 0x23f00100, 358 + 0x0022cf02, 359 + 0x259534bd, 360 + 0x0007f108, 361 + 0x0103f0c0, 362 + 0xbd0005d0, 363 + 0x0007f104, 364 + 0x0103f0c1, 365 + 0xbd0005d0, 366 + 0x000e9804, 367 + 0xf5010f98, 368 + 0xbb015021, 369 + 0x3fbb002f, 370 + 0x010e9800, 371 + 0xf5020f98, 372 + 0x98015021, 373 + 0xeffd050e, 374 + 0x002ebb00, 375 + 0x98003ebb, 376 + 0x0f98020e, 377 + 0x5021f503, 378 + 0x070e9801, 379 + 0xbb00effd, 380 + 0x3ebb002e, 381 + 0x0235b600, 382 + 0xd30007f1, 383 + 0xd00103f0, 394 384 0x04bd0003, 395 - 0x29f024bd, 396 - 0x0007f11f, 397 - 0x0203f008, 398 - 0xbd0002d0, 399 - /* 0x0505: main */ 400 - 0x0031f404, 401 - 0xf00028f4, 402 - 0x21f424d7, 403 - 0xf401f439, 404 - 0xf404e4b0, 405 - 0x81fe1e18, 406 - 0x0627f001, 407 - 0x12fd20bd, 408 - 0x01e4b604, 409 - 0xfe051efd, 410 - 0x21f50018, 411 - 0x0ef405fa, 412 - /* 0x0535: main_not_ctx_xfer */ 413 - 0x10ef94d3, 414 - 0xf501f5f0, 415 - 0xf4037e21, 416 - /* 0x0542: ih */ 417 - 0x80f9c60e, 418 - 0xf90188fe, 419 - 0xf990f980, 420 - 0xf9b0f9a0, 421 - 0xf9e0f9d0, 422 - 0xf104bdf0, 423 - 0xf00200a7, 424 - 0xaacf00a3, 425 - 0x04abc400, 426 - 0xf02c0bf4, 427 - 0xe7f124d7, 428 - 0xe3f01a00, 429 - 0x00eecf00, 430 - 0x1900f7f1, 431 - 0xcf00f3f0, 432 - 0x21f400ff, 433 - 0x01e7f004, 434 - 0x1d0007f1, 435 - 0xd00003f0, 436 - 0x04bd000e, 437 - /* 0x0590: ih_no_fifo */ 438 - 0x010007f1, 439 - 0xd00003f0, 440 - 0x04bd000a, 441 - 0xe0fcf0fc, 442 - 0xb0fcd0fc, 443 - 0x90fca0fc, 444 - 0x88fe80fc, 445 - 0xf480fc00, 446 - 0x01f80032, 447 - /* 0x05b4: hub_barrier_done */ 448 - 0x9801f7f0, 449 - 0xfebb040e, 450 - 0x02ffb904, 451 - 0x9418e7f1, 452 - 0xf440e3f0, 453 - 0x00f89d21, 454 - /* 0x05cc: ctx_redswitch */ 455 - 0xf120f7f0, 385 + 0xb60825b6, 386 + 0x20b60635, 387 + 0x0130b601, 388 + 0xb60824b6, 389 + 0x2fb90834, 390 + 0xd321f502, 391 + 0x002fbb02, 392 + 0xf1003fbb, 393 + 0xf0010007, 394 + 0x03d00203, 395 + 0xbd04bd00, 396 + 0x1f29f024, 397 + 0x080007f1, 398 + 0xd00203f0, 399 + 0x04bd0002, 400 + /* 0x0508: main */ 401 + 0xf40031f4, 402 + 0xd7f00028, 403 + 0x3921f424, 404 + 0xb0f401f4, 405 + 0x18f404e4, 406 + 0x0181fe1e, 407 + 0xbd0627f0, 408 + 0x0412fd20, 409 + 0xfd01e4b6, 410 + 0x18fe051e, 411 + 0xfd21f500, 412 + 0xd30ef405, 413 + /* 0x0538: main_not_ctx_xfer */ 414 + 0xf010ef94, 415 + 0x21f501f5, 416 + 0x0ef4037e, 417 + /* 0x0545: ih */ 418 + 0xfe80f9c6, 419 + 0x80f90188, 420 + 0xa0f990f9, 421 + 0xd0f9b0f9, 422 + 0xf0f9e0f9, 423 + 0xa7f104bd, 424 + 0xa3f00200, 425 + 0x00aacf00, 426 + 0xf404abc4, 427 + 0xd7f02c0b, 428 + 0x00e7f124, 429 + 0x00e3f01a, 430 + 0xf100eecf, 431 + 0xf01900f7, 432 + 0xffcf00f3, 433 + 0x0421f400, 434 + 0xf101e7f0, 435 + 0xf01d0007, 436 + 0x0ed00003, 437 + /* 0x0593: ih_no_fifo */ 438 + 0xf104bd00, 439 + 0xf0010007, 440 + 0x0ad00003, 441 + 0xfc04bd00, 442 + 0xfce0fcf0, 443 + 0xfcb0fcd0, 444 + 0xfc90fca0, 445 + 0x0088fe80, 446 + 0x32f480fc, 447 + /* 0x05b7: hub_barrier_done */ 448 + 0xf001f800, 449 + 0x0e9801f7, 450 + 0x04febb04, 451 + 0xf102ffb9, 452 + 0xf09418e7, 453 + 0x21f440e3, 454 + /* 0x05cf: ctx_redswitch */ 455 + 0xf000f89d, 456 + 0x07f120f7, 457 + 0x03f08500, 458 + 0x000fd001, 459 + 0xe7f004bd, 460 + /* 0x05e1: ctx_redswitch_delay */ 461 + 0x01e2b608, 462 + 0xf1fd1bf4, 463 + 0xf10800f5, 464 + 0xf10200f5, 456 465 0xf0850007, 457 466 0x0fd00103, 458 - 0xf004bd00, 459 - /* 0x05de: ctx_redswitch_delay */ 460 - 0xe2b608e7, 461 - 0xfd1bf401, 462 - 0x0800f5f1, 463 - 0x0200f5f1, 464 - 0x850007f1, 465 - 0xd00103f0, 466 - 0x04bd000f, 467 - /* 0x05fa: ctx_xfer */ 468 - 0x07f100f8, 469 - 0x03f08100, 470 - 0x000fd002, 471 - 0x11f404bd, 472 - 0xcc21f507, 473 - /* 0x060d: ctx_xfer_not_load */ 474 - 0x6a21f505, 475 - 0xf124bd02, 476 - 0xf047fc07, 477 - 0x02d00203, 478 - 0xf004bd00, 479 - 0x20b6012c, 480 - 0xfc07f103, 481 - 0x0203f04a, 482 - 0xbd0002d0, 483 - 0x01acf004, 484 - 0xf102a5f0, 485 - 0xf00000b7, 486 - 0x0c9850b3, 487 - 0x0fc4b604, 488 - 0x9800bcbb, 489 - 0x0d98000c, 490 - 0x00e7f001, 491 - 0x016f21f5, 492 - 0xf101acf0, 493 - 0xf04000b7, 494 - 0x0c9850b3, 495 - 0x0fc4b604, 496 - 0x9800bcbb, 497 - 0x0d98010c, 498 - 0x060f9802, 499 - 0x0800e7f1, 500 - 0x016f21f5, 467 + 0xf804bd00, 468 + /* 0x05fd: ctx_xfer */ 469 + 0x0007f100, 470 + 0x0203f081, 471 + 0xbd000fd0, 472 + 0x0711f404, 473 + 0x05cf21f5, 474 + /* 0x0610: ctx_xfer_not_load */ 475 + 0x026a21f5, 476 + 0x07f124bd, 477 + 0x03f047fc, 478 + 0x0002d002, 479 + 0x2cf004bd, 480 + 0x0320b601, 481 + 0x4afc07f1, 482 + 0xd00203f0, 483 + 0x04bd0002, 501 484 0xf001acf0, 502 - 0xb7f104a5, 503 - 0xb3f03000, 485 + 0xb7f102a5, 486 + 0xb3f00000, 504 487 0x040c9850, 505 488 0xbb0fc4b6, 506 489 0x0c9800bc, 507 - 0x030d9802, 508 - 0xf1080f98, 509 - 0xf50200e7, 510 - 0xf5016f21, 511 - 0xf4025e21, 512 - 0x12f40601, 513 - /* 0x06a9: ctx_xfer_post */ 514 - 0x7f21f507, 515 - /* 0x06ad: ctx_xfer_done */ 516 - 0xb421f502, 517 - 0x0000f805, 518 - 0x00000000, 490 + 0x010d9800, 491 + 0xf500e7f0, 492 + 0xf0016f21, 493 + 0xb7f101ac, 494 + 0xb3f04000, 495 + 0x040c9850, 496 + 0xbb0fc4b6, 497 + 0x0c9800bc, 498 + 0x020d9801, 499 + 0xf1060f98, 500 + 0xf50800e7, 501 + 0xf0016f21, 502 + 0xa5f001ac, 503 + 0x00b7f104, 504 + 0x50b3f030, 505 + 0xb6040c98, 506 + 0xbcbb0fc4, 507 + 0x020c9800, 508 + 0x98030d98, 509 + 0xe7f1080f, 510 + 0x21f50200, 511 + 0x21f5016f, 512 + 0x01f4025e, 513 + 0x0712f406, 514 + /* 0x06ac: ctx_xfer_post */ 515 + 0x027f21f5, 516 + /* 0x06b0: ctx_xfer_done */ 517 + 0x05b721f5, 518 + 0x000000f8, 519 519 0x00000000, 520 520 0x00000000, 521 521 0x00000000,
+172 -172
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk104.fuc3.h
··· 314 314 0x03f01200, 315 315 0x0002d000, 316 316 0x17f104bd, 317 - 0x10fe0542, 317 + 0x10fe0545, 318 318 0x0007f100, 319 319 0x0003f007, 320 320 0xbd0000d0, ··· 338 338 0x02d00103, 339 339 0xf104bd00, 340 340 0xf00c30e7, 341 - 0x24bd50e3, 342 - 0x44bd34bd, 343 - /* 0x0430: init_unk_loop */ 344 - 0xb06821f4, 345 - 0x0bf400f6, 346 - 0x01f7f00f, 347 - 0xfd04f2bb, 348 - 0x30b6054f, 349 - /* 0x0445: init_unk_next */ 350 - 0x0120b601, 351 - 0xb004e0b6, 352 - 0x1bf40126, 353 - /* 0x0451: init_unk_done */ 354 - 0x070380e2, 355 - 0xf1080480, 356 - 0xf0010027, 357 - 0x22cf0223, 358 - 0x9534bd00, 359 - 0x07f10825, 360 - 0x03f0c000, 361 - 0x0005d001, 362 - 0x07f104bd, 363 - 0x03f0c100, 364 - 0x0005d001, 365 - 0x0e9804bd, 366 - 0x010f9800, 367 - 0x015021f5, 368 - 0xbb002fbb, 369 - 0x0e98003f, 370 - 0x020f9801, 371 - 0x015021f5, 372 - 0xfd050e98, 373 - 0x2ebb00ef, 374 - 0x003ebb00, 375 - 0x98020e98, 376 - 0x21f5030f, 377 - 0x0e980150, 378 - 0x00effd07, 379 - 0xbb002ebb, 380 - 0x35b6003e, 381 - 0x0007f102, 382 - 0x0103f0d3, 383 - 0xbd0003d0, 384 - 0x0825b604, 385 - 0xb60635b6, 386 - 0x30b60120, 387 - 0x0824b601, 388 - 0xb90834b6, 389 - 0x21f5022f, 390 - 0x2fbb02d3, 391 - 0x003fbb00, 392 - 0x010007f1, 393 - 0xd00203f0, 341 + 0xe5f050e3, 342 + 0xbd24bd01, 343 + /* 0x0433: init_unk_loop */ 344 + 0xf444bd34, 345 + 0xf6b06821, 346 + 0x0f0bf400, 347 + 0xbb01f7f0, 348 + 0x4ffd04f2, 349 + 0x0130b605, 350 + /* 0x0448: init_unk_next */ 351 + 0xb60120b6, 352 + 0x26b004e0, 353 + 0xe21bf401, 354 + /* 0x0454: init_unk_done */ 355 + 0x80070380, 356 + 0x27f10804, 357 + 0x23f00100, 358 + 0x0022cf02, 359 + 0x259534bd, 360 + 0x0007f108, 361 + 0x0103f0c0, 362 + 0xbd0005d0, 363 + 0x0007f104, 364 + 0x0103f0c1, 365 + 0xbd0005d0, 366 + 0x000e9804, 367 + 0xf5010f98, 368 + 0xbb015021, 369 + 0x3fbb002f, 370 + 0x010e9800, 371 + 0xf5020f98, 372 + 0x98015021, 373 + 0xeffd050e, 374 + 0x002ebb00, 375 + 0x98003ebb, 376 + 0x0f98020e, 377 + 0x5021f503, 378 + 0x070e9801, 379 + 0xbb00effd, 380 + 0x3ebb002e, 381 + 0x0235b600, 382 + 0xd30007f1, 383 + 0xd00103f0, 394 384 0x04bd0003, 395 - 0x29f024bd, 396 - 0x0007f11f, 397 - 0x0203f008, 398 - 0xbd0002d0, 399 - /* 0x0505: main */ 400 - 0x0031f404, 401 - 0xf00028f4, 402 - 0x21f424d7, 403 - 0xf401f439, 404 - 0xf404e4b0, 405 - 0x81fe1e18, 406 - 0x0627f001, 407 - 0x12fd20bd, 408 - 0x01e4b604, 409 - 0xfe051efd, 410 - 0x21f50018, 411 - 0x0ef405fa, 412 - /* 0x0535: main_not_ctx_xfer */ 413 - 0x10ef94d3, 414 - 0xf501f5f0, 415 - 0xf4037e21, 416 - /* 0x0542: ih */ 417 - 0x80f9c60e, 418 - 0xf90188fe, 419 - 0xf990f980, 420 - 0xf9b0f9a0, 421 - 0xf9e0f9d0, 422 - 0xf104bdf0, 423 - 0xf00200a7, 424 - 0xaacf00a3, 425 - 0x04abc400, 426 - 0xf02c0bf4, 427 - 0xe7f124d7, 428 - 0xe3f01a00, 429 - 0x00eecf00, 430 - 0x1900f7f1, 431 - 0xcf00f3f0, 432 - 0x21f400ff, 433 - 0x01e7f004, 434 - 0x1d0007f1, 435 - 0xd00003f0, 436 - 0x04bd000e, 437 - /* 0x0590: ih_no_fifo */ 438 - 0x010007f1, 439 - 0xd00003f0, 440 - 0x04bd000a, 441 - 0xe0fcf0fc, 442 - 0xb0fcd0fc, 443 - 0x90fca0fc, 444 - 0x88fe80fc, 445 - 0xf480fc00, 446 - 0x01f80032, 447 - /* 0x05b4: hub_barrier_done */ 448 - 0x9801f7f0, 449 - 0xfebb040e, 450 - 0x02ffb904, 451 - 0x9418e7f1, 452 - 0xf440e3f0, 453 - 0x00f89d21, 454 - /* 0x05cc: ctx_redswitch */ 455 - 0xf120f7f0, 385 + 0xb60825b6, 386 + 0x20b60635, 387 + 0x0130b601, 388 + 0xb60824b6, 389 + 0x2fb90834, 390 + 0xd321f502, 391 + 0x002fbb02, 392 + 0xf1003fbb, 393 + 0xf0010007, 394 + 0x03d00203, 395 + 0xbd04bd00, 396 + 0x1f29f024, 397 + 0x080007f1, 398 + 0xd00203f0, 399 + 0x04bd0002, 400 + /* 0x0508: main */ 401 + 0xf40031f4, 402 + 0xd7f00028, 403 + 0x3921f424, 404 + 0xb0f401f4, 405 + 0x18f404e4, 406 + 0x0181fe1e, 407 + 0xbd0627f0, 408 + 0x0412fd20, 409 + 0xfd01e4b6, 410 + 0x18fe051e, 411 + 0xfd21f500, 412 + 0xd30ef405, 413 + /* 0x0538: main_not_ctx_xfer */ 414 + 0xf010ef94, 415 + 0x21f501f5, 416 + 0x0ef4037e, 417 + /* 0x0545: ih */ 418 + 0xfe80f9c6, 419 + 0x80f90188, 420 + 0xa0f990f9, 421 + 0xd0f9b0f9, 422 + 0xf0f9e0f9, 423 + 0xa7f104bd, 424 + 0xa3f00200, 425 + 0x00aacf00, 426 + 0xf404abc4, 427 + 0xd7f02c0b, 428 + 0x00e7f124, 429 + 0x00e3f01a, 430 + 0xf100eecf, 431 + 0xf01900f7, 432 + 0xffcf00f3, 433 + 0x0421f400, 434 + 0xf101e7f0, 435 + 0xf01d0007, 436 + 0x0ed00003, 437 + /* 0x0593: ih_no_fifo */ 438 + 0xf104bd00, 439 + 0xf0010007, 440 + 0x0ad00003, 441 + 0xfc04bd00, 442 + 0xfce0fcf0, 443 + 0xfcb0fcd0, 444 + 0xfc90fca0, 445 + 0x0088fe80, 446 + 0x32f480fc, 447 + /* 0x05b7: hub_barrier_done */ 448 + 0xf001f800, 449 + 0x0e9801f7, 450 + 0x04febb04, 451 + 0xf102ffb9, 452 + 0xf09418e7, 453 + 0x21f440e3, 454 + /* 0x05cf: ctx_redswitch */ 455 + 0xf000f89d, 456 + 0x07f120f7, 457 + 0x03f08500, 458 + 0x000fd001, 459 + 0xe7f004bd, 460 + /* 0x05e1: ctx_redswitch_delay */ 461 + 0x01e2b608, 462 + 0xf1fd1bf4, 463 + 0xf10800f5, 464 + 0xf10200f5, 456 465 0xf0850007, 457 466 0x0fd00103, 458 - 0xf004bd00, 459 - /* 0x05de: ctx_redswitch_delay */ 460 - 0xe2b608e7, 461 - 0xfd1bf401, 462 - 0x0800f5f1, 463 - 0x0200f5f1, 464 - 0x850007f1, 465 - 0xd00103f0, 466 - 0x04bd000f, 467 - /* 0x05fa: ctx_xfer */ 468 - 0x07f100f8, 469 - 0x03f08100, 470 - 0x000fd002, 471 - 0x11f404bd, 472 - 0xcc21f507, 473 - /* 0x060d: ctx_xfer_not_load */ 474 - 0x6a21f505, 475 - 0xf124bd02, 476 - 0xf047fc07, 477 - 0x02d00203, 478 - 0xf004bd00, 479 - 0x20b6012c, 480 - 0xfc07f103, 481 - 0x0203f04a, 482 - 0xbd0002d0, 483 - 0x01acf004, 484 - 0xf102a5f0, 485 - 0xf00000b7, 486 - 0x0c9850b3, 487 - 0x0fc4b604, 488 - 0x9800bcbb, 489 - 0x0d98000c, 490 - 0x00e7f001, 491 - 0x016f21f5, 492 - 0xf101acf0, 493 - 0xf04000b7, 494 - 0x0c9850b3, 495 - 0x0fc4b604, 496 - 0x9800bcbb, 497 - 0x0d98010c, 498 - 0x060f9802, 499 - 0x0800e7f1, 500 - 0x016f21f5, 467 + 0xf804bd00, 468 + /* 0x05fd: ctx_xfer */ 469 + 0x0007f100, 470 + 0x0203f081, 471 + 0xbd000fd0, 472 + 0x0711f404, 473 + 0x05cf21f5, 474 + /* 0x0610: ctx_xfer_not_load */ 475 + 0x026a21f5, 476 + 0x07f124bd, 477 + 0x03f047fc, 478 + 0x0002d002, 479 + 0x2cf004bd, 480 + 0x0320b601, 481 + 0x4afc07f1, 482 + 0xd00203f0, 483 + 0x04bd0002, 501 484 0xf001acf0, 502 - 0xb7f104a5, 503 - 0xb3f03000, 485 + 0xb7f102a5, 486 + 0xb3f00000, 504 487 0x040c9850, 505 488 0xbb0fc4b6, 506 489 0x0c9800bc, 507 - 0x030d9802, 508 - 0xf1080f98, 509 - 0xf50200e7, 510 - 0xf5016f21, 511 - 0xf4025e21, 512 - 0x12f40601, 513 - /* 0x06a9: ctx_xfer_post */ 514 - 0x7f21f507, 515 - /* 0x06ad: ctx_xfer_done */ 516 - 0xb421f502, 517 - 0x0000f805, 518 - 0x00000000, 490 + 0x010d9800, 491 + 0xf500e7f0, 492 + 0xf0016f21, 493 + 0xb7f101ac, 494 + 0xb3f04000, 495 + 0x040c9850, 496 + 0xbb0fc4b6, 497 + 0x0c9800bc, 498 + 0x020d9801, 499 + 0xf1060f98, 500 + 0xf50800e7, 501 + 0xf0016f21, 502 + 0xa5f001ac, 503 + 0x00b7f104, 504 + 0x50b3f030, 505 + 0xb6040c98, 506 + 0xbcbb0fc4, 507 + 0x020c9800, 508 + 0x98030d98, 509 + 0xe7f1080f, 510 + 0x21f50200, 511 + 0x21f5016f, 512 + 0x01f4025e, 513 + 0x0712f406, 514 + /* 0x06ac: ctx_xfer_post */ 515 + 0x027f21f5, 516 + /* 0x06b0: ctx_xfer_done */ 517 + 0x05b721f5, 518 + 0x000000f8, 519 519 0x00000000, 520 520 0x00000000, 521 521 0x00000000,
+172 -172
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk110.fuc3.h
··· 314 314 0x03f01200, 315 315 0x0002d000, 316 316 0x17f104bd, 317 - 0x10fe0542, 317 + 0x10fe0545, 318 318 0x0007f100, 319 319 0x0003f007, 320 320 0xbd0000d0, ··· 338 338 0x02d00103, 339 339 0xf104bd00, 340 340 0xf00c30e7, 341 - 0x24bd50e3, 342 - 0x44bd34bd, 343 - /* 0x0430: init_unk_loop */ 344 - 0xb06821f4, 345 - 0x0bf400f6, 346 - 0x01f7f00f, 347 - 0xfd04f2bb, 348 - 0x30b6054f, 349 - /* 0x0445: init_unk_next */ 350 - 0x0120b601, 351 - 0xb004e0b6, 352 - 0x1bf40226, 353 - /* 0x0451: init_unk_done */ 354 - 0x070380e2, 355 - 0xf1080480, 356 - 0xf0010027, 357 - 0x22cf0223, 358 - 0x9534bd00, 359 - 0x07f10825, 360 - 0x03f0c000, 361 - 0x0005d001, 362 - 0x07f104bd, 363 - 0x03f0c100, 364 - 0x0005d001, 365 - 0x0e9804bd, 366 - 0x010f9800, 367 - 0x015021f5, 368 - 0xbb002fbb, 369 - 0x0e98003f, 370 - 0x020f9801, 371 - 0x015021f5, 372 - 0xfd050e98, 373 - 0x2ebb00ef, 374 - 0x003ebb00, 375 - 0x98020e98, 376 - 0x21f5030f, 377 - 0x0e980150, 378 - 0x00effd07, 379 - 0xbb002ebb, 380 - 0x35b6003e, 381 - 0x0007f102, 382 - 0x0103f0d3, 383 - 0xbd0003d0, 384 - 0x0825b604, 385 - 0xb60635b6, 386 - 0x30b60120, 387 - 0x0824b601, 388 - 0xb90834b6, 389 - 0x21f5022f, 390 - 0x2fbb02d3, 391 - 0x003fbb00, 392 - 0x010007f1, 393 - 0xd00203f0, 341 + 0xe5f050e3, 342 + 0xbd24bd01, 343 + /* 0x0433: init_unk_loop */ 344 + 0xf444bd34, 345 + 0xf6b06821, 346 + 0x0f0bf400, 347 + 0xbb01f7f0, 348 + 0x4ffd04f2, 349 + 0x0130b605, 350 + /* 0x0448: init_unk_next */ 351 + 0xb60120b6, 352 + 0x26b004e0, 353 + 0xe21bf402, 354 + /* 0x0454: init_unk_done */ 355 + 0x80070380, 356 + 0x27f10804, 357 + 0x23f00100, 358 + 0x0022cf02, 359 + 0x259534bd, 360 + 0x0007f108, 361 + 0x0103f0c0, 362 + 0xbd0005d0, 363 + 0x0007f104, 364 + 0x0103f0c1, 365 + 0xbd0005d0, 366 + 0x000e9804, 367 + 0xf5010f98, 368 + 0xbb015021, 369 + 0x3fbb002f, 370 + 0x010e9800, 371 + 0xf5020f98, 372 + 0x98015021, 373 + 0xeffd050e, 374 + 0x002ebb00, 375 + 0x98003ebb, 376 + 0x0f98020e, 377 + 0x5021f503, 378 + 0x070e9801, 379 + 0xbb00effd, 380 + 0x3ebb002e, 381 + 0x0235b600, 382 + 0xd30007f1, 383 + 0xd00103f0, 394 384 0x04bd0003, 395 - 0x29f024bd, 396 - 0x0007f11f, 397 - 0x0203f030, 398 - 0xbd0002d0, 399 - /* 0x0505: main */ 400 - 0x0031f404, 401 - 0xf00028f4, 402 - 0x21f424d7, 403 - 0xf401f439, 404 - 0xf404e4b0, 405 - 0x81fe1e18, 406 - 0x0627f001, 407 - 0x12fd20bd, 408 - 0x01e4b604, 409 - 0xfe051efd, 410 - 0x21f50018, 411 - 0x0ef405fa, 412 - /* 0x0535: main_not_ctx_xfer */ 413 - 0x10ef94d3, 414 - 0xf501f5f0, 415 - 0xf4037e21, 416 - /* 0x0542: ih */ 417 - 0x80f9c60e, 418 - 0xf90188fe, 419 - 0xf990f980, 420 - 0xf9b0f9a0, 421 - 0xf9e0f9d0, 422 - 0xf104bdf0, 423 - 0xf00200a7, 424 - 0xaacf00a3, 425 - 0x04abc400, 426 - 0xf02c0bf4, 427 - 0xe7f124d7, 428 - 0xe3f01a00, 429 - 0x00eecf00, 430 - 0x1900f7f1, 431 - 0xcf00f3f0, 432 - 0x21f400ff, 433 - 0x01e7f004, 434 - 0x1d0007f1, 435 - 0xd00003f0, 436 - 0x04bd000e, 437 - /* 0x0590: ih_no_fifo */ 438 - 0x010007f1, 439 - 0xd00003f0, 440 - 0x04bd000a, 441 - 0xe0fcf0fc, 442 - 0xb0fcd0fc, 443 - 0x90fca0fc, 444 - 0x88fe80fc, 445 - 0xf480fc00, 446 - 0x01f80032, 447 - /* 0x05b4: hub_barrier_done */ 448 - 0x9801f7f0, 449 - 0xfebb040e, 450 - 0x02ffb904, 451 - 0x9418e7f1, 452 - 0xf440e3f0, 453 - 0x00f89d21, 454 - /* 0x05cc: ctx_redswitch */ 455 - 0xf120f7f0, 385 + 0xb60825b6, 386 + 0x20b60635, 387 + 0x0130b601, 388 + 0xb60824b6, 389 + 0x2fb90834, 390 + 0xd321f502, 391 + 0x002fbb02, 392 + 0xf1003fbb, 393 + 0xf0010007, 394 + 0x03d00203, 395 + 0xbd04bd00, 396 + 0x1f29f024, 397 + 0x300007f1, 398 + 0xd00203f0, 399 + 0x04bd0002, 400 + /* 0x0508: main */ 401 + 0xf40031f4, 402 + 0xd7f00028, 403 + 0x3921f424, 404 + 0xb0f401f4, 405 + 0x18f404e4, 406 + 0x0181fe1e, 407 + 0xbd0627f0, 408 + 0x0412fd20, 409 + 0xfd01e4b6, 410 + 0x18fe051e, 411 + 0xfd21f500, 412 + 0xd30ef405, 413 + /* 0x0538: main_not_ctx_xfer */ 414 + 0xf010ef94, 415 + 0x21f501f5, 416 + 0x0ef4037e, 417 + /* 0x0545: ih */ 418 + 0xfe80f9c6, 419 + 0x80f90188, 420 + 0xa0f990f9, 421 + 0xd0f9b0f9, 422 + 0xf0f9e0f9, 423 + 0xa7f104bd, 424 + 0xa3f00200, 425 + 0x00aacf00, 426 + 0xf404abc4, 427 + 0xd7f02c0b, 428 + 0x00e7f124, 429 + 0x00e3f01a, 430 + 0xf100eecf, 431 + 0xf01900f7, 432 + 0xffcf00f3, 433 + 0x0421f400, 434 + 0xf101e7f0, 435 + 0xf01d0007, 436 + 0x0ed00003, 437 + /* 0x0593: ih_no_fifo */ 438 + 0xf104bd00, 439 + 0xf0010007, 440 + 0x0ad00003, 441 + 0xfc04bd00, 442 + 0xfce0fcf0, 443 + 0xfcb0fcd0, 444 + 0xfc90fca0, 445 + 0x0088fe80, 446 + 0x32f480fc, 447 + /* 0x05b7: hub_barrier_done */ 448 + 0xf001f800, 449 + 0x0e9801f7, 450 + 0x04febb04, 451 + 0xf102ffb9, 452 + 0xf09418e7, 453 + 0x21f440e3, 454 + /* 0x05cf: ctx_redswitch */ 455 + 0xf000f89d, 456 + 0x07f120f7, 457 + 0x03f08500, 458 + 0x000fd001, 459 + 0xe7f004bd, 460 + /* 0x05e1: ctx_redswitch_delay */ 461 + 0x01e2b608, 462 + 0xf1fd1bf4, 463 + 0xf10800f5, 464 + 0xf10200f5, 456 465 0xf0850007, 457 466 0x0fd00103, 458 - 0xf004bd00, 459 - /* 0x05de: ctx_redswitch_delay */ 460 - 0xe2b608e7, 461 - 0xfd1bf401, 462 - 0x0800f5f1, 463 - 0x0200f5f1, 464 - 0x850007f1, 465 - 0xd00103f0, 466 - 0x04bd000f, 467 - /* 0x05fa: ctx_xfer */ 468 - 0x07f100f8, 469 - 0x03f08100, 470 - 0x000fd002, 471 - 0x11f404bd, 472 - 0xcc21f507, 473 - /* 0x060d: ctx_xfer_not_load */ 474 - 0x6a21f505, 475 - 0xf124bd02, 476 - 0xf047fc07, 477 - 0x02d00203, 478 - 0xf004bd00, 479 - 0x20b6012c, 480 - 0xfc07f103, 481 - 0x0203f04a, 482 - 0xbd0002d0, 483 - 0x01acf004, 484 - 0xf102a5f0, 485 - 0xf00000b7, 486 - 0x0c9850b3, 487 - 0x0fc4b604, 488 - 0x9800bcbb, 489 - 0x0d98000c, 490 - 0x00e7f001, 491 - 0x016f21f5, 492 - 0xf101acf0, 493 - 0xf04000b7, 494 - 0x0c9850b3, 495 - 0x0fc4b604, 496 - 0x9800bcbb, 497 - 0x0d98010c, 498 - 0x060f9802, 499 - 0x0800e7f1, 500 - 0x016f21f5, 467 + 0xf804bd00, 468 + /* 0x05fd: ctx_xfer */ 469 + 0x0007f100, 470 + 0x0203f081, 471 + 0xbd000fd0, 472 + 0x0711f404, 473 + 0x05cf21f5, 474 + /* 0x0610: ctx_xfer_not_load */ 475 + 0x026a21f5, 476 + 0x07f124bd, 477 + 0x03f047fc, 478 + 0x0002d002, 479 + 0x2cf004bd, 480 + 0x0320b601, 481 + 0x4afc07f1, 482 + 0xd00203f0, 483 + 0x04bd0002, 501 484 0xf001acf0, 502 - 0xb7f104a5, 503 - 0xb3f03000, 485 + 0xb7f102a5, 486 + 0xb3f00000, 504 487 0x040c9850, 505 488 0xbb0fc4b6, 506 489 0x0c9800bc, 507 - 0x030d9802, 508 - 0xf1080f98, 509 - 0xf50200e7, 510 - 0xf5016f21, 511 - 0xf4025e21, 512 - 0x12f40601, 513 - /* 0x06a9: ctx_xfer_post */ 514 - 0x7f21f507, 515 - /* 0x06ad: ctx_xfer_done */ 516 - 0xb421f502, 517 - 0x0000f805, 518 - 0x00000000, 490 + 0x010d9800, 491 + 0xf500e7f0, 492 + 0xf0016f21, 493 + 0xb7f101ac, 494 + 0xb3f04000, 495 + 0x040c9850, 496 + 0xbb0fc4b6, 497 + 0x0c9800bc, 498 + 0x020d9801, 499 + 0xf1060f98, 500 + 0xf50800e7, 501 + 0xf0016f21, 502 + 0xa5f001ac, 503 + 0x00b7f104, 504 + 0x50b3f030, 505 + 0xb6040c98, 506 + 0xbcbb0fc4, 507 + 0x020c9800, 508 + 0x98030d98, 509 + 0xe7f1080f, 510 + 0x21f50200, 511 + 0x21f5016f, 512 + 0x01f4025e, 513 + 0x0712f406, 514 + /* 0x06ac: ctx_xfer_post */ 515 + 0x027f21f5, 516 + /* 0x06b0: ctx_xfer_done */ 517 + 0x05b721f5, 518 + 0x000000f8, 519 519 0x00000000, 520 520 0x00000000, 521 521 0x00000000,
+154 -154
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgk208.fuc5.h
··· 276 276 0x02020014, 277 277 0xf6120040, 278 278 0x04bd0002, 279 - 0xfe048141, 279 + 0xfe048441, 280 280 0x00400010, 281 281 0x0000f607, 282 282 0x040204bd, ··· 295 295 0x01c90080, 296 296 0xbd0002f6, 297 297 0x0c308e04, 298 - 0xbd24bd50, 299 - /* 0x0383: init_unk_loop */ 300 - 0x7e44bd34, 301 - 0xb0000065, 302 - 0x0bf400f6, 303 - 0xbb010f0e, 304 - 0x4ffd04f2, 305 - 0x0130b605, 306 - /* 0x0398: init_unk_next */ 307 - 0xb60120b6, 308 - 0x26b004e0, 309 - 0xe21bf401, 310 - /* 0x03a4: init_unk_done */ 311 - 0xb50703b5, 312 - 0x00820804, 313 - 0x22cf0201, 314 - 0x9534bd00, 315 - 0x00800825, 316 - 0x05f601c0, 317 - 0x8004bd00, 318 - 0xf601c100, 319 - 0x04bd0005, 320 - 0x98000e98, 321 - 0x207e010f, 322 - 0x2fbb0001, 323 - 0x003fbb00, 324 - 0x98010e98, 325 - 0x207e020f, 326 - 0x0e980001, 327 - 0x00effd05, 328 - 0xbb002ebb, 329 - 0x0e98003e, 330 - 0x030f9802, 331 - 0x0001207e, 332 - 0xfd070e98, 333 - 0x2ebb00ef, 334 - 0x003ebb00, 335 - 0x800235b6, 336 - 0xf601d300, 337 - 0x04bd0003, 338 - 0xb60825b6, 339 - 0x20b60635, 340 - 0x0130b601, 341 - 0xb60824b6, 342 - 0x2fb20834, 343 - 0x0002687e, 344 - 0xbb002fbb, 345 - 0x0080003f, 346 - 0x03f60201, 347 - 0xbd04bd00, 348 - 0x1f29f024, 349 - 0x02300080, 350 - 0xbd0002f6, 351 - /* 0x0445: main */ 352 - 0x0031f404, 353 - 0x0d0028f4, 354 - 0x00377e24, 355 - 0xf401f400, 356 - 0xf404e4b0, 357 - 0x81fe1d18, 358 - 0xbd060201, 359 - 0x0412fd20, 360 - 0xfd01e4b6, 361 - 0x18fe051e, 362 - 0x05187e00, 363 - 0xd40ef400, 364 - /* 0x0474: main_not_ctx_xfer */ 365 - 0xf010ef94, 366 - 0xf87e01f5, 367 - 0x0ef40002, 368 - /* 0x0481: ih */ 369 - 0xfe80f9c7, 370 - 0x80f90188, 371 - 0xa0f990f9, 372 - 0xd0f9b0f9, 373 - 0xf0f9e0f9, 374 - 0x004a04bd, 375 - 0x00aacf02, 376 - 0xf404abc4, 377 - 0x240d1f0b, 378 - 0xcf1a004e, 379 - 0x004f00ee, 380 - 0x00ffcf19, 381 - 0x0000047e, 382 - 0x0040010e, 383 - 0x000ef61d, 384 - /* 0x04be: ih_no_fifo */ 385 - 0x004004bd, 386 - 0x000af601, 387 - 0xf0fc04bd, 388 - 0xd0fce0fc, 389 - 0xa0fcb0fc, 390 - 0x80fc90fc, 391 - 0xfc0088fe, 392 - 0x0032f480, 393 - /* 0x04de: hub_barrier_done */ 394 - 0x010f01f8, 395 - 0xbb040e98, 396 - 0xffb204fe, 397 - 0x4094188e, 398 - 0x00008f7e, 399 - /* 0x04f2: ctx_redswitch */ 400 - 0x200f00f8, 298 + 0x01e5f050, 299 + 0x34bd24bd, 300 + /* 0x0386: init_unk_loop */ 301 + 0x657e44bd, 302 + 0xf6b00000, 303 + 0x0e0bf400, 304 + 0xf2bb010f, 305 + 0x054ffd04, 306 + /* 0x039b: init_unk_next */ 307 + 0xb60130b6, 308 + 0xe0b60120, 309 + 0x0126b004, 310 + /* 0x03a7: init_unk_done */ 311 + 0xb5e21bf4, 312 + 0x04b50703, 313 + 0x01008208, 314 + 0x0022cf02, 315 + 0x259534bd, 316 + 0xc0008008, 317 + 0x0005f601, 318 + 0x008004bd, 319 + 0x05f601c1, 320 + 0x9804bd00, 321 + 0x0f98000e, 322 + 0x01207e01, 323 + 0x002fbb00, 324 + 0x98003fbb, 325 + 0x0f98010e, 326 + 0x01207e02, 327 + 0x050e9800, 328 + 0xbb00effd, 329 + 0x3ebb002e, 330 + 0x020e9800, 331 + 0x7e030f98, 332 + 0x98000120, 333 + 0xeffd070e, 334 + 0x002ebb00, 335 + 0xb6003ebb, 336 + 0x00800235, 337 + 0x03f601d3, 338 + 0xb604bd00, 339 + 0x35b60825, 340 + 0x0120b606, 341 + 0xb60130b6, 342 + 0x34b60824, 343 + 0x7e2fb208, 344 + 0xbb000268, 345 + 0x3fbb002f, 346 + 0x01008000, 347 + 0x0003f602, 348 + 0x24bd04bd, 349 + 0x801f29f0, 350 + 0xf6023000, 351 + 0x04bd0002, 352 + /* 0x0448: main */ 353 + 0xf40031f4, 354 + 0x240d0028, 355 + 0x0000377e, 356 + 0xb0f401f4, 357 + 0x18f404e4, 358 + 0x0181fe1d, 359 + 0x20bd0602, 360 + 0xb60412fd, 361 + 0x1efd01e4, 362 + 0x0018fe05, 363 + 0x00051b7e, 364 + /* 0x0477: main_not_ctx_xfer */ 365 + 0x94d40ef4, 366 + 0xf5f010ef, 367 + 0x02f87e01, 368 + 0xc70ef400, 369 + /* 0x0484: ih */ 370 + 0x88fe80f9, 371 + 0xf980f901, 372 + 0xf9a0f990, 373 + 0xf9d0f9b0, 374 + 0xbdf0f9e0, 375 + 0x02004a04, 376 + 0xc400aacf, 377 + 0x0bf404ab, 378 + 0x4e240d1f, 379 + 0xeecf1a00, 380 + 0x19004f00, 381 + 0x7e00ffcf, 382 + 0x0e000004, 383 + 0x1d004001, 384 + 0xbd000ef6, 385 + /* 0x04c1: ih_no_fifo */ 386 + 0x01004004, 387 + 0xbd000af6, 388 + 0xfcf0fc04, 389 + 0xfcd0fce0, 390 + 0xfca0fcb0, 391 + 0xfe80fc90, 392 + 0x80fc0088, 393 + 0xf80032f4, 394 + /* 0x04e1: hub_barrier_done */ 395 + 0x98010f01, 396 + 0xfebb040e, 397 + 0x8effb204, 398 + 0x7e409418, 399 + 0xf800008f, 400 + /* 0x04f5: ctx_redswitch */ 401 + 0x80200f00, 402 + 0xf6018500, 403 + 0x04bd000f, 404 + /* 0x0502: ctx_redswitch_delay */ 405 + 0xe2b6080e, 406 + 0xfd1bf401, 407 + 0x0800f5f1, 408 + 0x0200f5f1, 401 409 0x01850080, 402 410 0xbd000ff6, 403 - /* 0x04ff: ctx_redswitch_delay */ 404 - 0xb6080e04, 405 - 0x1bf401e2, 406 - 0x00f5f1fd, 407 - 0x00f5f108, 408 - 0x85008002, 409 - 0x000ff601, 410 - 0x00f804bd, 411 - /* 0x0518: ctx_xfer */ 412 - 0x02810080, 413 - 0xbd000ff6, 414 - 0x0711f404, 415 - 0x0004f27e, 416 - /* 0x0528: ctx_xfer_not_load */ 417 - 0x0002167e, 418 - 0xfc8024bd, 419 - 0x02f60247, 420 - 0xf004bd00, 421 - 0x20b6012c, 422 - 0x4afc8003, 411 + /* 0x051b: ctx_xfer */ 412 + 0x8000f804, 413 + 0xf6028100, 414 + 0x04bd000f, 415 + 0x7e0711f4, 416 + /* 0x052b: ctx_xfer_not_load */ 417 + 0x7e0004f5, 418 + 0xbd000216, 419 + 0x47fc8024, 423 420 0x0002f602, 424 - 0xacf004bd, 425 - 0x02a5f001, 426 - 0x5000008b, 427 - 0xb6040c98, 428 - 0xbcbb0fc4, 429 - 0x000c9800, 430 - 0x0e010d98, 431 - 0x013d7e00, 432 - 0x01acf000, 433 - 0x5040008b, 434 - 0xb6040c98, 435 - 0xbcbb0fc4, 436 - 0x010c9800, 437 - 0x98020d98, 438 - 0x004e060f, 439 - 0x013d7e08, 440 - 0x01acf000, 441 - 0x8b04a5f0, 442 - 0x98503000, 421 + 0x2cf004bd, 422 + 0x0320b601, 423 + 0x024afc80, 424 + 0xbd0002f6, 425 + 0x01acf004, 426 + 0x8b02a5f0, 427 + 0x98500000, 443 428 0xc4b6040c, 444 429 0x00bcbb0f, 445 - 0x98020c98, 446 - 0x0f98030d, 447 - 0x02004e08, 430 + 0x98000c98, 431 + 0x000e010d, 448 432 0x00013d7e, 449 - 0x00020a7e, 450 - 0xf40601f4, 451 - /* 0x05b2: ctx_xfer_post */ 452 - 0x277e0712, 453 - /* 0x05b6: ctx_xfer_done */ 454 - 0xde7e0002, 455 - 0x00f80004, 456 - 0x00000000, 433 + 0x8b01acf0, 434 + 0x98504000, 435 + 0xc4b6040c, 436 + 0x00bcbb0f, 437 + 0x98010c98, 438 + 0x0f98020d, 439 + 0x08004e06, 440 + 0x00013d7e, 441 + 0xf001acf0, 442 + 0x008b04a5, 443 + 0x0c985030, 444 + 0x0fc4b604, 445 + 0x9800bcbb, 446 + 0x0d98020c, 447 + 0x080f9803, 448 + 0x7e02004e, 449 + 0x7e00013d, 450 + 0xf400020a, 451 + 0x12f40601, 452 + /* 0x05b5: ctx_xfer_post */ 453 + 0x02277e07, 454 + /* 0x05b9: ctx_xfer_done */ 455 + 0x04e17e00, 456 + 0x0000f800, 457 457 0x00000000, 458 458 0x00000000, 459 459 0x00000000,
+239 -239
drivers/gpu/drm/nouveau/nvkm/engine/gr/fuc/gpcgm107.fuc5.h
··· 289 289 0x020014fe, 290 290 0x12004002, 291 291 0xbd0002f6, 292 - 0x05b04104, 292 + 0x05b34104, 293 293 0x400010fe, 294 294 0x00f60700, 295 295 0x0204bd00, ··· 308 308 0xc900800f, 309 309 0x0002f601, 310 310 0x308e04bd, 311 - 0x24bd500c, 312 - 0x44bd34bd, 313 - /* 0x03b0: init_unk_loop */ 314 - 0x0000657e, 315 - 0xf400f6b0, 316 - 0x010f0e0b, 317 - 0xfd04f2bb, 318 - 0x30b6054f, 319 - /* 0x03c5: init_unk_next */ 320 - 0x0120b601, 321 - 0xb004e0b6, 322 - 0x1bf40226, 323 - /* 0x03d1: init_unk_done */ 324 - 0x0703b5e2, 325 - 0x820804b5, 326 - 0xcf020100, 327 - 0x34bd0022, 328 - 0x80082595, 329 - 0xf601c000, 311 + 0xe5f0500c, 312 + 0xbd24bd01, 313 + /* 0x03b3: init_unk_loop */ 314 + 0x7e44bd34, 315 + 0xb0000065, 316 + 0x0bf400f6, 317 + 0xbb010f0e, 318 + 0x4ffd04f2, 319 + 0x0130b605, 320 + /* 0x03c8: init_unk_next */ 321 + 0xb60120b6, 322 + 0x26b004e0, 323 + 0xe21bf402, 324 + /* 0x03d4: init_unk_done */ 325 + 0xb50703b5, 326 + 0x00820804, 327 + 0x22cf0201, 328 + 0x9534bd00, 329 + 0x00800825, 330 + 0x05f601c0, 331 + 0x8004bd00, 332 + 0xf601c100, 330 333 0x04bd0005, 331 - 0x01c10080, 332 - 0xbd0005f6, 333 - 0x000e9804, 334 - 0x7e010f98, 335 - 0xbb000120, 336 - 0x3fbb002f, 337 - 0x010e9800, 338 - 0x7e020f98, 339 - 0x98000120, 340 - 0xeffd050e, 341 - 0x002ebb00, 342 - 0x98003ebb, 343 - 0x0f98020e, 344 - 0x01207e03, 345 - 0x070e9800, 346 - 0xbb00effd, 347 - 0x3ebb002e, 348 - 0x0235b600, 349 - 0x01d30080, 350 - 0xbd0003f6, 351 - 0x0825b604, 352 - 0xb60635b6, 353 - 0x30b60120, 354 - 0x0824b601, 355 - 0xb20834b6, 356 - 0x02687e2f, 357 - 0x002fbb00, 358 - 0x0f003fbb, 359 - 0x8effb23f, 360 - 0xf0501d60, 361 - 0x8f7e01e5, 362 - 0x0c0f0000, 363 - 0xa88effb2, 364 - 0xe5f0501d, 365 - 0x008f7e01, 366 - 0x03147e00, 367 - 0xb23f0f00, 368 - 0x1d608eff, 369 - 0x01e5f050, 370 - 0x00008f7e, 371 - 0xffb2000f, 372 - 0x501d9c8e, 373 - 0x7e01e5f0, 374 - 0x0f00008f, 375 - 0x03147e01, 376 - 0x8effb200, 334 + 0x98000e98, 335 + 0x207e010f, 336 + 0x2fbb0001, 337 + 0x003fbb00, 338 + 0x98010e98, 339 + 0x207e020f, 340 + 0x0e980001, 341 + 0x00effd05, 342 + 0xbb002ebb, 343 + 0x0e98003e, 344 + 0x030f9802, 345 + 0x0001207e, 346 + 0xfd070e98, 347 + 0x2ebb00ef, 348 + 0x003ebb00, 349 + 0x800235b6, 350 + 0xf601d300, 351 + 0x04bd0003, 352 + 0xb60825b6, 353 + 0x20b60635, 354 + 0x0130b601, 355 + 0xb60824b6, 356 + 0x2fb20834, 357 + 0x0002687e, 358 + 0xbb002fbb, 359 + 0x3f0f003f, 360 + 0x501d608e, 361 + 0xb201e5f0, 362 + 0x008f7eff, 363 + 0x8e0c0f00, 377 364 0xf0501da8, 378 - 0x8f7e01e5, 379 - 0xff0f0000, 380 - 0x988effb2, 381 - 0xe5f0501d, 382 - 0x008f7e01, 383 - 0xb2020f00, 384 - 0x1da88eff, 385 - 0x01e5f050, 365 + 0xffb201e5, 386 366 0x00008f7e, 387 367 0x0003147e, 388 - 0x85050498, 389 - 0x98504000, 390 - 0x64b60406, 391 - 0x0056bb0f, 392 - /* 0x04e0: tpc_strand_init_tpc_loop */ 393 - 0x05705eb8, 394 - 0x00657e00, 395 - 0xbdf6b200, 396 - /* 0x04ed: tpc_strand_init_idx_loop */ 397 - 0x605eb874, 398 - 0x7fb20005, 399 - 0x00008f7e, 400 - 0x05885eb8, 401 - 0x082f9500, 402 - 0x00008f7e, 403 - 0x058c5eb8, 404 - 0x082f9500, 405 - 0x00008f7e, 406 - 0x05905eb8, 407 - 0x00657e00, 408 - 0x06f5b600, 409 - 0xb601f0b6, 410 - 0x2fbb08f4, 411 - 0x003fbb00, 412 - 0xb60170b6, 413 - 0x1bf40162, 414 - 0x0050b7bf, 415 - 0x0142b608, 416 - 0x0fa81bf4, 417 - 0x8effb23f, 418 - 0xf0501d60, 419 - 0x8f7e01e5, 420 - 0x0d0f0000, 421 - 0xa88effb2, 368 + 0x608e3f0f, 422 369 0xe5f0501d, 423 - 0x008f7e01, 424 - 0x03147e00, 425 - 0x01008000, 426 - 0x0003f602, 427 - 0x24bd04bd, 428 - 0x801f29f0, 429 - 0xf6023000, 430 - 0x04bd0002, 431 - /* 0x0574: main */ 432 - 0xf40031f4, 433 - 0x240d0028, 434 - 0x0000377e, 435 - 0xb0f401f4, 436 - 0x18f404e4, 437 - 0x0181fe1d, 438 - 0x20bd0602, 439 - 0xb60412fd, 440 - 0x1efd01e4, 441 - 0x0018fe05, 442 - 0x0006477e, 443 - /* 0x05a3: main_not_ctx_xfer */ 444 - 0x94d40ef4, 445 - 0xf5f010ef, 446 - 0x02f87e01, 447 - 0xc70ef400, 448 - /* 0x05b0: ih */ 449 - 0x88fe80f9, 450 - 0xf980f901, 451 - 0xf9a0f990, 452 - 0xf9d0f9b0, 453 - 0xbdf0f9e0, 454 - 0x02004a04, 455 - 0xc400aacf, 456 - 0x0bf404ab, 457 - 0x4e240d1f, 458 - 0xeecf1a00, 459 - 0x19004f00, 460 - 0x7e00ffcf, 461 - 0x0e000004, 462 - 0x1d004001, 463 - 0xbd000ef6, 464 - /* 0x05ed: ih_no_fifo */ 465 - 0x01004004, 466 - 0xbd000af6, 467 - 0xfcf0fc04, 468 - 0xfcd0fce0, 469 - 0xfca0fcb0, 470 - 0xfe80fc90, 471 - 0x80fc0088, 472 - 0xf80032f4, 473 - /* 0x060d: hub_barrier_done */ 474 - 0x98010f01, 475 - 0xfebb040e, 476 - 0x8effb204, 477 - 0x7e409418, 478 - 0xf800008f, 479 - /* 0x0621: ctx_redswitch */ 480 - 0x80200f00, 370 + 0x7effb201, 371 + 0x0f00008f, 372 + 0x1d9c8e00, 373 + 0x01e5f050, 374 + 0x8f7effb2, 375 + 0x010f0000, 376 + 0x0003147e, 377 + 0x501da88e, 378 + 0xb201e5f0, 379 + 0x008f7eff, 380 + 0x8eff0f00, 381 + 0xf0501d98, 382 + 0xffb201e5, 383 + 0x00008f7e, 384 + 0xa88e020f, 385 + 0xe5f0501d, 386 + 0x7effb201, 387 + 0x7e00008f, 388 + 0x98000314, 389 + 0x00850504, 390 + 0x06985040, 391 + 0x0f64b604, 392 + /* 0x04e3: tpc_strand_init_tpc_loop */ 393 + 0xb80056bb, 394 + 0x0005705e, 395 + 0x0000657e, 396 + 0x74bdf6b2, 397 + /* 0x04f0: tpc_strand_init_idx_loop */ 398 + 0x05605eb8, 399 + 0x7e7fb200, 400 + 0xb800008f, 401 + 0x0005885e, 402 + 0x7e082f95, 403 + 0xb800008f, 404 + 0x00058c5e, 405 + 0x7e082f95, 406 + 0xb800008f, 407 + 0x0005905e, 408 + 0x0000657e, 409 + 0xb606f5b6, 410 + 0xf4b601f0, 411 + 0x002fbb08, 412 + 0xb6003fbb, 413 + 0x62b60170, 414 + 0xbf1bf401, 415 + 0x080050b7, 416 + 0xf40142b6, 417 + 0x3f0fa81b, 418 + 0x501d608e, 419 + 0xb201e5f0, 420 + 0x008f7eff, 421 + 0x8e0d0f00, 422 + 0xf0501da8, 423 + 0xffb201e5, 424 + 0x00008f7e, 425 + 0x0003147e, 426 + 0x02010080, 427 + 0xbd0003f6, 428 + 0xf024bd04, 429 + 0x00801f29, 430 + 0x02f60230, 431 + /* 0x0577: main */ 432 + 0xf404bd00, 433 + 0x28f40031, 434 + 0x7e240d00, 435 + 0xf4000037, 436 + 0xe4b0f401, 437 + 0x1d18f404, 438 + 0x020181fe, 439 + 0xfd20bd06, 440 + 0xe4b60412, 441 + 0x051efd01, 442 + 0x7e0018fe, 443 + 0xf400064a, 444 + /* 0x05a6: main_not_ctx_xfer */ 445 + 0xef94d40e, 446 + 0x01f5f010, 447 + 0x0002f87e, 448 + /* 0x05b3: ih */ 449 + 0xf9c70ef4, 450 + 0x0188fe80, 451 + 0x90f980f9, 452 + 0xb0f9a0f9, 453 + 0xe0f9d0f9, 454 + 0x04bdf0f9, 455 + 0xcf02004a, 456 + 0xabc400aa, 457 + 0x1f0bf404, 458 + 0x004e240d, 459 + 0x00eecf1a, 460 + 0xcf19004f, 461 + 0x047e00ff, 462 + 0x010e0000, 463 + 0xf61d0040, 464 + 0x04bd000e, 465 + /* 0x05f0: ih_no_fifo */ 466 + 0xf6010040, 467 + 0x04bd000a, 468 + 0xe0fcf0fc, 469 + 0xb0fcd0fc, 470 + 0x90fca0fc, 471 + 0x88fe80fc, 472 + 0xf480fc00, 473 + 0x01f80032, 474 + /* 0x0610: hub_barrier_done */ 475 + 0x0e98010f, 476 + 0x04febb04, 477 + 0x188effb2, 478 + 0x8f7e4094, 479 + 0x00f80000, 480 + /* 0x0624: ctx_redswitch */ 481 + 0x0080200f, 482 + 0x0ff60185, 483 + 0x0e04bd00, 484 + /* 0x0631: ctx_redswitch_delay */ 485 + 0x01e2b608, 486 + 0xf1fd1bf4, 487 + 0xf10800f5, 488 + 0x800200f5, 481 489 0xf6018500, 482 490 0x04bd000f, 483 - /* 0x062e: ctx_redswitch_delay */ 484 - 0xe2b6080e, 485 - 0xfd1bf401, 486 - 0x0800f5f1, 487 - 0x0200f5f1, 488 - 0x01850080, 489 - 0xbd000ff6, 490 - /* 0x0647: ctx_xfer */ 491 - 0x8000f804, 492 - 0xf6028100, 493 - 0x04bd000f, 494 - 0xc48effb2, 495 - 0xe5f0501d, 496 - 0x008f7e01, 497 - 0x0711f400, 498 - 0x0006217e, 499 - /* 0x0664: ctx_xfer_not_load */ 500 - 0x0002167e, 501 - 0xfc8024bd, 502 - 0x02f60247, 503 - 0xf004bd00, 504 - 0x20b6012c, 505 - 0x4afc8003, 491 + /* 0x064a: ctx_xfer */ 492 + 0x008000f8, 493 + 0x0ff60281, 494 + 0x8e04bd00, 495 + 0xf0501dc4, 496 + 0xffb201e5, 497 + 0x00008f7e, 498 + 0x7e0711f4, 499 + /* 0x0667: ctx_xfer_not_load */ 500 + 0x7e000624, 501 + 0xbd000216, 502 + 0x47fc8024, 506 503 0x0002f602, 507 - 0x0c0f04bd, 508 - 0xa88effb2, 504 + 0x2cf004bd, 505 + 0x0320b601, 506 + 0x024afc80, 507 + 0xbd0002f6, 508 + 0x8e0c0f04, 509 + 0xf0501da8, 510 + 0xffb201e5, 511 + 0x00008f7e, 512 + 0x0003147e, 513 + 0x608e3f0f, 509 514 0xe5f0501d, 510 - 0x008f7e01, 511 - 0x03147e00, 512 - 0xb23f0f00, 513 - 0x1d608eff, 514 - 0x01e5f050, 515 - 0x00008f7e, 516 - 0xffb2000f, 517 - 0x501d9c8e, 518 - 0x7e01e5f0, 515 + 0x7effb201, 519 516 0x0f00008f, 520 - 0x03147e01, 521 - 0x01fcf000, 522 - 0xb203f0b6, 523 - 0x1da88eff, 517 + 0x1d9c8e00, 524 518 0x01e5f050, 525 - 0x00008f7e, 526 - 0xf001acf0, 527 - 0x008b02a5, 528 - 0x0c985000, 529 - 0x0fc4b604, 530 - 0x9800bcbb, 531 - 0x0d98000c, 532 - 0x7e000e01, 533 - 0xf000013d, 534 - 0x008b01ac, 535 - 0x0c985040, 536 - 0x0fc4b604, 537 - 0x9800bcbb, 538 - 0x0d98010c, 539 - 0x060f9802, 540 - 0x7e08004e, 541 - 0xf000013d, 519 + 0x8f7effb2, 520 + 0x010f0000, 521 + 0x0003147e, 522 + 0xb601fcf0, 523 + 0xa88e03f0, 524 + 0xe5f0501d, 525 + 0x7effb201, 526 + 0xf000008f, 542 527 0xa5f001ac, 543 - 0x30008b04, 528 + 0x00008b02, 544 529 0x040c9850, 545 530 0xbb0fc4b6, 546 531 0x0c9800bc, 547 - 0x030d9802, 548 - 0x4e080f98, 549 - 0x3d7e0200, 550 - 0x0a7e0001, 551 - 0x147e0002, 552 - 0x01f40003, 553 - 0x1a12f406, 554 - /* 0x073c: ctx_xfer_post */ 555 - 0x0002277e, 556 - 0xffb20d0f, 557 - 0x501da88e, 558 - 0x7e01e5f0, 559 - 0x7e00008f, 560 - /* 0x0753: ctx_xfer_done */ 561 - 0x7e000314, 562 - 0xf800060d, 563 - 0x00000000, 532 + 0x010d9800, 533 + 0x3d7e000e, 534 + 0xacf00001, 535 + 0x40008b01, 536 + 0x040c9850, 537 + 0xbb0fc4b6, 538 + 0x0c9800bc, 539 + 0x020d9801, 540 + 0x4e060f98, 541 + 0x3d7e0800, 542 + 0xacf00001, 543 + 0x04a5f001, 544 + 0x5030008b, 545 + 0xb6040c98, 546 + 0xbcbb0fc4, 547 + 0x020c9800, 548 + 0x98030d98, 549 + 0x004e080f, 550 + 0x013d7e02, 551 + 0x020a7e00, 552 + 0x03147e00, 553 + 0x0601f400, 554 + /* 0x073f: ctx_xfer_post */ 555 + 0x7e1a12f4, 556 + 0x0f000227, 557 + 0x1da88e0d, 558 + 0x01e5f050, 559 + 0x8f7effb2, 560 + 0x147e0000, 561 + /* 0x0756: ctx_xfer_done */ 562 + 0x107e0003, 563 + 0x00f80006, 564 564 0x00000000, 565 565 0x00000000, 566 566 0x00000000,
+4 -2
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c
··· 143 143 static int 144 144 gf100_fermi_mthd_zbc_color(struct nvkm_object *object, void *data, u32 size) 145 145 { 146 - struct gf100_gr *gr = (void *)object->engine; 146 + struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); 147 147 union { 148 148 struct fermi_a_zbc_color_v0 v0; 149 149 } *args = data; ··· 189 189 static int 190 190 gf100_fermi_mthd_zbc_depth(struct nvkm_object *object, void *data, u32 size) 191 191 { 192 - struct gf100_gr *gr = (void *)object->engine; 192 + struct gf100_gr *gr = gf100_gr(nvkm_gr(object->engine)); 193 193 union { 194 194 struct fermi_a_zbc_depth_v0 v0; 195 195 } *args = data; ··· 1530 1530 gr->ppc_nr[i] = gr->func->ppc_nr; 1531 1531 for (j = 0; j < gr->ppc_nr[i]; j++) { 1532 1532 u8 mask = nvkm_rd32(device, GPC_UNIT(i, 0x0c30 + (j * 4))); 1533 + if (mask) 1534 + gr->ppc_mask[i] |= (1 << j); 1533 1535 gr->ppc_tpc_nr[i][j] = hweight8(mask); 1534 1536 } 1535 1537 }
+1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.h
··· 97 97 u8 tpc_nr[GPC_MAX]; 98 98 u8 tpc_total; 99 99 u8 ppc_nr[GPC_MAX]; 100 + u8 ppc_mask[GPC_MAX]; 100 101 u8 ppc_tpc_nr[GPC_MAX][4]; 101 102 102 103 struct nvkm_memory *unk4188b4;
+5
drivers/gpu/drm/nouveau/nvkm/subdev/instmem/base.c
··· 97 97 nvkm_instobj_dtor(struct nvkm_memory *memory) 98 98 { 99 99 struct nvkm_instobj *iobj = nvkm_instobj(memory); 100 + spin_lock(&iobj->imem->lock); 100 101 list_del(&iobj->head); 102 + spin_unlock(&iobj->imem->lock); 101 103 nvkm_memory_del(&iobj->parent); 102 104 return iobj; 103 105 } ··· 192 190 nvkm_memory_ctor(&nvkm_instobj_func_slow, &iobj->memory); 193 191 iobj->parent = memory; 194 192 iobj->imem = imem; 193 + spin_lock(&iobj->imem->lock); 195 194 list_add_tail(&iobj->head, &imem->list); 195 + spin_unlock(&iobj->imem->lock); 196 196 memory = &iobj->memory; 197 197 } 198 198 ··· 313 309 { 314 310 nvkm_subdev_ctor(&nvkm_instmem, device, index, 0, &imem->subdev); 315 311 imem->func = func; 312 + spin_lock_init(&imem->lock); 316 313 INIT_LIST_HEAD(&imem->list); 317 314 }
+1 -1
drivers/gpu/drm/nouveau/nvkm/subdev/volt/gk104.c
··· 59 59 duty = (uv - bios->base) * div / bios->pwm_range; 60 60 61 61 nvkm_wr32(device, 0x20340, div); 62 - nvkm_wr32(device, 0x20344, 0x8000000 | duty); 62 + nvkm_wr32(device, 0x20344, 0x80000000 | duty); 63 63 64 64 return 0; 65 65 }
+1 -1
drivers/gpu/drm/radeon/rv730_dpm.c
··· 464 464 result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); 465 465 466 466 if (result != PPSMC_Result_OK) 467 - DRM_ERROR("Could not force DPM to low\n"); 467 + DRM_DEBUG("Could not force DPM to low\n"); 468 468 469 469 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); 470 470
+2 -2
drivers/gpu/drm/radeon/rv770_dpm.c
··· 193 193 result = rv770_send_msg_to_smc(rdev, PPSMC_MSG_TwoLevelsDisabled); 194 194 195 195 if (result != PPSMC_Result_OK) 196 - DRM_ERROR("Could not force DPM to low.\n"); 196 + DRM_DEBUG("Could not force DPM to low.\n"); 197 197 198 198 WREG32_P(GENERAL_PWRMGT, 0, ~GLOBAL_PWRMGT_EN); 199 199 ··· 1418 1418 int rv770_set_sw_state(struct radeon_device *rdev) 1419 1419 { 1420 1420 if (rv770_send_msg_to_smc(rdev, PPSMC_MSG_SwitchToSwState) != PPSMC_Result_OK) 1421 - return -EINVAL; 1421 + DRM_DEBUG("rv770_set_sw_state failed\n"); 1422 1422 return 0; 1423 1423 } 1424 1424