Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Arnd Bergmann says:
"Another set of arm-soc bug fixes on top of v3.3-rc5. The few larger
bits are all for devices that still need to get set up in board code.
Only three platforms are in this set of fixes: omap2+, pxa and lpc32xx."
* tag 'fixes-3.3-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits)
ARM: LPC32xx: serial.c: Fixed loop limit
ARM: LPC32xx: serial.c: HW bug workaround
ARM: LPC32xx: irq.c: Clear latched event
ARM: LPC32xx: Fix interrupt controller init
ARM: LPC32xx: Fix irq on GPI_28
ARM: OMAP2: fix mailbox init code
ARM: OMAP2+: gpmc-smsc911x: add required smsc911x regulators
ARM: OMAP1: Fix out-of-bounds array access for Innovator
OMAP3 EVM: remove out-of-bounds array access of gpio_leds
ARM: OMAP: Fix build error when mmc_omap is built as module
ARM: OMAP: Fix kernel panic with HSMMC when twl4030_gpio is a module
pxa/hx4700: add platform device and I2C info for AK4641 codec
arch/arm/mach-pxa/: included linux/gpio.h twice
arch/arm/mach-mmp/: some files include some headers twice
ARM: pxa: fix error handling in pxa2xx_drv_pcmcia_probe
ARM: pxa: fix including linux/gpio.h twice
ARM: pxa: fix mixed declarations and code in sharpsl_pm
ARM: pxa: fix wrong parsing gpio event on spitz
ARM: OMAP2+: usb-host: fix compile warning
ARM: OMAP4: Move the barrier memboclk_steal() as part of reserve callback
...
+181
-49
+1
-1
arch/arm/mach-lpc32xx/include/mach/irqs.h
+1
-1
arch/arm/mach-lpc32xx/include/mach/irqs.h
···
61
61
*/
62
62
#define IRQ_LPC32XX_JTAG_COMM_TX LPC32XX_SIC1_IRQ(1)
63
63
#define IRQ_LPC32XX_JTAG_COMM_RX LPC32XX_SIC1_IRQ(2)
64
-
#define IRQ_LPC32XX_GPI_11 LPC32XX_SIC1_IRQ(4)
64
+
#define IRQ_LPC32XX_GPI_28 LPC32XX_SIC1_IRQ(4)
65
65
#define IRQ_LPC32XX_TS_P LPC32XX_SIC1_IRQ(6)
66
66
#define IRQ_LPC32XX_TS_IRQ LPC32XX_SIC1_IRQ(7)
67
67
#define IRQ_LPC32XX_TS_AUX LPC32XX_SIC1_IRQ(8)
+20
-5
arch/arm/mach-lpc32xx/irq.c
+20
-5
arch/arm/mach-lpc32xx/irq.c
···
118
118
.event_group = &lpc32xx_event_pin_regs,
119
119
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_06_BIT,
120
120
},
121
+
[IRQ_LPC32XX_GPI_28] = {
122
+
.event_group = &lpc32xx_event_pin_regs,
123
+
.mask = LPC32XX_CLKPWR_EXTSRC_GPI_28_BIT,
124
+
},
121
125
[IRQ_LPC32XX_GPIO_00] = {
122
126
.event_group = &lpc32xx_event_int_regs,
123
127
.mask = LPC32XX_CLKPWR_INTSRC_GPIO_00_BIT,
···
309
305
310
306
if (state)
311
307
eventreg |= lpc32xx_events[d->irq].mask;
312
-
else
308
+
else {
313
309
eventreg &= ~lpc32xx_events[d->irq].mask;
310
+
311
+
/*
312
+
* When disabling the wakeup, clear the latched
313
+
* event
314
+
*/
315
+
__raw_writel(lpc32xx_events[d->irq].mask,
316
+
lpc32xx_events[d->irq].
317
+
event_group->rawstat_reg);
318
+
}
314
319
315
320
__raw_writel(eventreg,
316
321
lpc32xx_events[d->irq].event_group->enab_reg);
···
393
380
394
381
/* Setup SIC1 */
395
382
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE));
396
-
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
397
-
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
383
+
__raw_writel(SIC1_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC1_BASE));
384
+
__raw_writel(SIC1_ATR_DEFAULT,
385
+
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC1_BASE));
398
386
399
387
/* Setup SIC2 */
400
388
__raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE));
401
-
__raw_writel(MIC_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
402
-
__raw_writel(MIC_ATR_DEFAULT, LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
389
+
__raw_writel(SIC2_APR_DEFAULT, LPC32XX_INTC_POLAR(LPC32XX_SIC2_BASE));
390
+
__raw_writel(SIC2_ATR_DEFAULT,
391
+
LPC32XX_INTC_ACT_TYPE(LPC32XX_SIC2_BASE));
403
392
404
393
/* Configure supported IRQ's */
405
394
for (i = 0; i < NR_IRQS; i++) {
+19
-1
arch/arm/mach-lpc32xx/serial.c
+19
-1
arch/arm/mach-lpc32xx/serial.c
···
88
88
char *uart_ck_name;
89
89
u32 ck_mode_mask;
90
90
void __iomem *pdiv_clk_reg;
91
+
resource_size_t mapbase;
91
92
};
92
93
93
94
static struct uartinit uartinit_data[] __initdata = {
···
98
97
.ck_mode_mask =
99
98
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 5),
100
99
.pdiv_clk_reg = LPC32XX_CLKPWR_UART5_CLK_CTRL,
100
+
.mapbase = LPC32XX_UART5_BASE,
101
101
},
102
102
#endif
103
103
#ifdef CONFIG_ARCH_LPC32XX_UART3_SELECT
···
107
105
.ck_mode_mask =
108
106
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 3),
109
107
.pdiv_clk_reg = LPC32XX_CLKPWR_UART3_CLK_CTRL,
108
+
.mapbase = LPC32XX_UART3_BASE,
110
109
},
111
110
#endif
112
111
#ifdef CONFIG_ARCH_LPC32XX_UART4_SELECT
···
116
113
.ck_mode_mask =
117
114
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 4),
118
115
.pdiv_clk_reg = LPC32XX_CLKPWR_UART4_CLK_CTRL,
116
+
.mapbase = LPC32XX_UART4_BASE,
119
117
},
120
118
#endif
121
119
#ifdef CONFIG_ARCH_LPC32XX_UART6_SELECT
···
125
121
.ck_mode_mask =
126
122
LPC32XX_UART_CLKMODE_LOAD(LPC32XX_UART_CLKMODE_ON, 6),
127
123
.pdiv_clk_reg = LPC32XX_CLKPWR_UART6_CLK_CTRL,
124
+
.mapbase = LPC32XX_UART6_BASE,
128
125
},
129
126
#endif
130
127
};
···
170
165
171
166
/* pre-UART clock divider set to 1 */
172
167
__raw_writel(0x0101, uartinit_data[i].pdiv_clk_reg);
168
+
169
+
/*
170
+
* Force a flush of the RX FIFOs to work around a
171
+
* HW bug
172
+
*/
173
+
puart = uartinit_data[i].mapbase;
174
+
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
175
+
__raw_writel(0x00, LPC32XX_UART_DLL_FIFO(puart));
176
+
j = LPC32XX_SUART_FIFO_SIZE;
177
+
while (j--)
178
+
tmp = __raw_readl(
179
+
LPC32XX_UART_DLL_FIFO(puart));
180
+
__raw_writel(0, LPC32XX_UART_IIR_FCR(puart));
173
181
}
174
182
175
183
/* This needs to be done after all UART clocks are setup */
176
184
__raw_writel(clkmodes, LPC32XX_UARTCTL_CLKMODE);
177
-
for (i = 0; i < ARRAY_SIZE(uartinit_data) - 1; i++) {
185
+
for (i = 0; i < ARRAY_SIZE(uartinit_data); i++) {
178
186
/* Force a flush of the RX FIFOs to work around a HW bug */
179
187
puart = serial_std_platform_data[i].mapbase;
180
188
__raw_writel(0xC1, LPC32XX_UART_IIR_FCR(puart));
-1
arch/arm/mach-mmp/aspenite.c
-1
arch/arm/mach-mmp/aspenite.c
-1
arch/arm/mach-mmp/pxa168.c
-1
arch/arm/mach-mmp/pxa168.c
-1
arch/arm/mach-mmp/tavorevb.c
-1
arch/arm/mach-mmp/tavorevb.c
+2
-2
arch/arm/mach-omap1/board-innovator.c
+2
-2
arch/arm/mach-omap1/board-innovator.c
···
416
416
#ifdef CONFIG_ARCH_OMAP15XX
417
417
if (cpu_is_omap1510()) {
418
418
omap1_usb_init(&innovator1510_usb_config);
419
-
innovator_config[1].data = &innovator1510_lcd_config;
419
+
innovator_config[0].data = &innovator1510_lcd_config;
420
420
}
421
421
#endif
422
422
#ifdef CONFIG_ARCH_OMAP16XX
423
423
if (cpu_is_omap1610()) {
424
424
omap1_usb_init(&h2_usb_config);
425
-
innovator_config[1].data = &innovator1610_lcd_config;
425
+
innovator_config[0].data = &innovator1610_lcd_config;
426
426
}
427
427
#endif
428
428
omap_board_config = innovator_config;
+2
-2
arch/arm/mach-omap2/Kconfig
+2
-2
arch/arm/mach-omap2/Kconfig
···
364
364
going on could result in system crashes;
365
365
366
366
config OMAP4_ERRATA_I688
367
-
bool "OMAP4 errata: Async Bridge Corruption (BROKEN)"
368
-
depends on ARCH_OMAP4 && BROKEN
367
+
bool "OMAP4 errata: Async Bridge Corruption"
368
+
depends on ARCH_OMAP4
369
369
select ARCH_HAS_BARRIERS
370
370
help
371
371
If a data is stalled inside asynchronous bridge because of back
+4
arch/arm/mach-omap2/board-n8x0.c
+4
arch/arm/mach-omap2/board-n8x0.c
+1
-1
arch/arm/mach-omap2/board-omap3evm.c
+1
-1
arch/arm/mach-omap2/board-omap3evm.c
···
381
381
gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "EN_DVI");
382
382
383
383
/* TWL4030_GPIO_MAX + 1 == ledB (out, active low LED) */
384
-
gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
384
+
gpio_leds[0].gpio = gpio + TWL4030_GPIO_MAX + 1;
385
385
386
386
platform_device_register(&leds_gpio);
387
387
+1
arch/arm/mach-omap2/common.h
+1
arch/arm/mach-omap2/common.h
+2
-3
arch/arm/mach-omap2/cpuidle44xx.c
+2
-3
arch/arm/mach-omap2/cpuidle44xx.c
···
65
65
struct timespec ts_preidle, ts_postidle, ts_idle;
66
66
u32 cpu1_state;
67
67
int idle_time;
68
-
int new_state_idx;
69
68
int cpu_id = smp_processor_id();
70
69
71
70
/* Used to keep track of the total time in idle */
···
83
84
*/
84
85
cpu1_state = pwrdm_read_pwrst(cpu1_pd);
85
86
if (cpu1_state != PWRDM_POWER_OFF) {
86
-
new_state_idx = drv->safe_state_index;
87
-
cx = cpuidle_get_statedata(&dev->states_usage[new_state_idx]);
87
+
index = drv->safe_state_index;
88
+
cx = cpuidle_get_statedata(&dev->states_usage[index]);
88
89
}
89
90
90
91
if (index > 0)
+52
arch/arm/mach-omap2/gpmc-smsc911x.c
+52
arch/arm/mach-omap2/gpmc-smsc911x.c
···
19
19
#include <linux/interrupt.h>
20
20
#include <linux/io.h>
21
21
#include <linux/smsc911x.h>
22
+
#include <linux/regulator/fixed.h>
23
+
#include <linux/regulator/machine.h>
22
24
23
25
#include <plat/board.h>
24
26
#include <plat/gpmc.h>
···
44
42
.flags = SMSC911X_USE_16BIT,
45
43
};
46
44
45
+
static struct regulator_consumer_supply gpmc_smsc911x_supply[] = {
46
+
REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
47
+
REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
48
+
};
49
+
50
+
/* Generic regulator definition to satisfy smsc911x */
51
+
static struct regulator_init_data gpmc_smsc911x_reg_init_data = {
52
+
.constraints = {
53
+
.min_uV = 3300000,
54
+
.max_uV = 3300000,
55
+
.valid_modes_mask = REGULATOR_MODE_NORMAL
56
+
| REGULATOR_MODE_STANDBY,
57
+
.valid_ops_mask = REGULATOR_CHANGE_MODE
58
+
| REGULATOR_CHANGE_STATUS,
59
+
},
60
+
.num_consumer_supplies = ARRAY_SIZE(gpmc_smsc911x_supply),
61
+
.consumer_supplies = gpmc_smsc911x_supply,
62
+
};
63
+
64
+
static struct fixed_voltage_config gpmc_smsc911x_fixed_reg_data = {
65
+
.supply_name = "gpmc_smsc911x",
66
+
.microvolts = 3300000,
67
+
.gpio = -EINVAL,
68
+
.startup_delay = 0,
69
+
.enable_high = 0,
70
+
.enabled_at_boot = 1,
71
+
.init_data = &gpmc_smsc911x_reg_init_data,
72
+
};
73
+
74
+
/*
75
+
* Platform device id of 42 is a temporary fix to avoid conflicts
76
+
* with other reg-fixed-voltage devices. The real fix should
77
+
* involve the driver core providing a way of dynamically
78
+
* assigning a unique id on registration for platform devices
79
+
* in the same name space.
80
+
*/
81
+
static struct platform_device gpmc_smsc911x_regulator = {
82
+
.name = "reg-fixed-voltage",
83
+
.id = 42,
84
+
.dev = {
85
+
.platform_data = &gpmc_smsc911x_fixed_reg_data,
86
+
},
87
+
};
88
+
47
89
/*
48
90
* Initialize smsc911x device connected to the GPMC. Note that we
49
91
* assume that pin multiplexing is done in the board-*.c file,
···
100
54
int ret;
101
55
102
56
gpmc_cfg = board_data;
57
+
58
+
ret = platform_device_register(&gpmc_smsc911x_regulator);
59
+
if (ret < 0) {
60
+
pr_err("Unable to register smsc911x regulators: %d\n", ret);
61
+
return;
62
+
}
103
63
104
64
if (gpmc_cs_request(gpmc_cfg->cs, SZ_16M, &cs_mem_base) < 0) {
105
65
pr_err("Failed to request GPMC mem region\n");
+6
arch/arm/mach-omap2/hsmmc.c
+6
arch/arm/mach-omap2/hsmmc.c
···
428
428
return 0;
429
429
}
430
430
431
+
static int omap_hsmmc_done;
431
432
#define MAX_OMAP_MMC_HWMOD_NAME_LEN 16
432
433
433
434
void omap_init_hsmmc(struct omap2_hsmmc_info *hsmmcinfo, int ctrl_nr)
···
491
490
void omap2_hsmmc_init(struct omap2_hsmmc_info *controllers)
492
491
{
493
492
u32 reg;
493
+
494
+
if (omap_hsmmc_done)
495
+
return;
496
+
497
+
omap_hsmmc_done = 1;
494
498
495
499
if (!cpu_is_omap44xx()) {
496
500
if (cpu_is_omap2430()) {
+1
arch/arm/mach-omap2/io.c
+1
arch/arm/mach-omap2/io.c
+9
-1
arch/arm/mach-omap2/mailbox.c
+9
-1
arch/arm/mach-omap2/mailbox.c
···
281
281
.ops = &omap2_mbox_ops,
282
282
.priv = &omap2_mbox_iva_priv,
283
283
};
284
+
#endif
284
285
285
-
struct omap_mbox *omap2_mboxes[] = { &mbox_dsp_info, &mbox_iva_info, NULL };
286
+
#ifdef CONFIG_ARCH_OMAP2
287
+
struct omap_mbox *omap2_mboxes[] = {
288
+
&mbox_dsp_info,
289
+
#ifdef CONFIG_SOC_OMAP2420
290
+
&mbox_iva_info,
291
+
#endif
292
+
NULL
293
+
};
286
294
#endif
287
295
288
296
#if defined(CONFIG_ARCH_OMAP4)
+1
-1
arch/arm/mach-omap2/mux.c
+1
-1
arch/arm/mach-omap2/mux.c
+16
-9
arch/arm/mach-omap2/omap4-common.c
+16
-9
arch/arm/mach-omap2/omap4-common.c
···
24
24
25
25
#include <plat/irqs.h>
26
26
#include <plat/sram.h>
27
+
#include <plat/omap-secure.h>
27
28
28
29
#include <mach/hardware.h>
29
30
#include <mach/omap-wakeupgen.h>
···
44
43
45
44
void __iomem *dram_sync, *sram_sync;
46
45
46
+
static phys_addr_t paddr;
47
+
static u32 size;
48
+
47
49
void omap_bus_sync(void)
48
50
{
49
51
if (dram_sync && sram_sync) {
···
56
52
}
57
53
}
58
54
59
-
static int __init omap_barriers_init(void)
55
+
/* Steal one page physical memory for barrier implementation */
56
+
int __init omap_barrier_reserve_memblock(void)
60
57
{
61
-
struct map_desc dram_io_desc[1];
62
-
phys_addr_t paddr;
63
-
u32 size;
64
-
65
-
if (!cpu_is_omap44xx())
66
-
return -ENODEV;
67
58
68
59
size = ALIGN(PAGE_SIZE, SZ_1M);
69
60
paddr = arm_memblock_steal(size, SZ_1M);
61
+
62
+
return 0;
63
+
}
64
+
65
+
void __init omap_barriers_init(void)
66
+
{
67
+
struct map_desc dram_io_desc[1];
70
68
71
69
dram_io_desc[0].virtual = OMAP4_DRAM_BARRIER_VA;
72
70
dram_io_desc[0].pfn = __phys_to_pfn(paddr);
···
81
75
pr_info("OMAP4: Map 0x%08llx to 0x%08lx for dram barrier\n",
82
76
(long long) paddr, dram_io_desc[0].virtual);
83
77
84
-
return 0;
85
78
}
86
-
core_initcall(omap_barriers_init);
79
+
#else
80
+
void __init omap_barriers_init(void)
81
+
{}
87
82
#endif
88
83
89
84
void __init gic_init_irq(void)
+3
arch/arm/mach-omap2/pm.c
+3
arch/arm/mach-omap2/pm.c
···
174
174
freq = clk->rate;
175
175
clk_put(clk);
176
176
177
+
rcu_read_lock();
177
178
opp = opp_find_freq_ceil(dev, &freq);
178
179
if (IS_ERR(opp)) {
180
+
rcu_read_unlock();
179
181
pr_err("%s: unable to find boot up OPP for vdd_%s\n",
180
182
__func__, vdd_name);
181
183
goto exit;
182
184
}
183
185
184
186
bootup_volt = opp_get_voltage(opp);
187
+
rcu_read_unlock();
185
188
if (!bootup_volt) {
186
189
pr_err("%s: unable to find voltage corresponding "
187
190
"to the bootup OPP for vdd_%s\n", __func__, vdd_name);
+3
-3
arch/arm/mach-omap2/usb-host.c
+3
-3
arch/arm/mach-omap2/usb-host.c
···
486
486
void __init usbhs_init(const struct usbhs_omap_board_data *pdata)
487
487
{
488
488
struct omap_hwmod *oh[2];
489
-
struct omap_device *od;
489
+
struct platform_device *pdev;
490
490
int bus_id = -1;
491
491
int i;
492
492
···
522
522
return;
523
523
}
524
524
525
-
od = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
525
+
pdev = omap_device_build_ss(OMAP_USBHS_DEVICE, bus_id, oh, 2,
526
526
(void *)&usbhs_data, sizeof(usbhs_data),
527
527
omap_uhhtll_latency,
528
528
ARRAY_SIZE(omap_uhhtll_latency), false);
529
-
if (IS_ERR(od)) {
529
+
if (IS_ERR(pdev)) {
530
530
pr_err("Could not build hwmod devices %s,%s\n",
531
531
USBHS_UHH_HWMODNAME, USBHS_TLL_HWMODNAME);
532
532
return;
+25
arch/arm/mach-pxa/hx4700.c
+25
arch/arm/mach-pxa/hx4700.c
···
45
45
#include <mach/hx4700.h>
46
46
#include <mach/irda.h>
47
47
48
+
#include <sound/ak4641.h>
48
49
#include <video/platform_lcd.h>
49
50
#include <video/w100fb.h>
50
51
···
766
765
};
767
766
768
767
/*
768
+
* Asahi Kasei AK4641 on I2C
769
+
*/
770
+
771
+
static struct ak4641_platform_data ak4641_info = {
772
+
.gpio_power = GPIO27_HX4700_CODEC_ON,
773
+
.gpio_npdn = GPIO109_HX4700_CODEC_nPDN,
774
+
};
775
+
776
+
static struct i2c_board_info i2c_board_info[] __initdata = {
777
+
{
778
+
I2C_BOARD_INFO("ak4641", 0x12),
779
+
.platform_data = &ak4641_info,
780
+
},
781
+
};
782
+
783
+
static struct platform_device audio = {
784
+
.name = "hx4700-audio",
785
+
.id = -1,
786
+
};
787
+
788
+
789
+
/*
769
790
* PCMCIA
770
791
*/
771
792
···
813
790
&gpio_vbus,
814
791
&power_supply,
815
792
&strataflash,
793
+
&audio,
816
794
&pcmcia,
817
795
};
818
796
···
851
827
pxa_set_ficp_info(&ficp_info);
852
828
pxa27x_set_i2c_power_info(NULL);
853
829
pxa_set_i2c_info(NULL);
830
+
i2c_register_board_info(0, ARRAY_AND_SIZE(i2c_board_info));
854
831
i2c_register_board_info(1, ARRAY_AND_SIZE(pi2c_board_info));
855
832
pxa2xx_set_spi_info(2, &pxa_ssp2_master_info);
856
833
spi_register_board_info(ARRAY_AND_SIZE(tsc2046_board_info));
-1
arch/arm/mach-pxa/pxa25x.c
-1
arch/arm/mach-pxa/pxa25x.c
-1
arch/arm/mach-pxa/pxa27x.c
-1
arch/arm/mach-pxa/pxa27x.c
-1
arch/arm/mach-pxa/saarb.c
-1
arch/arm/mach-pxa/saarb.c
+1
-2
arch/arm/mach-pxa/sharpsl_pm.c
+1
-2
arch/arm/mach-pxa/sharpsl_pm.c
···
168
168
#define MAXCTRL_SEL_SH 4
169
169
#define MAXCTRL_STR (1u << 7)
170
170
171
+
extern int max1111_read_channel(int);
171
172
/*
172
173
* Read MAX1111 ADC
173
174
*/
···
177
176
/* Ugly, better move this function into another module */
178
177
if (machine_is_tosa())
179
178
return 0;
180
-
181
-
extern int max1111_read_channel(int);
182
179
183
180
/* max1111 accepts channels from 0-3, however,
184
181
* it is encoded from 0-7 here in the code.
+2
-3
arch/arm/mach-pxa/spitz_pm.c
+2
-3
arch/arm/mach-pxa/spitz_pm.c
···
172
172
static unsigned long spitz_charger_wakeup(void)
173
173
{
174
174
unsigned long ret;
175
-
ret = (!gpio_get_value(SPITZ_GPIO_KEY_INT)
175
+
ret = ((!gpio_get_value(SPITZ_GPIO_KEY_INT)
176
176
<< GPIO_bit(SPITZ_GPIO_KEY_INT))
177
-
| (!gpio_get_value(SPITZ_GPIO_SYNC)
178
-
<< GPIO_bit(SPITZ_GPIO_SYNC));
177
+
| gpio_get_value(SPITZ_GPIO_SYNC));
179
178
return ret;
180
179
}
181
180
+1
arch/arm/plat-omap/common.c
+1
arch/arm/plat-omap/common.c
+6
arch/arm/plat-omap/include/plat/omap-secure.h
+6
arch/arm/plat-omap/include/plat/omap-secure.h
+3
-9
drivers/pcmcia/pxa2xx_base.c
+3
-9
drivers/pcmcia/pxa2xx_base.c
···
328
328
goto err1;
329
329
}
330
330
331
-
if (ret) {
332
-
while (--i >= 0)
333
-
soc_pcmcia_remove_one(&sinfo->skt[i]);
334
-
kfree(sinfo);
335
-
clk_put(clk);
336
-
} else {
337
-
pxa2xx_configure_sockets(&dev->dev);
338
-
dev_set_drvdata(&dev->dev, sinfo);
339
-
}
331
+
pxa2xx_configure_sockets(&dev->dev);
332
+
dev_set_drvdata(&dev->dev, sinfo);
340
333
341
334
return 0;
342
335
343
336
err1:
344
337
while (--i >= 0)
345
338
soc_pcmcia_remove_one(&sinfo->skt[i]);
339
+
clk_put(clk);
346
340
kfree(sinfo);
347
341
err0:
348
342
return ret;