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git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
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dt-bindings: cache: Add docs for StarFive Starlink cache controller
Add DT binding documentation used by StarFive's
Starlink cache controller.
Signed-off-by: Joshua Yeong <joshua.yeong@starfivetech.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
authored by
Joshua Yeong
and committed by
Conor Dooley
c6005d4d
1613e604
+66
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Documentation/devicetree/bindings/cache/starfive,jh8100-starlink-cache.yaml
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Documentation/devicetree/bindings/cache/starfive,jh8100-starlink-cache.yaml
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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/cache/starfive,jh8100-starlink-cache.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: StarFive StarLink Cache Controller
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maintainers:
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- Joshua Yeong <joshua.yeong@starfivetech.com>
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description:
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StarFive's StarLink Cache Controller manages the L3 cache shared between
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clusters of CPU cores. The cache driver enables RISC-V non-standard cache
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management as an alternative to instructions in the RISC-V Zicbom extension.
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allOf:
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- $ref: /schemas/cache-controller.yaml#
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# We need a select here so we don't match all nodes with 'cache'
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select:
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properties:
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compatible:
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contains:
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enum:
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- starfive,jh8100-starlink-cache
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required:
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- compatible
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properties:
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compatible:
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items:
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- const: starfive,jh8100-starlink-cache
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- const: cache
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reg:
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maxItems: 1
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unevaluatedProperties: false
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required:
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- compatible
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- reg
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- cache-block-size
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- cache-level
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- cache-sets
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- cache-size
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- cache-unified
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examples:
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- |
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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cache-controller@15000000 {
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compatible = "starfive,jh8100-starlink-cache", "cache";
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reg = <0x0 0x15000000 0x0 0x278>;
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cache-block-size = <64>;
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cache-level = <3>;
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cache-sets = <8192>;
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cache-size = <0x400000>;
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cache-unified;
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};
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};