tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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drm/i915/lt_phy: Add xe3plpd .get_hw_state hook

Add .get_hw_state hook to xe3plpd platform for dpll framework
and update intel_lt_phy_pll_readout_hw_state() function
accordingly to support dpll framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-14-mika.kahola@intel.com

Mika Kahola c62ba60b 37115f77

+21 -8
+1 -1
drivers/gpu/drm/i915/display/intel_ddi.c
··· 4248 4248 { 4249 4249 struct intel_display *display = to_intel_display(encoder); 4250 4250 4251 - intel_lt_phy_pll_readout_hw_state(encoder, crtc_state, &crtc_state->dpll_hw_state.ltpll); 4251 + intel_lt_phy_pll_readout_hw_state(encoder, &crtc_state->dpll_hw_state.ltpll); 4252 4252 4253 4253 if (crtc_state->dpll_hw_state.ltpll.tbt_mode) 4254 4254 crtc_state->port_clock = intel_mtl_tbt_calc_port_clock(encoder);
+13
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
··· 4571 4571 .compare_hw_state = mtl_compare_hw_state, 4572 4572 }; 4573 4573 4574 + static bool xe3plpd_pll_get_hw_state(struct intel_display *display, 4575 + struct intel_dpll *pll, 4576 + struct intel_dpll_hw_state *dpll_hw_state) 4577 + { 4578 + struct intel_encoder *encoder = get_intel_encoder(display, pll); 4579 + 4580 + if (!encoder) 4581 + return false; 4582 + 4583 + return intel_lt_phy_pll_readout_hw_state(encoder, &dpll_hw_state->ltpll); 4584 + } 4585 + 4574 4586 static const struct intel_dpll_funcs xe3plpd_pll_funcs = { 4587 + .get_hw_state = xe3plpd_pll_get_hw_state, 4575 4588 }; 4576 4589 4577 4590 static const struct dpll_info xe3plpd_plls[] = {
+6 -5
drivers/gpu/drm/i915/display/intel_lt_phy.c
··· 2213 2213 XELPDP_LANE_PCLK_PLL_ACK(0); 2214 2214 } 2215 2215 2216 - void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 2217 - const struct intel_crtc_state *crtc_state, 2216 + bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 2218 2217 struct intel_lt_phy_pll_state *pll_state) 2219 2218 { 2220 2219 u8 owned_lane_mask; ··· 2222 2223 int i, j, k; 2223 2224 2224 2225 if (!intel_lt_phy_pll_is_enabled(encoder)) 2225 - return; 2226 + return false; 2226 2227 2227 2228 pll_state->tbt_mode = intel_tc_port_in_tbt_alt_mode(enc_to_dig_port(encoder)); 2228 2229 if (pll_state->tbt_mode) 2229 - return; 2230 + return false; 2230 2231 2231 2232 owned_lane_mask = intel_lt_phy_get_owned_lane_mask(encoder); 2232 2233 lane = owned_lane_mask & INTEL_LT_PHY_LANE0 ? : INTEL_LT_PHY_LANE1; ··· 2244 2245 } 2245 2246 2246 2247 intel_lt_phy_transaction_end(encoder, wakeref); 2248 + 2249 + return true; 2247 2250 } 2248 2251 2249 2252 void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, ··· 2271 2270 return; 2272 2271 2273 2272 encoder = intel_get_crtc_new_encoder(state, new_crtc_state); 2274 - intel_lt_phy_pll_readout_hw_state(encoder, new_crtc_state, &pll_hw_state); 2273 + intel_lt_phy_pll_readout_hw_state(encoder, &pll_hw_state); 2275 2274 2276 2275 dig_port = enc_to_dig_port(encoder); 2277 2276 if (intel_tc_port_in_tbt_alt_mode(dig_port))
+1 -2
drivers/gpu/drm/i915/display/intel_lt_phy.h
··· 32 32 bool 33 33 intel_lt_phy_pll_compare_hw_state(const struct intel_lt_phy_pll_state *a, 34 34 const struct intel_lt_phy_pll_state *b); 35 - void intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 36 - const struct intel_crtc_state *crtc_state, 35 + bool intel_lt_phy_pll_readout_hw_state(struct intel_encoder *encoder, 37 36 struct intel_lt_phy_pll_state *pll_state); 38 37 void intel_lt_phy_pll_state_verify(struct intel_atomic_state *state, 39 38 struct intel_crtc *crtc);