Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC fixes from Arnd Bergmann:
"There is a small backlog of at91 patches here, the most significant is
the addition of some sama5d2 Xplained nodes that were waiting on an
MFD include file to get merged through another tree.
We normally try to sort those out before the merge window opens, but
the maintainer wasn't aware of that here and I decided to merge the
changes this time as an exception.
On OMAP a series of audio changes for dra7 missed the merge window but
turned out to be necessary to fix a boot time imprecise external abort
error and to get audio working.
The other changes are the usual simple changes, here is a list sorted
by platform:
at91:
removal of a useless defconfig option
removal of some legacy DT pieces
use of the proper watchdog compatible string
update of the MAINTAINERS entries for some Atmel drivers
drivers/scpi:
hide get_scpi_ops in module from built-in code
imx:
add missing .irq_set_type for i.MX GPC irq_chip.
fix the wrong spi-num-chipselects settings for Vybrid DSPI devices.
fix a merge error in Vybrid dts regarding to ADC device property
keystone:
fix the optional PDSP firmware loading
fix linking RAM setup for QMs
fix crash with clk_ignore_unused
mediatek:
Enable SCPSYS power domain driver by default
mvebu:
fix QNAP TS219 power-off in dts
fix legacy get_irqnr_and_base for dove and orion5x
omap:
fix l4 related boot time errors for dm81xx
use lockless cldm/pwrdm api in omap4_boot_secondary
remove t410 abort handler to avoid hiding other critical errors
mark cpuidle tracepoints as _rcuidle
fix module alias for omap-ocp2scp
pxa:
palm: Fix typos in PWM lookup table code
renesas:
missing __initconst annotation for r8a7793_boards_compat_dt
rockchip:
disable mmc-tuning on the veyron-minnie board
adding the init state for the over-temperature-protection
zx:
only build power domain code when CONFIG_PM=y"
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (31 commits)
ARM: OMAP4+: SMP: use lockless clkdm/pwrdm api in omap4_boot_secondary
arm: omap2+: add missing HWMOD_NO_IDLEST in 81xx hwmod data
ARM: orion5x: Fix legacy get_irqnr_and_base
ARM: dove: Fix legacy get_irqnr_and_base
soc: Mediatek: Enable SCPSYS power domain driver by default
ARM: dts: vfxxx: Fix dspi[01] spi-num-chipselects.
ARM: dts: keystone: k2l: fix kernel crash when clk_ignore_unused is not in bootargs
soc: ti: knav_qmss_queue: Fix linking RAM setup for queue managers
soc: ti: use request_firmware_direct() as acc firmware is optional
ARM: imx: add platform irq type setting in gpc
ARM: dts: vfxxx: Fix erroneous property in esdhc0 node
ARM: shmobile: r8a7793: proper constness with __initconst
scpi: hide get_scpi_ops in module from built-in code
ARM: zx: only build power domain code when CONFIG_PM=y
ARM: pxa: palm: Fix typos in PWM lookup table code
ARM: dts: Kirkwood: Fix QNAP TS219 power-off
ARM: dts: rockchip: Add OTP gpio pinctrl to rk3288 tsadc node
ARM: dts: rockchip: temporarily remove emmc hs200 speed from rk3288 minnie
MAINTAINERS: Atmel drivers: change NAND and ISI entries
ARM: at91/dt: sama5d2 Xplained: add several devices
...
+280
-254
-18
Documentation/arm/keystone/Overview.txt
-18
Documentation/arm/keystone/Overview.txt
···
49
49
The device tree documentation for the keystone machines are located at
50
50
Documentation/devicetree/bindings/arm/keystone/keystone.txt
51
51
52
-
Known issues & workaround
53
-
-------------------------
54
-
55
-
Some of the device drivers used on keystone are re-used from that from
56
-
DaVinci and other TI SoCs. These device drivers may use clock APIs directly.
57
-
Some of the keystone specific drivers such as netcp uses run time power
58
-
management API instead to enable clock. As this API has limitations on
59
-
keystone, following workaround is needed to boot Linux.
60
-
61
-
Add 'clk_ignore_unused' to the bootargs env variable in u-boot. Otherwise
62
-
clock frameworks will try to disable clocks that are unused and disable
63
-
the hardware. This is because netcp related power domain and clock
64
-
domains are enabled in u-boot as run time power management API currently
65
-
doesn't enable clocks for netcp due to a limitation. This workaround is
66
-
expected to be removed in the future when proper API support becomes
67
-
available. Until then, this work around is needed.
68
-
69
-
70
52
Document Author
71
53
---------------
72
54
Murali Karicheri <m-karicheri2@ti.com>
+3
-2
MAINTAINERS
+3
-2
MAINTAINERS
···
1931
1931
F: drivers/i2c/busses/i2c-at91.c
1932
1932
1933
1933
ATMEL ISI DRIVER
1934
-
M: Josh Wu <josh.wu@atmel.com>
1934
+
M: Ludovic Desroches <ludovic.desroches@atmel.com>
1935
1935
L: linux-media@vger.kernel.org
1936
1936
S: Supported
1937
1937
F: drivers/media/platform/soc_camera/atmel-isi.c
···
1950
1950
F: drivers/net/ethernet/cadence/
1951
1951
1952
1952
ATMEL NAND DRIVER
1953
-
M: Josh Wu <josh.wu@atmel.com>
1953
+
M: Wenyou Yang <wenyou.yang@atmel.com>
1954
+
M: Josh Wu <rainyfeeling@outlook.com>
1954
1955
L: linux-mtd@lists.infradead.org
1955
1956
S: Supported
1956
1957
F: drivers/mtd/nand/atmel_nand*
+3
-3
arch/arm/boot/dts/animeo_ip.dts
+3
-3
arch/arm/boot/dts/animeo_ip.dts
···
155
155
label = "keyswitch_in";
156
156
gpios = <&pioB 1 GPIO_ACTIVE_HIGH>;
157
157
linux,code = <28>;
158
-
gpio-key,wakeup;
158
+
wakeup-source;
159
159
};
160
160
161
161
error_in {
162
162
label = "error_in";
163
163
gpios = <&pioB 2 GPIO_ACTIVE_HIGH>;
164
164
linux,code = <29>;
165
-
gpio-key,wakeup;
165
+
wakeup-source;
166
166
};
167
167
168
168
btn {
169
169
label = "btn";
170
170
gpios = <&pioC 23 GPIO_ACTIVE_HIGH>;
171
171
linux,code = <31>;
172
-
gpio-key,wakeup;
172
+
wakeup-source;
173
173
};
174
174
};
175
175
};
+1
-1
arch/arm/boot/dts/at91-foxg20.dts
+1
-1
arch/arm/boot/dts/at91-foxg20.dts
+2
-11
arch/arm/boot/dts/at91-kizbox.dts
+2
-11
arch/arm/boot/dts/at91-kizbox.dts
···
24
24
};
25
25
26
26
clocks {
27
-
#address-cells = <1>;
28
-
#size-cells = <1>;
29
-
ranges;
30
-
31
-
main_clock: clock@0 {
32
-
compatible = "atmel,osc", "fixed-clock";
33
-
clock-frequency = <18432000>;
34
-
};
35
-
36
27
main_xtal {
37
28
clock-frequency = <18432000>;
38
29
};
···
85
94
label = "PB_RST";
86
95
gpios = <&pioB 30 GPIO_ACTIVE_HIGH>;
87
96
linux,code = <0x100>;
88
-
gpio-key,wakeup;
97
+
wakeup-source;
89
98
};
90
99
91
100
user {
92
101
label = "PB_USER";
93
102
gpios = <&pioB 31 GPIO_ACTIVE_HIGH>;
94
103
linux,code = <0x101>;
95
-
gpio-key,wakeup;
104
+
wakeup-source;
96
105
};
97
106
};
98
107
+3
-3
arch/arm/boot/dts/at91-kizbox2.dts
+3
-3
arch/arm/boot/dts/at91-kizbox2.dts
···
171
171
label = "PB_PROG";
172
172
gpios = <&pioE 27 GPIO_ACTIVE_LOW>;
173
173
linux,code = <0x102>;
174
-
gpio-key,wakeup;
174
+
wakeup-source;
175
175
};
176
176
177
177
reset {
178
178
label = "PB_RST";
179
179
gpios = <&pioE 29 GPIO_ACTIVE_LOW>;
180
180
linux,code = <0x100>;
181
-
gpio-key,wakeup;
181
+
wakeup-source;
182
182
};
183
183
184
184
user {
185
185
label = "PB_USER";
186
186
gpios = <&pioE 31 GPIO_ACTIVE_HIGH>;
187
187
linux,code = <0x101>;
188
-
gpio-key,wakeup;
188
+
wakeup-source;
189
189
};
190
190
};
191
191
+2
-2
arch/arm/boot/dts/at91-kizboxmini.dts
+2
-2
arch/arm/boot/dts/at91-kizboxmini.dts
···
98
98
label = "PB_PROG";
99
99
gpios = <&pioC 17 GPIO_ACTIVE_LOW>;
100
100
linux,code = <0x102>;
101
-
gpio-key,wakeup;
101
+
wakeup-source;
102
102
};
103
103
104
104
reset {
105
105
label = "PB_RST";
106
106
gpios = <&pioC 16 GPIO_ACTIVE_LOW>;
107
107
linux,code = <0x100>;
108
-
gpio-key,wakeup;
108
+
wakeup-source;
109
109
};
110
110
};
111
111
+1
-1
arch/arm/boot/dts/at91-qil_a9260.dts
+1
-1
arch/arm/boot/dts/at91-qil_a9260.dts
+106
-9
arch/arm/boot/dts/at91-sama5d2_xplained.dts
+106
-9
arch/arm/boot/dts/at91-sama5d2_xplained.dts
···
45
45
/dts-v1/;
46
46
#include "sama5d2.dtsi"
47
47
#include "sama5d2-pinfunc.h"
48
+
#include <dt-bindings/mfd/atmel-flexcom.h>
48
49
49
50
/ {
50
51
model = "Atmel SAMA5D2 Xplained";
···
60
59
};
61
60
62
61
clocks {
63
-
#address-cells = <1>;
64
-
#size-cells = <1>;
65
-
ranges;
66
-
67
-
main_clock: clock@0 {
68
-
compatible = "atmel,osc", "fixed-clock";
69
-
clock-frequency = <12000000>;
70
-
};
71
-
72
62
slow_xtal {
73
63
clock-frequency = <32768>;
74
64
};
···
81
89
82
90
usb2: ehci@00500000 {
83
91
status = "okay";
92
+
};
93
+
94
+
sdmmc0: sdio-host@a0000000 {
95
+
bus-width = <8>;
96
+
pinctrl-names = "default";
97
+
pinctrl-0 = <&pinctrl_sdmmc0_default>;
98
+
non-removable;
99
+
mmc-ddr-1_8v;
100
+
status = "okay";
101
+
};
102
+
103
+
sdmmc1: sdio-host@b0000000 {
104
+
bus-width = <4>;
105
+
pinctrl-names = "default";
106
+
pinctrl-0 = <&pinctrl_sdmmc1_default>;
107
+
status = "okay"; /* conflict with qspi0 */
84
108
};
85
109
86
110
apb {
···
189
181
};
190
182
};
191
183
184
+
flx0: flexcom@f8034000 {
185
+
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
186
+
status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
187
+
188
+
uart5: serial@200 {
189
+
compatible = "atmel,at91sam9260-usart";
190
+
reg = <0x200 0x200>;
191
+
interrupts = <19 IRQ_TYPE_LEVEL_HIGH 7>;
192
+
clocks = <&flx0_clk>;
193
+
clock-names = "usart";
194
+
pinctrl-names = "default";
195
+
pinctrl-0 = <&pinctrl_flx0_default>;
196
+
atmel,fifo-size = <32>;
197
+
status = "okay";
198
+
};
199
+
};
200
+
192
201
uart3: serial@fc008000 {
193
202
pinctrl-names = "default";
194
203
pinctrl-0 = <&pinctrl_uart3_default>;
195
204
status = "okay";
205
+
};
206
+
207
+
flx4: flexcom@fc018000 {
208
+
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
209
+
status = "okay";
210
+
211
+
i2c2: i2c@600 {
212
+
compatible = "atmel,sama5d2-i2c";
213
+
reg = <0x600 0x200>;
214
+
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 7>;
215
+
dmas = <0>, <0>;
216
+
dma-names = "tx", "rx";
217
+
#address-cells = <1>;
218
+
#size-cells = <0>;
219
+
clocks = <&flx4_clk>;
220
+
pinctrl-names = "default";
221
+
pinctrl-0 = <&pinctrl_flx4_default>;
222
+
atmel,fifo-size = <16>;
223
+
status = "okay";
224
+
};
196
225
};
197
226
198
227
i2c1: i2c@fc028000 {
···
246
201
};
247
202
248
203
pinctrl@fc038000 {
204
+
pinctrl_flx0_default: flx0_default {
205
+
pinmux = <PIN_PB28__FLEXCOM0_IO0>,
206
+
<PIN_PB29__FLEXCOM0_IO1>;
207
+
bias-disable;
208
+
};
209
+
210
+
pinctrl_flx4_default: flx4_default {
211
+
pinmux = <PIN_PD12__FLEXCOM4_IO0>,
212
+
<PIN_PD13__FLEXCOM4_IO1>;
213
+
bias-disable;
214
+
};
215
+
249
216
pinctrl_i2c0_default: i2c0_default {
250
217
pinmux = <PIN_PD21__TWD0>,
251
218
<PIN_PD22__TWCK0>;
···
282
225
<PIN_PB22__GMDC>,
283
226
<PIN_PB23__GMDIO>;
284
227
bias-disable;
228
+
};
229
+
230
+
pinctrl_sdmmc0_default: sdmmc0_default {
231
+
cmd_data {
232
+
pinmux = <PIN_PA1__SDMMC0_CMD>,
233
+
<PIN_PA2__SDMMC0_DAT0>,
234
+
<PIN_PA3__SDMMC0_DAT1>,
235
+
<PIN_PA4__SDMMC0_DAT2>,
236
+
<PIN_PA5__SDMMC0_DAT3>,
237
+
<PIN_PA6__SDMMC0_DAT4>,
238
+
<PIN_PA7__SDMMC0_DAT5>,
239
+
<PIN_PA8__SDMMC0_DAT6>,
240
+
<PIN_PA9__SDMMC0_DAT7>;
241
+
bias-pull-up;
242
+
};
243
+
244
+
ck_cd_rstn_vddsel {
245
+
pinmux = <PIN_PA0__SDMMC0_CK>,
246
+
<PIN_PA10__SDMMC0_RSTN>,
247
+
<PIN_PA11__SDMMC0_VDDSEL>,
248
+
<PIN_PA13__SDMMC0_CD>;
249
+
bias-disable;
250
+
};
251
+
};
252
+
253
+
pinctrl_sdmmc1_default: sdmmc1_default {
254
+
cmd_data {
255
+
pinmux = <PIN_PA28__SDMMC1_CMD>,
256
+
<PIN_PA18__SDMMC1_DAT0>,
257
+
<PIN_PA19__SDMMC1_DAT1>,
258
+
<PIN_PA20__SDMMC1_DAT2>,
259
+
<PIN_PA21__SDMMC1_DAT3>;
260
+
bias-pull-up;
261
+
};
262
+
263
+
conf-ck_cd {
264
+
pinmux = <PIN_PA22__SDMMC1_CK>,
265
+
<PIN_PA30__SDMMC1_CD>;
266
+
bias-disable;
267
+
};
285
268
};
286
269
287
270
pinctrl_spi0_default: spi0_default {
+1
-1
arch/arm/boot/dts/at91-sama5d3_xplained.dts
+1
-1
arch/arm/boot/dts/at91-sama5d3_xplained.dts
+1
-11
arch/arm/boot/dts/at91-sama5d4_xplained.dts
+1
-11
arch/arm/boot/dts/at91-sama5d4_xplained.dts
···
50
50
compatible = "atmel,sama5d4-xplained", "atmel,sama5d4", "atmel,sama5";
51
51
52
52
chosen {
53
-
bootargs = "ignore_loglevel earlyprintk";
54
53
stdout-path = "serial0:115200n8";
55
54
};
56
55
···
58
59
};
59
60
60
61
clocks {
61
-
#address-cells = <1>;
62
-
#size-cells = <1>;
63
-
ranges;
64
-
65
-
main_clock: clock@0 {
66
-
compatible = "atmel,osc", "fixed-clock";
67
-
clock-frequency = <12000000>;
68
-
};
69
-
70
62
slow_xtal {
71
63
clock-frequency = <32768>;
72
64
};
···
225
235
label = "pb_user1";
226
236
gpios = <&pioE 8 GPIO_ACTIVE_HIGH>;
227
237
linux,code = <0x100>;
228
-
gpio-key,wakeup;
238
+
wakeup-source;
229
239
};
230
240
};
231
241
+1
-11
arch/arm/boot/dts/at91-sama5d4ek.dts
+1
-11
arch/arm/boot/dts/at91-sama5d4ek.dts
···
50
50
compatible = "atmel,sama5d4ek", "atmel,sama5d4", "atmel,sama5";
51
51
52
52
chosen {
53
-
bootargs = "ignore_loglevel earlyprintk";
54
53
stdout-path = "serial0:115200n8";
55
54
};
56
55
···
58
59
};
59
60
60
61
clocks {
61
-
#address-cells = <1>;
62
-
#size-cells = <1>;
63
-
ranges;
64
-
65
-
main_clock: clock@0 {
66
-
compatible = "atmel,osc", "fixed-clock";
67
-
clock-frequency = <12000000>;
68
-
};
69
-
70
62
slow_xtal {
71
63
clock-frequency = <32768>;
72
64
};
···
294
304
label = "pb_user1";
295
305
gpios = <&pioE 13 GPIO_ACTIVE_HIGH>;
296
306
linux,code = <0x100>;
297
-
gpio-key,wakeup;
307
+
wakeup-source;
298
308
};
299
309
};
300
310
-9
arch/arm/boot/dts/at91rm9200ek.dts
-9
arch/arm/boot/dts/at91rm9200ek.dts
+5
-14
arch/arm/boot/dts/at91sam9261ek.dts
+5
-14
arch/arm/boot/dts/at91sam9261ek.dts
···
22
22
};
23
23
24
24
clocks {
25
-
#address-cells = <1>;
26
-
#size-cells = <1>;
27
-
ranges;
28
-
29
-
main_clock: clock@0 {
30
-
compatible = "atmel,osc", "fixed-clock";
31
-
clock-frequency = <18432000>;
32
-
};
33
-
34
25
slow_xtal {
35
26
clock-frequency = <32768>;
36
27
};
···
140
149
ti,debounce-tol = /bits/ 16 <65535>;
141
150
ti,debounce-max = /bits/ 16 <1>;
142
151
143
-
linux,wakeup;
152
+
wakeup-source;
144
153
};
145
154
};
146
155
···
184
193
label = "button_0";
185
194
gpios = <&pioA 27 GPIO_ACTIVE_LOW>;
186
195
linux,code = <256>;
187
-
gpio-key,wakeup;
196
+
wakeup-source;
188
197
};
189
198
190
199
button_1 {
191
200
label = "button_1";
192
201
gpios = <&pioA 26 GPIO_ACTIVE_LOW>;
193
202
linux,code = <257>;
194
-
gpio-key,wakeup;
203
+
wakeup-source;
195
204
};
196
205
197
206
button_2 {
198
207
label = "button_2";
199
208
gpios = <&pioA 25 GPIO_ACTIVE_LOW>;
200
209
linux,code = <258>;
201
-
gpio-key,wakeup;
210
+
wakeup-source;
202
211
};
203
212
204
213
button_3 {
205
214
label = "button_3";
206
215
gpios = <&pioA 24 GPIO_ACTIVE_LOW>;
207
216
linux,code = <259>;
208
-
gpio-key,wakeup;
217
+
wakeup-source;
209
218
};
210
219
};
211
220
};
+2
-11
arch/arm/boot/dts/at91sam9263ek.dts
+2
-11
arch/arm/boot/dts/at91sam9263ek.dts
···
22
22
};
23
23
24
24
clocks {
25
-
#address-cells = <1>;
26
-
#size-cells = <1>;
27
-
ranges;
28
-
29
-
main_clock: clock@0 {
30
-
compatible = "atmel,osc", "fixed-clock";
31
-
clock-frequency = <16367660>;
32
-
};
33
-
34
25
slow_xtal {
35
26
clock-frequency = <32768>;
36
27
};
···
204
213
label = "left_click";
205
214
gpios = <&pioC 5 GPIO_ACTIVE_LOW>;
206
215
linux,code = <272>;
207
-
gpio-key,wakeup;
216
+
wakeup-source;
208
217
};
209
218
210
219
right_click {
211
220
label = "right_click";
212
221
gpios = <&pioC 4 GPIO_ACTIVE_LOW>;
213
222
linux,code = <273>;
214
-
gpio-key,wakeup;
223
+
wakeup-source;
215
224
};
216
225
};
217
226
+2
-11
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
+2
-11
arch/arm/boot/dts/at91sam9g20ek_common.dtsi
···
19
19
};
20
20
21
21
clocks {
22
-
#address-cells = <1>;
23
-
#size-cells = <1>;
24
-
ranges;
25
-
26
-
main_clock: clock@0 {
27
-
compatible = "atmel,osc", "fixed-clock";
28
-
clock-frequency = <18432000>;
29
-
};
30
-
31
22
slow_xtal {
32
23
clock-frequency = <32768>;
33
24
};
···
197
206
label = "Button 3";
198
207
gpios = <&pioA 30 GPIO_ACTIVE_LOW>;
199
208
linux,code = <0x103>;
200
-
gpio-key,wakeup;
209
+
wakeup-source;
201
210
};
202
211
203
212
btn4 {
204
213
label = "Button 4";
205
214
gpios = <&pioA 31 GPIO_ACTIVE_LOW>;
206
215
linux,code = <0x104>;
207
-
gpio-key,wakeup;
216
+
wakeup-source;
208
217
};
209
218
};
210
219
+2
-11
arch/arm/boot/dts/at91sam9m10g45ek.dts
+2
-11
arch/arm/boot/dts/at91sam9m10g45ek.dts
···
24
24
};
25
25
26
26
clocks {
27
-
#address-cells = <1>;
28
-
#size-cells = <1>;
29
-
ranges;
30
-
31
-
main_clock: clock@0 {
32
-
compatible = "atmel,osc", "fixed-clock";
33
-
clock-frequency = <12000000>;
34
-
};
35
-
36
27
slow_xtal {
37
28
clock-frequency = <32768>;
38
29
};
···
314
323
label = "left_click";
315
324
gpios = <&pioB 6 GPIO_ACTIVE_LOW>;
316
325
linux,code = <272>;
317
-
gpio-key,wakeup;
326
+
wakeup-source;
318
327
};
319
328
320
329
right_click {
321
330
label = "right_click";
322
331
gpios = <&pioB 7 GPIO_ACTIVE_LOW>;
323
332
linux,code = <273>;
324
-
gpio-key,wakeup;
333
+
wakeup-source;
325
334
};
326
335
327
336
left {
+1
-10
arch/arm/boot/dts/at91sam9n12ek.dts
+1
-10
arch/arm/boot/dts/at91sam9n12ek.dts
···
23
23
};
24
24
25
25
clocks {
26
-
#address-cells = <1>;
27
-
#size-cells = <1>;
28
-
ranges;
29
-
30
-
main_clock: clock@0 {
31
-
compatible = "atmel,osc", "fixed-clock";
32
-
clock-frequency = <16000000>;
33
-
};
34
-
35
26
slow_xtal {
36
27
clock-frequency = <32768>;
37
28
};
···
210
219
label = "Enter";
211
220
gpios = <&pioB 3 GPIO_ACTIVE_LOW>;
212
221
linux,code = <28>;
213
-
gpio-key,wakeup;
222
+
wakeup-source;
214
223
};
215
224
};
216
225
+2
-11
arch/arm/boot/dts/at91sam9rlek.dts
+2
-11
arch/arm/boot/dts/at91sam9rlek.dts
···
22
22
};
23
23
24
24
clocks {
25
-
#address-cells = <1>;
26
-
#size-cells = <1>;
27
-
ranges;
28
-
29
-
main_clock: clock {
30
-
compatible = "atmel,osc", "fixed-clock";
31
-
clock-frequency = <12000000>;
32
-
};
33
-
34
25
slow_xtal {
35
26
clock-frequency = <32768>;
36
27
};
···
216
225
label = "right_click";
217
226
gpios = <&pioB 0 GPIO_ACTIVE_LOW>;
218
227
linux,code = <273>;
219
-
gpio-key,wakeup;
228
+
wakeup-source;
220
229
};
221
230
222
231
left_click {
223
232
label = "left_click";
224
233
gpios = <&pioB 1 GPIO_ACTIVE_LOW>;
225
234
linux,code = <272>;
226
-
gpio-key,wakeup;
235
+
wakeup-source;
227
236
};
228
237
};
229
238
-11
arch/arm/boot/dts/at91sam9x5cm.dtsi
-11
arch/arm/boot/dts/at91sam9x5cm.dtsi
···
13
13
};
14
14
15
15
clocks {
16
-
#address-cells = <1>;
17
-
#size-cells = <1>;
18
-
ranges;
19
-
20
-
main_clock: clock@0 {
21
-
compatible = "atmel,osc", "fixed-clock";
22
-
clock-frequency = <12000000>;
23
-
};
24
-
};
25
-
26
-
clocks {
27
16
slow_xtal {
28
17
clock-frequency = <32768>;
29
18
};
+2
-2
arch/arm/boot/dts/dra7.dtsi
+2
-2
arch/arm/boot/dts/dra7.dtsi
···
1459
1459
interrupt-names = "tx", "rx";
1460
1460
dmas = <&sdma_xbar 133>, <&sdma_xbar 132>;
1461
1461
dma-names = "tx", "rx";
1462
-
clocks = <&mcasp3_ahclkx_mux>;
1463
-
clock-names = "fck";
1462
+
clocks = <&mcasp3_aux_gfclk_mux>, <&mcasp3_ahclkx_mux>;
1463
+
clock-names = "fck", "ahclkx";
1464
1464
status = "disabled";
1465
1465
};
1466
1466
+1
-1
arch/arm/boot/dts/k2l-netcp.dtsi
+1
-1
arch/arm/boot/dts/k2l-netcp.dtsi
+1
-1
arch/arm/boot/dts/kirkwood-ts219.dtsi
+1
-1
arch/arm/boot/dts/kirkwood-ts219.dtsi
+4
arch/arm/boot/dts/rk3288-veyron-minnie.dts
+4
arch/arm/boot/dts/rk3288-veyron-minnie.dts
+8
-2
arch/arm/boot/dts/rk3288.dtsi
+8
-2
arch/arm/boot/dts/rk3288.dtsi
···
452
452
clock-names = "tsadc", "apb_pclk";
453
453
resets = <&cru SRST_TSADC>;
454
454
reset-names = "tsadc-apb";
455
-
pinctrl-names = "default";
456
-
pinctrl-0 = <&otp_out>;
455
+
pinctrl-names = "init", "default", "sleep";
456
+
pinctrl-0 = <&otp_gpio>;
457
+
pinctrl-1 = <&otp_out>;
458
+
pinctrl-2 = <&otp_gpio>;
457
459
#thermal-sensor-cells = <1>;
458
460
rockchip,hw-tshut-temp = <95000>;
459
461
status = "disabled";
···
1397
1395
};
1398
1396
1399
1397
tsadc {
1398
+
otp_gpio: otp-gpio {
1399
+
rockchip,pins = <0 10 RK_FUNC_GPIO &pcfg_pull_none>;
1400
+
};
1401
+
1400
1402
otp_out: otp-out {
1401
1403
rockchip,pins = <0 10 RK_FUNC_1 &pcfg_pull_none>;
1402
1404
};
+1
-1
arch/arm/boot/dts/sama5d35ek.dts
+1
-1
arch/arm/boot/dts/sama5d35ek.dts
+1
-1
arch/arm/boot/dts/sama5d4.dtsi
+1
-1
arch/arm/boot/dts/sama5d4.dtsi
+1
-1
arch/arm/boot/dts/usb_a9260_common.dtsi
+1
-1
arch/arm/boot/dts/usb_a9260_common.dtsi
+1
-1
arch/arm/boot/dts/usb_a9263.dts
+1
-1
arch/arm/boot/dts/usb_a9263.dts
+4
-4
arch/arm/boot/dts/vfxxx.dtsi
+4
-4
arch/arm/boot/dts/vfxxx.dtsi
···
158
158
interrupts = <67 IRQ_TYPE_LEVEL_HIGH>;
159
159
clocks = <&clks VF610_CLK_DSPI0>;
160
160
clock-names = "dspi";
161
-
spi-num-chipselects = <5>;
161
+
spi-num-chipselects = <6>;
162
162
status = "disabled";
163
163
};
164
164
···
170
170
interrupts = <68 IRQ_TYPE_LEVEL_HIGH>;
171
171
clocks = <&clks VF610_CLK_DSPI1>;
172
172
clock-names = "dspi";
173
-
spi-num-chipselects = <5>;
173
+
spi-num-chipselects = <4>;
174
174
status = "disabled";
175
175
};
176
176
···
461
461
clock-names = "adc";
462
462
#io-channel-cells = <1>;
463
463
status = "disabled";
464
+
fsl,adck-max-frequency = <30000000>, <40000000>,
465
+
<20000000>;
464
466
};
465
467
466
468
esdhc0: esdhc@400b1000 {
···
474
472
<&clks VF610_CLK_ESDHC0>;
475
473
clock-names = "ipg", "ahb", "per";
476
474
status = "disabled";
477
-
fsl,adck-max-frequency = <30000000>, <40000000>,
478
-
<20000000>;
479
475
};
480
476
481
477
esdhc1: esdhc@400b2000 {
-1
arch/arm/configs/at91_dt_defconfig
-1
arch/arm/configs/at91_dt_defconfig
-1
arch/arm/configs/sama5_defconfig
-1
arch/arm/configs/sama5_defconfig
+2
-2
arch/arm/mach-dove/include/mach/entry-macro.S
+2
-2
arch/arm/mach-dove/include/mach/entry-macro.S
···
18
18
@ check low interrupts
19
19
ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
20
20
ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
21
-
mov \irqnr, #31
21
+
mov \irqnr, #32
22
22
ands \irqstat, \irqstat, \tmp
23
23
24
24
@ if no low interrupts set, check high interrupts
25
25
ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
26
26
ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF]
27
-
moveq \irqnr, #63
27
+
moveq \irqnr, #64
28
28
andeqs \irqstat, \irqstat, \tmp
29
29
30
30
@ find first active interrupt source
+1
arch/arm/mach-imx/gpc.c
+1
arch/arm/mach-imx/gpc.c
+3
-3
arch/arm/mach-omap2/omap-smp.c
+3
-3
arch/arm/mach-omap2/omap-smp.c
···
143
143
* Ensure that CPU power state is set to ON to avoid CPU
144
144
* powerdomain transition on wfi
145
145
*/
146
-
clkdm_wakeup(cpu1_clkdm);
147
-
omap_set_pwrdm_state(cpu1_pwrdm, PWRDM_POWER_ON);
148
-
clkdm_allow_idle(cpu1_clkdm);
146
+
clkdm_wakeup_nolock(cpu1_clkdm);
147
+
pwrdm_set_next_pwrst(cpu1_pwrdm, PWRDM_POWER_ON);
148
+
clkdm_allow_idle_nolock(cpu1_clkdm);
149
149
150
150
if (IS_PM44XX_ERRATUM(PM_OMAP4_ROM_SMP_BOOT_ERRATUM_GICD)) {
151
151
while (gic_dist_disabled()) {
+36
-30
arch/arm/mach-omap2/omap_hwmod.c
+36
-30
arch/arm/mach-omap2/omap_hwmod.c
···
890
890
return ret;
891
891
}
892
892
893
+
static void _enable_optional_clocks(struct omap_hwmod *oh)
894
+
{
895
+
struct omap_hwmod_opt_clk *oc;
896
+
int i;
897
+
898
+
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
899
+
900
+
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
901
+
if (oc->_clk) {
902
+
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
903
+
__clk_get_name(oc->_clk));
904
+
clk_enable(oc->_clk);
905
+
}
906
+
}
907
+
908
+
static void _disable_optional_clocks(struct omap_hwmod *oh)
909
+
{
910
+
struct omap_hwmod_opt_clk *oc;
911
+
int i;
912
+
913
+
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
914
+
915
+
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
916
+
if (oc->_clk) {
917
+
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
918
+
__clk_get_name(oc->_clk));
919
+
clk_disable(oc->_clk);
920
+
}
921
+
}
922
+
893
923
/**
894
924
* _enable_clocks - enable hwmod main clock and interface clocks
895
925
* @oh: struct omap_hwmod *
···
946
916
if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
947
917
clk_enable(os->_clk);
948
918
}
919
+
920
+
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
921
+
_enable_optional_clocks(oh);
949
922
950
923
/* The opt clocks are controlled by the device driver. */
951
924
···
981
948
clk_disable(os->_clk);
982
949
}
983
950
951
+
if (oh->flags & HWMOD_OPT_CLKS_NEEDED)
952
+
_disable_optional_clocks(oh);
953
+
984
954
/* The opt clocks are controlled by the device driver. */
985
955
986
956
return 0;
987
-
}
988
-
989
-
static void _enable_optional_clocks(struct omap_hwmod *oh)
990
-
{
991
-
struct omap_hwmod_opt_clk *oc;
992
-
int i;
993
-
994
-
pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
995
-
996
-
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
997
-
if (oc->_clk) {
998
-
pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
999
-
__clk_get_name(oc->_clk));
1000
-
clk_enable(oc->_clk);
1001
-
}
1002
-
}
1003
-
1004
-
static void _disable_optional_clocks(struct omap_hwmod *oh)
1005
-
{
1006
-
struct omap_hwmod_opt_clk *oc;
1007
-
int i;
1008
-
1009
-
pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
1010
-
1011
-
for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
1012
-
if (oc->_clk) {
1013
-
pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
1014
-
__clk_get_name(oc->_clk));
1015
-
clk_disable(oc->_clk);
1016
-
}
1017
957
}
1018
958
1019
959
/**
+3
arch/arm/mach-omap2/omap_hwmod.h
+3
arch/arm/mach-omap2/omap_hwmod.h
···
523
523
* HWMOD_RECONFIG_IO_CHAIN: omap_hwmod code needs to reconfigure wake-up
524
524
* events by calling _reconfigure_io_chain() when a device is enabled
525
525
* or idled.
526
+
* HWMOD_OPT_CLKS_NEEDED: The optional clocks are needed for the module to
527
+
* operate and they need to be handled at the same time as the main_clk.
526
528
*/
527
529
#define HWMOD_SWSUP_SIDLE (1 << 0)
528
530
#define HWMOD_SWSUP_MSTANDBY (1 << 1)
···
540
538
#define HWMOD_FORCE_MSTANDBY (1 << 11)
541
539
#define HWMOD_SWSUP_SIDLE_ACT (1 << 12)
542
540
#define HWMOD_RECONFIG_IO_CHAIN (1 << 13)
541
+
#define HWMOD_OPT_CLKS_NEEDED (1 << 14)
543
542
544
543
/*
545
544
* omap_hwmod._int_flags definitions
+56
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+56
arch/arm/mach-omap2/omap_hwmod_7xx_data.c
···
1298
1298
};
1299
1299
1300
1300
/*
1301
+
* 'mcasp' class
1302
+
*
1303
+
*/
1304
+
static struct omap_hwmod_class_sysconfig dra7xx_mcasp_sysc = {
1305
+
.sysc_offs = 0x0004,
1306
+
.sysc_flags = SYSC_HAS_SIDLEMODE,
1307
+
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
1308
+
.sysc_fields = &omap_hwmod_sysc_type3,
1309
+
};
1310
+
1311
+
static struct omap_hwmod_class dra7xx_mcasp_hwmod_class = {
1312
+
.name = "mcasp",
1313
+
.sysc = &dra7xx_mcasp_sysc,
1314
+
};
1315
+
1316
+
/* mcasp3 */
1317
+
static struct omap_hwmod_opt_clk mcasp3_opt_clks[] = {
1318
+
{ .role = "ahclkx", .clk = "mcasp3_ahclkx_mux" },
1319
+
};
1320
+
1321
+
static struct omap_hwmod dra7xx_mcasp3_hwmod = {
1322
+
.name = "mcasp3",
1323
+
.class = &dra7xx_mcasp_hwmod_class,
1324
+
.clkdm_name = "l4per2_clkdm",
1325
+
.main_clk = "mcasp3_aux_gfclk_mux",
1326
+
.flags = HWMOD_OPT_CLKS_NEEDED,
1327
+
.prcm = {
1328
+
.omap4 = {
1329
+
.clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
1330
+
.context_offs = DRA7XX_RM_L4PER2_MCASP3_CONTEXT_OFFSET,
1331
+
.modulemode = MODULEMODE_SWCTRL,
1332
+
},
1333
+
},
1334
+
.opt_clks = mcasp3_opt_clks,
1335
+
.opt_clks_cnt = ARRAY_SIZE(mcasp3_opt_clks),
1336
+
};
1337
+
1338
+
/*
1301
1339
* 'mmc' class
1302
1340
*
1303
1341
*/
···
2604
2566
.user = OCP_USER_MPU | OCP_USER_SDMA,
2605
2567
};
2606
2568
2569
+
/* l4_per2 -> mcasp3 */
2570
+
static struct omap_hwmod_ocp_if dra7xx_l4_per2__mcasp3 = {
2571
+
.master = &dra7xx_l4_per2_hwmod,
2572
+
.slave = &dra7xx_mcasp3_hwmod,
2573
+
.clk = "l4_root_clk_div",
2574
+
.user = OCP_USER_MPU | OCP_USER_SDMA,
2575
+
};
2576
+
2577
+
/* l3_main_1 -> mcasp3 */
2578
+
static struct omap_hwmod_ocp_if dra7xx_l3_main_1__mcasp3 = {
2579
+
.master = &dra7xx_l3_main_1_hwmod,
2580
+
.slave = &dra7xx_mcasp3_hwmod,
2581
+
.clk = "l3_iclk_div",
2582
+
.user = OCP_USER_MPU | OCP_USER_SDMA,
2583
+
};
2584
+
2607
2585
/* l4_per1 -> elm */
2608
2586
static struct omap_hwmod_ocp_if dra7xx_l4_per1__elm = {
2609
2587
.master = &dra7xx_l4_per1_hwmod,
···
3362
3308
&dra7xx_l4_wkup__dcan1,
3363
3309
&dra7xx_l4_per2__dcan2,
3364
3310
&dra7xx_l4_per2__cpgmac0,
3311
+
&dra7xx_l4_per2__mcasp3,
3312
+
&dra7xx_l3_main_1__mcasp3,
3365
3313
&dra7xx_gmac__mdio,
3366
3314
&dra7xx_l4_cfg__dma_system,
3367
3315
&dra7xx_l3_main_1__dss,
+3
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
+3
arch/arm/mach-omap2/omap_hwmod_81xx_data.c
···
144
144
.name = "l4_ls",
145
145
.clkdm_name = "alwon_l3s_clkdm",
146
146
.class = &l4_hwmod_class,
147
+
.flags = HWMOD_NO_IDLEST,
147
148
};
148
149
149
150
/*
···
156
155
.name = "l4_hs",
157
156
.clkdm_name = "alwon_l3_med_clkdm",
158
157
.class = &l4_hwmod_class,
158
+
.flags = HWMOD_NO_IDLEST,
159
159
};
160
160
161
161
/* L3 slow -> L4 ls peripheral interface running at 125MHz */
···
852
850
.name = "emac0",
853
851
.clkdm_name = "alwon_ethernet_clkdm",
854
852
.class = &dm816x_emac_hwmod_class,
853
+
.flags = HWMOD_NO_IDLEST,
855
854
};
856
855
857
856
static struct omap_hwmod_ocp_if dm81xx_l4_hs__emac0 = {
-29
arch/arm/mach-omap2/pdata-quirks.c
-29
arch/arm/mach-omap2/pdata-quirks.c
···
24
24
#include <linux/platform_data/iommu-omap.h>
25
25
#include <linux/platform_data/wkup_m3.h>
26
26
27
-
#include <asm/siginfo.h>
28
-
#include <asm/signal.h>
29
-
30
27
#include "common.h"
31
28
#include "common-board-devices.h"
32
29
#include "dss-common.h"
···
382
385
}
383
386
#endif /* CONFIG_ARCH_OMAP3 */
384
387
385
-
#ifdef CONFIG_SOC_TI81XX
386
-
static int fault_fixed_up;
387
-
388
-
static int t410_abort_handler(unsigned long addr, unsigned int fsr,
389
-
struct pt_regs *regs)
390
-
{
391
-
if ((fsr == 0x406 || fsr == 0xc06) && !fault_fixed_up) {
392
-
pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
393
-
addr, fsr);
394
-
fault_fixed_up = 1;
395
-
return 0;
396
-
}
397
-
398
-
return 1;
399
-
}
400
-
401
-
static void __init t410_abort_init(void)
402
-
{
403
-
hook_fault_code(16 + 6, t410_abort_handler, SIGBUS, BUS_OBJERR,
404
-
"imprecise external abort");
405
-
}
406
-
#endif
407
-
408
388
#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5)
409
389
static struct iommu_platform_data omap4_iommu_pdata = {
410
390
.reset_name = "mmu_cache",
···
509
535
{ "technexion,omap3-tao3530", omap3_tao3530_legacy_init, },
510
536
{ "openpandora,omap3-pandora-600mhz", omap3_pandora_legacy_init, },
511
537
{ "openpandora,omap3-pandora-1ghz", omap3_pandora_legacy_init, },
512
-
#endif
513
-
#ifdef CONFIG_SOC_TI81XX
514
-
{ "hp,t410", t410_abort_init, },
515
538
#endif
516
539
#ifdef CONFIG_SOC_OMAP5
517
540
{ "ti,omap5-uevm", omap5_uevm_legacy_init, },
+2
-2
arch/arm/mach-omap2/pm34xx.c
+2
-2
arch/arm/mach-omap2/pm34xx.c
···
301
301
if (omap_irq_pending())
302
302
return;
303
303
304
-
trace_cpu_idle(1, smp_processor_id());
304
+
trace_cpu_idle_rcuidle(1, smp_processor_id());
305
305
306
306
omap_sram_idle();
307
307
308
-
trace_cpu_idle(PWR_EVENT_EXIT, smp_processor_id());
308
+
trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
309
309
}
310
310
311
311
#ifdef CONFIG_SUSPEND
+1
-1
arch/arm/mach-orion5x/include/mach/entry-macro.S
+1
-1
arch/arm/mach-orion5x/include/mach/entry-macro.S
+1
-1
arch/arm/mach-pxa/palm27x.c
+1
-1
arch/arm/mach-pxa/palm27x.c
+1
-1
arch/arm/mach-pxa/palmtc.c
+1
-1
arch/arm/mach-pxa/palmtc.c
···
169
169
#if defined(CONFIG_BACKLIGHT_PWM) || defined(CONFIG_BACKLIGHT_PWM_MODULE)
170
170
static struct pwm_lookup palmtc_pwm_lookup[] = {
171
171
PWM_LOOKUP("pxa25x-pwm.1", 0, "pwm-backlight.0", NULL, PALMTC_PERIOD_NS,
172
-
PWM_PERIOD_NORMAL),
172
+
PWM_POLARITY_NORMAL),
173
173
};
174
174
175
175
static struct platform_pwm_backlight_data palmtc_backlight_data = {
+1
-1
arch/arm/mach-shmobile/setup-r8a7793.c
+1
-1
arch/arm/mach-shmobile/setup-r8a7793.c
+1
-1
arch/arm/mach-zx/Kconfig
+1
-1
arch/arm/mach-zx/Kconfig
+1
-1
drivers/bus/omap-ocp2scp.c
+1
-1
drivers/bus/omap-ocp2scp.c
+1
drivers/soc/mediatek/Kconfig
+1
drivers/soc/mediatek/Kconfig
+1
-1
include/linux/scpi_protocol.h
+1
-1
include/linux/scpi_protocol.h