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KVM: SVM: Extract OS-visible workarounds setup to helper function

Move the initialization of the global OSVW variables to a helper function
so that svm_enable_virtualization_cpu() isn't polluted with a pile of what
is effectively legacy code.

No functional change intended.

Link: https://patch.msgid.link/20251113231420.1695919-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>

+49 -41
+49 -41
arch/x86/kvm/svm/svm.c
··· 421 421 vcpu->arch.osvw.status |= 1; 422 422 } 423 423 424 + static void svm_init_os_visible_workarounds(void) 425 + { 426 + u64 len, status; 427 + int err; 428 + 429 + /* 430 + * Get OS-Visible Workarounds (OSVW) bits. 431 + * 432 + * Note that it is possible to have a system with mixed processor 433 + * revisions and therefore different OSVW bits. If bits are not the same 434 + * on different processors then choose the worst case (i.e. if erratum 435 + * is present on one processor and not on another then assume that the 436 + * erratum is present everywhere). 437 + * 438 + * Note #2! The OSVW MSRs are used to communciate that an erratum is 439 + * NOT present! Software must assume erratum as present if its bit is 440 + * set in OSVW_STATUS *or* the bit number exceeds OSVW_ID_LENGTH. If 441 + * either RDMSR fails, simply zero out the length to treat all errata 442 + * as being present. Similarly, use the *minimum* length across all 443 + * CPUs, not the maximum length. 444 + * 445 + * If the length is zero, then is KVM already treating all errata as 446 + * being present and there's nothing left to do. 447 + */ 448 + if (!osvw_len) 449 + return; 450 + 451 + if (!boot_cpu_has(X86_FEATURE_OSVW)) { 452 + osvw_status = osvw_len = 0; 453 + return; 454 + } 455 + 456 + err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len); 457 + if (!err) 458 + err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status); 459 + 460 + guard(spinlock)(&osvw_lock); 461 + 462 + if (err) { 463 + osvw_status = osvw_len = 0; 464 + } else { 465 + if (len < osvw_len) 466 + osvw_len = len; 467 + osvw_status |= status; 468 + osvw_status &= (1ULL << osvw_len) - 1; 469 + } 470 + } 471 + 424 472 static bool __kvm_is_svm_supported(void) 425 473 { 426 474 int cpu = smp_processor_id(); ··· 589 541 __svm_write_tsc_multiplier(SVM_TSC_RATIO_DEFAULT); 590 542 } 591 543 592 - 593 - /* 594 - * Get OS-Visible Workarounds (OSVW) bits. 595 - * 596 - * Note that it is possible to have a system with mixed processor 597 - * revisions and therefore different OSVW bits. If bits are not the same 598 - * on different processors then choose the worst case (i.e. if erratum 599 - * is present on one processor and not on another then assume that the 600 - * erratum is present everywhere). 601 - * 602 - * Note #2! The OSVW MSRs are used to communciate that an erratum is 603 - * NOT present! Software must assume erratum as present if its bit is 604 - * set in OSVW_STATUS *or* the bit number exceeds OSVW_ID_LENGTH. If 605 - * either RDMSR fails, simply zero out the length to treat all errata 606 - * as being present. Similarly, use the *minimum* length across all 607 - * CPUs, not the maximum length. 608 - * 609 - * If the length is zero, then is KVM already treating all errata as 610 - * being present and there's nothing left to do. 611 - */ 612 - if (osvw_len && cpu_has(&boot_cpu_data, X86_FEATURE_OSVW)) { 613 - u64 len, status = 0; 614 - int err; 615 - 616 - err = native_read_msr_safe(MSR_AMD64_OSVW_ID_LENGTH, &len); 617 - if (!err) 618 - err = native_read_msr_safe(MSR_AMD64_OSVW_STATUS, &status); 619 - 620 - guard(spinlock)(&osvw_lock); 621 - 622 - if (err) { 623 - osvw_status = osvw_len = 0; 624 - } else { 625 - if (len < osvw_len) 626 - osvw_len = len; 627 - osvw_status |= status; 628 - osvw_status &= (1ULL << osvw_len) - 1; 629 - } 630 - } else { 631 - osvw_status = osvw_len = 0; 632 - } 544 + svm_init_os_visible_workarounds(); 633 545 634 546 svm_init_erratum_383(); 635 547