Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6
* 'drm-intel-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/keithp/linux-2.6:
drm/i915: apply HWSTAM writes to Ivy Bridge as well
drm/i915: move IRQ function table init to i915_irq.c
drm/i915/overlay: Fix unpinning along init error paths
drm/i915: Don't call describe_obj on NULL pointers
drm/i915: Hold struct_mutex during i915_save_state/i915_restore_state
+94
-109
+10
-6
drivers/gpu/drm/i915/i915_debugfs.c
+10
-6
drivers/gpu/drm/i915/i915_debugfs.c
···
1207
1207
if (ret)
1208
1208
return ret;
1209
1209
1210
-
seq_printf(m, "power context ");
1211
-
describe_obj(m, dev_priv->pwrctx);
1212
-
seq_printf(m, "\n");
1210
+
if (dev_priv->pwrctx) {
1211
+
seq_printf(m, "power context ");
1212
+
describe_obj(m, dev_priv->pwrctx);
1213
+
seq_printf(m, "\n");
1214
+
}
1213
1215
1214
-
seq_printf(m, "render context ");
1215
-
describe_obj(m, dev_priv->renderctx);
1216
-
seq_printf(m, "\n");
1216
+
if (dev_priv->renderctx) {
1217
+
seq_printf(m, "render context ");
1218
+
describe_obj(m, dev_priv->renderctx);
1219
+
seq_printf(m, "\n");
1220
+
}
1217
1221
1218
1222
mutex_unlock(&dev->mode_config.mutex);
1219
1223
+1
-30
drivers/gpu/drm/i915/i915_dma.c
+1
-30
drivers/gpu/drm/i915/i915_dma.c
···
1266
1266
1267
1267
intel_modeset_gem_init(dev);
1268
1268
1269
-
if (IS_IVYBRIDGE(dev)) {
1270
-
/* Share pre & uninstall handlers with ILK/SNB */
1271
-
dev->driver->irq_handler = ivybridge_irq_handler;
1272
-
dev->driver->irq_preinstall = ironlake_irq_preinstall;
1273
-
dev->driver->irq_postinstall = ivybridge_irq_postinstall;
1274
-
dev->driver->irq_uninstall = ironlake_irq_uninstall;
1275
-
dev->driver->enable_vblank = ivybridge_enable_vblank;
1276
-
dev->driver->disable_vblank = ivybridge_disable_vblank;
1277
-
} else if (HAS_PCH_SPLIT(dev)) {
1278
-
dev->driver->irq_handler = ironlake_irq_handler;
1279
-
dev->driver->irq_preinstall = ironlake_irq_preinstall;
1280
-
dev->driver->irq_postinstall = ironlake_irq_postinstall;
1281
-
dev->driver->irq_uninstall = ironlake_irq_uninstall;
1282
-
dev->driver->enable_vblank = ironlake_enable_vblank;
1283
-
dev->driver->disable_vblank = ironlake_disable_vblank;
1284
-
} else {
1285
-
dev->driver->irq_preinstall = i915_driver_irq_preinstall;
1286
-
dev->driver->irq_postinstall = i915_driver_irq_postinstall;
1287
-
dev->driver->irq_uninstall = i915_driver_irq_uninstall;
1288
-
dev->driver->irq_handler = i915_driver_irq_handler;
1289
-
dev->driver->enable_vblank = i915_enable_vblank;
1290
-
dev->driver->disable_vblank = i915_disable_vblank;
1291
-
}
1292
-
1293
1269
ret = drm_irq_install(dev);
1294
1270
if (ret)
1295
1271
goto cleanup_gem;
···
1993
2017
/* enable GEM by default */
1994
2018
dev_priv->has_gem = 1;
1995
2019
1996
-
dev->driver->get_vblank_counter = i915_get_vblank_counter;
1997
-
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
1998
-
if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
1999
-
dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
2000
-
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
2001
-
}
2020
+
intel_irq_init(dev);
2002
2021
2003
2022
/* Try to make sure MCHBAR is enabled before poking at it */
2004
2023
intel_setup_mchbar(dev);
-8
drivers/gpu/drm/i915/i915_drv.c
-8
drivers/gpu/drm/i915/i915_drv.c
···
765
765
.resume = i915_resume,
766
766
767
767
.device_is_agp = i915_driver_device_is_agp,
768
-
.enable_vblank = i915_enable_vblank,
769
-
.disable_vblank = i915_disable_vblank,
770
-
.get_vblank_timestamp = i915_get_vblank_timestamp,
771
-
.get_scanout_position = i915_get_crtc_scanoutpos,
772
-
.irq_preinstall = i915_driver_irq_preinstall,
773
-
.irq_postinstall = i915_driver_irq_postinstall,
774
-
.irq_uninstall = i915_driver_irq_uninstall,
775
-
.irq_handler = i915_driver_irq_handler,
776
768
.reclaim_buffers = drm_core_reclaim_buffers,
777
769
.master_create = i915_master_create,
778
770
.master_destroy = i915_master_destroy,
+1
-31
drivers/gpu/drm/i915/i915_drv.h
+1
-31
drivers/gpu/drm/i915/i915_drv.h
···
997
997
998
998
extern int i915_suspend(struct drm_device *dev, pm_message_t state);
999
999
extern int i915_resume(struct drm_device *dev);
1000
-
extern void i915_save_display(struct drm_device *dev);
1001
-
extern void i915_restore_display(struct drm_device *dev);
1002
1000
extern int i915_master_create(struct drm_device *dev, struct drm_master *master);
1003
1001
extern void i915_master_destroy(struct drm_device *dev, struct drm_master *master);
1004
1002
···
1031
1033
extern int i915_irq_wait(struct drm_device *dev, void *data,
1032
1034
struct drm_file *file_priv);
1033
1035
1034
-
extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
1035
-
extern void i915_driver_irq_preinstall(struct drm_device * dev);
1036
-
extern int i915_driver_irq_postinstall(struct drm_device *dev);
1037
-
extern void i915_driver_irq_uninstall(struct drm_device * dev);
1038
-
1039
-
extern irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS);
1040
-
extern void ironlake_irq_preinstall(struct drm_device *dev);
1041
-
extern int ironlake_irq_postinstall(struct drm_device *dev);
1042
-
extern void ironlake_irq_uninstall(struct drm_device *dev);
1043
-
1044
-
extern irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS);
1045
-
extern void ivybridge_irq_preinstall(struct drm_device *dev);
1046
-
extern int ivybridge_irq_postinstall(struct drm_device *dev);
1047
-
extern void ivybridge_irq_uninstall(struct drm_device *dev);
1036
+
extern void intel_irq_init(struct drm_device *dev);
1048
1037
1049
1038
extern int i915_vblank_pipe_set(struct drm_device *dev, void *data,
1050
1039
struct drm_file *file_priv);
1051
1040
extern int i915_vblank_pipe_get(struct drm_device *dev, void *data,
1052
1041
struct drm_file *file_priv);
1053
-
extern int i915_enable_vblank(struct drm_device *dev, int crtc);
1054
-
extern void i915_disable_vblank(struct drm_device *dev, int crtc);
1055
-
extern int ironlake_enable_vblank(struct drm_device *dev, int crtc);
1056
-
extern void ironlake_disable_vblank(struct drm_device *dev, int crtc);
1057
-
extern int ivybridge_enable_vblank(struct drm_device *dev, int crtc);
1058
-
extern void ivybridge_disable_vblank(struct drm_device *dev, int crtc);
1059
-
extern u32 i915_get_vblank_counter(struct drm_device *dev, int crtc);
1060
-
extern u32 gm45_get_vblank_counter(struct drm_device *dev, int crtc);
1061
1042
extern int i915_vblank_swap(struct drm_device *dev, void *data,
1062
1043
struct drm_file *file_priv);
1063
1044
···
1047
1070
i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask);
1048
1071
1049
1072
void intel_enable_asle (struct drm_device *dev);
1050
-
int i915_get_vblank_timestamp(struct drm_device *dev, int crtc,
1051
-
int *max_error,
1052
-
struct timeval *vblank_time,
1053
-
unsigned flags);
1054
-
1055
-
int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
1056
-
int *vpos, int *hpos);
1057
1073
1058
1074
#ifdef CONFIG_DEBUG_FS
1059
1075
extern void i915_destroy_error_state(struct drm_device *dev);
+59
-21
drivers/gpu/drm/i915/i915_irq.c
+59
-21
drivers/gpu/drm/i915/i915_irq.c
···
152
152
/* Called from drm generic code, passed a 'crtc', which
153
153
* we use as a pipe index
154
154
*/
155
-
u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
155
+
static u32 i915_get_vblank_counter(struct drm_device *dev, int pipe)
156
156
{
157
157
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
158
158
unsigned long high_frame;
···
184
184
return (high1 << 8) | low;
185
185
}
186
186
187
-
u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
187
+
static u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe)
188
188
{
189
189
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
190
190
int reg = PIPE_FRMCOUNT_GM45(pipe);
···
198
198
return I915_READ(reg);
199
199
}
200
200
201
-
int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
201
+
static int i915_get_crtc_scanoutpos(struct drm_device *dev, int pipe,
202
202
int *vpos, int *hpos)
203
203
{
204
204
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
···
264
264
return ret;
265
265
}
266
266
267
-
int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
267
+
static int i915_get_vblank_timestamp(struct drm_device *dev, int pipe,
268
268
int *max_error,
269
269
struct timeval *vblank_time,
270
270
unsigned flags)
···
462
462
DRM_DEBUG_DRIVER("PCH transcoder A underrun interrupt\n");
463
463
}
464
464
465
-
irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
465
+
static irqreturn_t ivybridge_irq_handler(DRM_IRQ_ARGS)
466
466
{
467
467
struct drm_device *dev = (struct drm_device *) arg;
468
468
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
···
550
550
return ret;
551
551
}
552
552
553
-
irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
553
+
static irqreturn_t ironlake_irq_handler(DRM_IRQ_ARGS)
554
554
{
555
555
struct drm_device *dev = (struct drm_device *) arg;
556
556
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
···
1209
1209
}
1210
1210
}
1211
1211
1212
-
irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
1212
+
static irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
1213
1213
{
1214
1214
struct drm_device *dev = (struct drm_device *) arg;
1215
1215
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
···
1454
1454
/* Called from drm generic code, passed 'crtc' which
1455
1455
* we use as a pipe index
1456
1456
*/
1457
-
int i915_enable_vblank(struct drm_device *dev, int pipe)
1457
+
static int i915_enable_vblank(struct drm_device *dev, int pipe)
1458
1458
{
1459
1459
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1460
1460
unsigned long irqflags;
···
1478
1478
return 0;
1479
1479
}
1480
1480
1481
-
int ironlake_enable_vblank(struct drm_device *dev, int pipe)
1481
+
static int ironlake_enable_vblank(struct drm_device *dev, int pipe)
1482
1482
{
1483
1483
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1484
1484
unsigned long irqflags;
···
1494
1494
return 0;
1495
1495
}
1496
1496
1497
-
int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
1497
+
static int ivybridge_enable_vblank(struct drm_device *dev, int pipe)
1498
1498
{
1499
1499
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1500
1500
unsigned long irqflags;
···
1513
1513
/* Called from drm generic code, passed 'crtc' which
1514
1514
* we use as a pipe index
1515
1515
*/
1516
-
void i915_disable_vblank(struct drm_device *dev, int pipe)
1516
+
static void i915_disable_vblank(struct drm_device *dev, int pipe)
1517
1517
{
1518
1518
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1519
1519
unsigned long irqflags;
···
1529
1529
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
1530
1530
}
1531
1531
1532
-
void ironlake_disable_vblank(struct drm_device *dev, int pipe)
1532
+
static void ironlake_disable_vblank(struct drm_device *dev, int pipe)
1533
1533
{
1534
1534
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1535
1535
unsigned long irqflags;
···
1540
1540
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
1541
1541
}
1542
1542
1543
-
void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
1543
+
static void ivybridge_disable_vblank(struct drm_device *dev, int pipe)
1544
1544
{
1545
1545
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1546
1546
unsigned long irqflags;
···
1728
1728
1729
1729
/* drm_dma.h hooks
1730
1730
*/
1731
-
void ironlake_irq_preinstall(struct drm_device *dev)
1731
+
static void ironlake_irq_preinstall(struct drm_device *dev)
1732
1732
{
1733
1733
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1734
1734
···
1740
1740
INIT_WORK(&dev_priv->rps_work, gen6_pm_rps_work);
1741
1741
1742
1742
I915_WRITE(HWSTAM, 0xeffe);
1743
-
if (IS_GEN6(dev)) {
1743
+
if (IS_GEN6(dev) || IS_GEN7(dev)) {
1744
1744
/* Workaround stalls observed on Sandy Bridge GPUs by
1745
1745
* making the blitter command streamer generate a
1746
1746
* write to the Hardware Status Page for
···
1769
1769
POSTING_READ(SDEIER);
1770
1770
}
1771
1771
1772
-
int ironlake_irq_postinstall(struct drm_device *dev)
1772
+
static int ironlake_irq_postinstall(struct drm_device *dev)
1773
1773
{
1774
1774
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1775
1775
/* enable kind of interrupts always enabled */
···
1841
1841
return 0;
1842
1842
}
1843
1843
1844
-
int ivybridge_irq_postinstall(struct drm_device *dev)
1844
+
static int ivybridge_irq_postinstall(struct drm_device *dev)
1845
1845
{
1846
1846
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1847
1847
/* enable kind of interrupts always enabled */
···
1891
1891
return 0;
1892
1892
}
1893
1893
1894
-
void i915_driver_irq_preinstall(struct drm_device * dev)
1894
+
static void i915_driver_irq_preinstall(struct drm_device * dev)
1895
1895
{
1896
1896
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1897
1897
int pipe;
···
1918
1918
* Must be called after intel_modeset_init or hotplug interrupts won't be
1919
1919
* enabled correctly.
1920
1920
*/
1921
-
int i915_driver_irq_postinstall(struct drm_device *dev)
1921
+
static int i915_driver_irq_postinstall(struct drm_device *dev)
1922
1922
{
1923
1923
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
1924
1924
u32 enable_mask = I915_INTERRUPT_ENABLE_FIX | I915_INTERRUPT_ENABLE_VAR;
···
1994
1994
return 0;
1995
1995
}
1996
1996
1997
-
void ironlake_irq_uninstall(struct drm_device *dev)
1997
+
static void ironlake_irq_uninstall(struct drm_device *dev)
1998
1998
{
1999
1999
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
2000
2000
···
2014
2014
I915_WRITE(GTIIR, I915_READ(GTIIR));
2015
2015
}
2016
2016
2017
-
void i915_driver_irq_uninstall(struct drm_device * dev)
2017
+
static void i915_driver_irq_uninstall(struct drm_device * dev)
2018
2018
{
2019
2019
drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
2020
2020
int pipe;
···
2039
2039
I915_WRITE(PIPESTAT(pipe),
2040
2040
I915_READ(PIPESTAT(pipe)) & 0x8000ffff);
2041
2041
I915_WRITE(IIR, I915_READ(IIR));
2042
+
}
2043
+
2044
+
void intel_irq_init(struct drm_device *dev)
2045
+
{
2046
+
dev->driver->get_vblank_counter = i915_get_vblank_counter;
2047
+
dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */
2048
+
if (IS_G4X(dev) || IS_GEN5(dev) || IS_GEN6(dev) || IS_IVYBRIDGE(dev)) {
2049
+
dev->max_vblank_count = 0xffffffff; /* full 32 bit counter */
2050
+
dev->driver->get_vblank_counter = gm45_get_vblank_counter;
2051
+
}
2052
+
2053
+
2054
+
dev->driver->get_vblank_timestamp = i915_get_vblank_timestamp;
2055
+
dev->driver->get_scanout_position = i915_get_crtc_scanoutpos;
2056
+
2057
+
if (IS_IVYBRIDGE(dev)) {
2058
+
/* Share pre & uninstall handlers with ILK/SNB */
2059
+
dev->driver->irq_handler = ivybridge_irq_handler;
2060
+
dev->driver->irq_preinstall = ironlake_irq_preinstall;
2061
+
dev->driver->irq_postinstall = ivybridge_irq_postinstall;
2062
+
dev->driver->irq_uninstall = ironlake_irq_uninstall;
2063
+
dev->driver->enable_vblank = ivybridge_enable_vblank;
2064
+
dev->driver->disable_vblank = ivybridge_disable_vblank;
2065
+
} else if (HAS_PCH_SPLIT(dev)) {
2066
+
dev->driver->irq_handler = ironlake_irq_handler;
2067
+
dev->driver->irq_preinstall = ironlake_irq_preinstall;
2068
+
dev->driver->irq_postinstall = ironlake_irq_postinstall;
2069
+
dev->driver->irq_uninstall = ironlake_irq_uninstall;
2070
+
dev->driver->enable_vblank = ironlake_enable_vblank;
2071
+
dev->driver->disable_vblank = ironlake_disable_vblank;
2072
+
} else {
2073
+
dev->driver->irq_preinstall = i915_driver_irq_preinstall;
2074
+
dev->driver->irq_postinstall = i915_driver_irq_postinstall;
2075
+
dev->driver->irq_uninstall = i915_driver_irq_uninstall;
2076
+
dev->driver->irq_handler = i915_driver_irq_handler;
2077
+
dev->driver->enable_vblank = i915_enable_vblank;
2078
+
dev->driver->disable_vblank = i915_disable_vblank;
2079
+
}
2042
2080
}
+13
-6
drivers/gpu/drm/i915/i915_suspend.c
+13
-6
drivers/gpu/drm/i915/i915_suspend.c
···
597
597
return;
598
598
}
599
599
600
-
void i915_save_display(struct drm_device *dev)
600
+
static void i915_save_display(struct drm_device *dev)
601
601
{
602
602
struct drm_i915_private *dev_priv = dev->dev_private;
603
603
···
678
678
}
679
679
680
680
/* VGA state */
681
-
mutex_lock(&dev->struct_mutex);
682
681
dev_priv->saveVGA0 = I915_READ(VGA0);
683
682
dev_priv->saveVGA1 = I915_READ(VGA1);
684
683
dev_priv->saveVGA_PD = I915_READ(VGA_PD);
···
687
688
dev_priv->saveVGACNTRL = I915_READ(VGACNTRL);
688
689
689
690
i915_save_vga(dev);
690
-
mutex_unlock(&dev->struct_mutex);
691
691
}
692
692
693
-
void i915_restore_display(struct drm_device *dev)
693
+
static void i915_restore_display(struct drm_device *dev)
694
694
{
695
695
struct drm_i915_private *dev_priv = dev->dev_private;
696
696
···
781
783
else
782
784
I915_WRITE(VGACNTRL, dev_priv->saveVGACNTRL);
783
785
784
-
mutex_lock(&dev->struct_mutex);
785
786
I915_WRITE(VGA0, dev_priv->saveVGA0);
786
787
I915_WRITE(VGA1, dev_priv->saveVGA1);
787
788
I915_WRITE(VGA_PD, dev_priv->saveVGA_PD);
···
788
791
udelay(150);
789
792
790
793
i915_restore_vga(dev);
791
-
mutex_unlock(&dev->struct_mutex);
792
794
}
793
795
794
796
int i915_save_state(struct drm_device *dev)
···
796
800
int i;
797
801
798
802
pci_read_config_byte(dev->pdev, LBB, &dev_priv->saveLBB);
803
+
804
+
mutex_lock(&dev->struct_mutex);
799
805
800
806
/* Hardware status page */
801
807
dev_priv->saveHWS = I915_READ(HWS_PGA);
···
838
840
for (i = 0; i < 3; i++)
839
841
dev_priv->saveSWF2[i] = I915_READ(SWF30 + (i << 2));
840
842
843
+
mutex_unlock(&dev->struct_mutex);
844
+
841
845
return 0;
842
846
}
843
847
···
849
849
int i;
850
850
851
851
pci_write_config_byte(dev->pdev, LBB, dev_priv->saveLBB);
852
+
853
+
mutex_lock(&dev->struct_mutex);
852
854
853
855
/* Hardware status page */
854
856
I915_WRITE(HWS_PGA, dev_priv->saveHWS);
···
869
867
I915_WRITE(IER, dev_priv->saveIER);
870
868
I915_WRITE(IMR, dev_priv->saveIMR);
871
869
}
870
+
mutex_unlock(&dev->struct_mutex);
872
871
873
872
intel_init_clock_gating(dev);
874
873
···
880
877
881
878
if (IS_GEN6(dev))
882
879
gen6_enable_rps(dev_priv);
880
+
881
+
mutex_lock(&dev->struct_mutex);
883
882
884
883
/* Cache mode state */
885
884
I915_WRITE (CACHE_MODE_0, dev_priv->saveCACHE_MODE_0 | 0xffff0000);
···
895
890
}
896
891
for (i = 0; i < 3; i++)
897
892
I915_WRITE(SWF30 + (i << 2), dev_priv->saveSWF2[i]);
893
+
894
+
mutex_unlock(&dev->struct_mutex);
898
895
899
896
intel_i2c_reset(dev);
900
897
+10
-7
drivers/gpu/drm/i915/intel_overlay.c
+10
-7
drivers/gpu/drm/i915/intel_overlay.c
···
1409
1409
overlay = kzalloc(sizeof(struct intel_overlay), GFP_KERNEL);
1410
1410
if (!overlay)
1411
1411
return;
1412
+
1413
+
mutex_lock(&dev->struct_mutex);
1414
+
if (WARN_ON(dev_priv->overlay))
1415
+
goto out_free;
1416
+
1412
1417
overlay->dev = dev;
1413
1418
1414
1419
reg_bo = i915_gem_alloc_object(dev, PAGE_SIZE);
1415
1420
if (!reg_bo)
1416
1421
goto out_free;
1417
1422
overlay->reg_bo = reg_bo;
1418
-
1419
-
mutex_lock(&dev->struct_mutex);
1420
1423
1421
1424
if (OVERLAY_NEEDS_PHYSICAL(dev)) {
1422
1425
ret = i915_gem_attach_phys_object(dev, reg_bo,
···
1445
1442
}
1446
1443
}
1447
1444
1448
-
mutex_unlock(&dev->struct_mutex);
1449
-
1450
1445
/* init all values */
1451
1446
overlay->color_key = 0x0101fe;
1452
1447
overlay->brightness = -19;
···
1453
1452
1454
1453
regs = intel_overlay_map_regs(overlay);
1455
1454
if (!regs)
1456
-
goto out_free_bo;
1455
+
goto out_unpin_bo;
1457
1456
1458
1457
memset(regs, 0, sizeof(struct overlay_registers));
1459
1458
update_polyphase_filter(regs);
···
1462
1461
intel_overlay_unmap_regs(overlay, regs);
1463
1462
1464
1463
dev_priv->overlay = overlay;
1464
+
mutex_unlock(&dev->struct_mutex);
1465
1465
DRM_INFO("initialized overlay support\n");
1466
1466
return;
1467
1467
1468
1468
out_unpin_bo:
1469
-
i915_gem_object_unpin(reg_bo);
1469
+
if (!OVERLAY_NEEDS_PHYSICAL(dev))
1470
+
i915_gem_object_unpin(reg_bo);
1470
1471
out_free_bo:
1471
1472
drm_gem_object_unreference(®_bo->base);
1472
-
mutex_unlock(&dev->struct_mutex);
1473
1473
out_free:
1474
+
mutex_unlock(&dev->struct_mutex);
1474
1475
kfree(overlay);
1475
1476
return;
1476
1477
}