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spi: spi-fsl-lpspi: fsl_lpspi_set_cmd(): use FIELD_PREP to encode Transmit Command register

Instead of open coding mask and shift operations and to increase
readability use FIELD_PREP() to encode the Transmit Command register.

Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://patch.msgid.link/20260319-spi-fsl-lpspi-cleanups-v2-6-02b56c5d44a8@pengutronix.de
Signed-off-by: Mark Brown <broonie@kernel.org>

authored by

Marc Kleine-Budde and committed by
Mark Brown
c6e17846 1712be86

+7 -3
+7 -3
drivers/spi/spi-fsl-lpspi.c
··· 81 81 #define RSR_RXEMPTY BIT(1) 82 82 #define TCR_CPOL BIT(31) 83 83 #define TCR_CPHA BIT(30) 84 + #define TCR_MODE GENMASK(31, 30) 85 + #define TCR_PRESCALE GENMASK(29, 27) 86 + #define TCR_PCS GENMASK(25, 24) 84 87 #define TCR_CONT BIT(21) 85 88 #define TCR_CONTC BIT(20) 86 89 #define TCR_RXMSK BIT(19) 87 90 #define TCR_TXMSK BIT(18) 91 + #define TCR_FRAMESZ GENMASK(11, 0) 88 92 89 93 #define SR_CLEAR_MASK GENMASK(13, 8) 90 94 ··· 292 288 { 293 289 u32 temp = 0; 294 290 295 - temp |= fsl_lpspi->config.bpw - 1; 296 - temp |= (fsl_lpspi->config.chip_select & 0x3) << 24; 291 + temp |= FIELD_PREP(TCR_FRAMESZ, fsl_lpspi->config.bpw - 1); 292 + temp |= FIELD_PREP(TCR_PCS, fsl_lpspi->config.chip_select); 297 293 if (!fsl_lpspi->is_target) { 298 - temp |= fsl_lpspi->config.prescale << 27; 294 + temp |= FIELD_PREP(TCR_PRESCALE, fsl_lpspi->config.prescale); 299 295 /* 300 296 * Set TCR_CONT will keep SS asserted after current transfer. 301 297 * For the first transfer, clear TCR_CONTC to assert SS.