Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
mips: dts: Add PCIe to EcoNet EN751221
Add PCIe based on EN7528 PCIe driver, also add two MT76 wifi devices
to SmartFiber XP8421-B.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
authored by
Caleb James DeLisle
and committed by
Thomas Bogendoerfer
c7dd395d
ff8efe28
+137
+114
arch/mips/boot/dts/econet/en751221.dtsi
+114
arch/mips/boot/dts/econet/en751221.dtsi
···
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// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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/dts-v1/;
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#include <dt-bindings/clock/econet,en751221-scu.h>
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/ {
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compatible = "econet,en751221";
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#address-cells = <1>;
···
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#interrupt-cells = <1>;
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};
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chip_scu: syscon@1fa20000 {
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compatible = "econet,en751221-chip-scu", "syscon";
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reg = <0x1fa20000 0x388>;
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};
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pcie_phy1: pcie-phy@1fac0000 {
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compatible = "econet,en751221-pcie-gen2";
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reg = <0x1fac0000 0x1000>;
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#phy-cells = <0>;
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};
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pcie_phy0: pcie-phy@1faf2000 {
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compatible = "econet,en751221-pcie-gen1";
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reg = <0x1faf2000 0x1000>;
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#phy-cells = <0>;
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};
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scuclk: clock-controller@1fb00000 {
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compatible = "econet,en751221-scu";
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reg = <0x1fb00000 0x970>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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};
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intc: interrupt-controller@1fb40000 {
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compatible = "econet,en751221-intc";
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reg = <0x1fb40000 0x100>;
···
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interrupt-controller;
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#interrupt-cells = <1>;
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econet,shadow-interrupts = <7 2>, <8 3>, <13 12>, <30 29>;
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};
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pciecfg: pciecfg@1fb80000 {
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compatible = "mediatek,generic-pciecfg", "syscon";
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reg = <0x1fb80000 0x1000>;
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};
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pcie0: pcie@1fb81000 {
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compatible = "econet,en7528-pcie";
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device_type = "pci";
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reg = <0x1fb81000 0x1000>;
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reg-names = "port0";
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linux,pci-domain = <0>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <23>;
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interrupt-names = "pcie_irq";
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clocks = <&scuclk EN751221_CLK_PCIE>;
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clock-names = "sys_ck0";
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phys = <&pcie_phy0>;
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phy-names = "pcie-phy0";
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bus-range = <0x00 0xff>;
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ranges = <0x01000000 0 0x00000000 0x1f600000 0 0x00008000>,
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<0x82000000 0 0x20000000 0x20000000 0 0x08000000>;
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status = "disabled";
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+
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc0 0>,
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<0 0 0 2 &pcie_intc0 1>,
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<0 0 0 3 &pcie_intc0 2>,
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<0 0 0 4 &pcie_intc0 3>;
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pcie_intc0: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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slot0: pcie@0,0 {
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reg = <0x0000 0 0 0 0>;
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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pcie1: pcie@1fb83000 {
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compatible = "econet,en7528-pcie";
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device_type = "pci";
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reg = <0x1fb83000 0x1000>;
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reg-names = "port1";
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linux,pci-domain = <1>;
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#address-cells = <3>;
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#size-cells = <2>;
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interrupt-parent = <&intc>;
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interrupts = <24>;
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interrupt-names = "pcie_irq";
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clocks = <&scuclk EN751221_CLK_PCIE>;
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clock-names = "sys_ck1";
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phys = <&pcie_phy1>;
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phy-names = "pcie-phy1";
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bus-range = <0x00 0xff>;
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ranges = <0x81000000 0 0x00000000 0x1f608000 0 0x00008000>,
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<0x82000000 0 0x28000000 0x28000000 0 0x08000000>;
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status = "disabled";
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 7>;
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interrupt-map = <0 0 0 1 &pcie_intc1 0>,
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<0 0 0 2 &pcie_intc1 1>,
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<0 0 0 3 &pcie_intc1 2>,
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<0 0 0 4 &pcie_intc1 3>;
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pcie_intc1: interrupt-controller {
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interrupt-controller;
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#address-cells = <0>;
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#interrupt-cells = <1>;
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};
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slot1: pcie@1,0 {
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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ranges;
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};
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};
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uart: serial@1fbf0000 {
+21
arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
+21
arch/mips/boot/dts/econet/en751221_smartfiber_xp8421-b.dts
···
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linux,usable-memory-range = <0x00020000 0x1bfe0000>;
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};
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};
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&pcie0 {
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status = "okay";
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};
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&slot0 {
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wifi@0,0 {
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/* MT7612E */
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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};
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};
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&pcie1 {
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status = "okay";
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};
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&slot1 {
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wifi@0,0 {
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/* MT7592 */
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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};
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};