tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
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crypto: qat - add retrieval of fw capabilities

The QAT firmware provides a mechanism to retrieve its capabilities
through the init admin interface.

Add logic to retrieve the firmware capability mask from the firmware
through the init/admin channel. This mask reports if the
power management, telemetry and rate limiting features are supported.

The fw capabilities are stored in the accel_dev structure and are used
to detect if a certain feature is supported by the firmware loaded
in the device.

This is supported only by devices which have an admin AE.

Signed-off-by: Damian Muszynski <damian.muszynski@intel.com>
Reviewed-by: Giovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: Tero Kristo <tero.kristo@linux.intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>

authored by

Damian Muszynski and committed by
Herbert Xu c7fd5379 02e7f67c

+27
+1
drivers/crypto/intel/qat/qat_common/adf_accel_devices.h
··· 253 253 u32 straps; 254 254 u32 accel_capabilities_mask; 255 255 u32 extended_dc_capabilities; 256 + u16 fw_capabilities; 256 257 u32 clock_frequency; 257 258 u32 instance_id; 258 259 u16 accel_mask;
+23
drivers/crypto/intel/qat/qat_common/adf_admin.c
··· 310 310 return !strcmp(services, "dcc"); 311 311 } 312 312 313 + static int adf_get_fw_capabilities(struct adf_accel_dev *accel_dev, u16 *caps) 314 + { 315 + u32 ae_mask = accel_dev->hw_device->admin_ae_mask; 316 + struct icp_qat_fw_init_admin_resp resp = { }; 317 + struct icp_qat_fw_init_admin_req req = { }; 318 + int ret; 319 + 320 + if (!ae_mask) 321 + return 0; 322 + 323 + req.cmd_id = ICP_QAT_FW_CAPABILITIES_GET; 324 + ret = adf_send_admin(accel_dev, &req, &resp, ae_mask); 325 + if (ret) 326 + return ret; 327 + 328 + *caps = resp.fw_capabilities; 329 + 330 + return 0; 331 + } 332 + 313 333 /** 314 334 * adf_send_admin_init() - Function sends init message to FW 315 335 * @accel_dev: Pointer to acceleration device. ··· 340 320 */ 341 321 int adf_send_admin_init(struct adf_accel_dev *accel_dev) 342 322 { 323 + struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev); 343 324 u32 dc_capabilities = 0; 344 325 int ret; 345 326 ··· 360 339 return ret; 361 340 } 362 341 accel_dev->hw_device->extended_dc_capabilities = dc_capabilities; 342 + 343 + adf_get_fw_capabilities(accel_dev, &hw_data->fw_capabilities); 363 344 364 345 return adf_init_ae(accel_dev); 365 346 }
+3
drivers/crypto/intel/qat/qat_common/icp_qat_fw_init_admin.h
··· 16 16 ICP_QAT_FW_HEARTBEAT_SYNC = 7, 17 17 ICP_QAT_FW_HEARTBEAT_GET = 8, 18 18 ICP_QAT_FW_COMP_CAPABILITY_GET = 9, 19 + ICP_QAT_FW_CRYPTO_CAPABILITY_GET = 10, 19 20 ICP_QAT_FW_DC_CHAIN_INIT = 11, 20 21 ICP_QAT_FW_HEARTBEAT_TIMER_SET = 13, 21 22 ICP_QAT_FW_TIMER_GET = 19, ··· 110 109 __u32 unsuccessful_count; 111 110 __u64 resrvd8; 112 111 }; 112 + __u16 fw_capabilities; 113 113 }; 114 114 } __packed; 115 115 116 116 #define ICP_QAT_FW_SYNC ICP_QAT_FW_HEARTBEAT_SYNC 117 + #define ICP_QAT_FW_CAPABILITIES_GET ICP_QAT_FW_CRYPTO_CAPABILITY_GET 117 118 118 119 #define ICP_QAT_NUMBER_OF_PM_EVENTS 8 119 120