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drm/i915/display: move clock-gating init for IBX to display

Add a new function in the display code to help initialize clock-gating
without reading display PCH registers directly from non-display code.

This adds a mini-framework to deal with display-specific PCH registers
and uses it for IBX as a start.

Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patch.msgid.link/20260324080441.154609-2-luciano.coelho@intel.com
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>

+27 -11
+24
drivers/gpu/drm/i915/display/intel_pch.c
··· 5 5 6 6 #include <drm/drm_print.h> 7 7 8 + #include "intel_de.h" 9 + #include "intel_display_regs.h" 8 10 #include "intel_display_core.h" 9 11 #include "intel_display_utils.h" 10 12 #include "intel_pch.h" ··· 213 211 return PCH_ADP; 214 212 default: 215 213 return PCH_NONE; 214 + } 215 + } 216 + 217 + static void intel_pch_ibx_init_clock_gating(struct intel_display *display) 218 + { 219 + /* 220 + * On Ibex Peak and Cougar Point, we need to disable clock 221 + * gating for the panel power sequencer or it will fail to 222 + * start up when no ports are active. 223 + */ 224 + intel_de_write(display, SOUTH_DSPCLK_GATE_D, 225 + PCH_DPLSUNIT_CLOCK_GATE_DISABLE); 226 + } 227 + 228 + void intel_pch_init_clock_gating(struct intel_display *display) 229 + { 230 + switch (INTEL_PCH_TYPE(display)) { 231 + case PCH_IBX: 232 + intel_pch_ibx_init_clock_gating(display); 233 + break; 234 + default: 235 + break; 216 236 } 217 237 } 218 238
+1
drivers/gpu/drm/i915/display/intel_pch.h
··· 52 52 #define HAS_PCH_SPLIT(display) (INTEL_PCH_TYPE(display) != PCH_NONE) 53 53 54 54 void intel_pch_detect(struct intel_display *display); 55 + void intel_pch_init_clock_gating(struct intel_display *display); 55 56 56 57 #endif /* __INTEL_PCH__ */
+2 -11
drivers/gpu/drm/i915/intel_clock_gating.c
··· 33 33 #include "display/intel_display.h" 34 34 #include "display/intel_display_core.h" 35 35 #include "display/intel_display_regs.h" 36 + #include "display/intel_pch.h" 36 37 #include "gt/intel_engine_regs.h" 37 38 #include "gt/intel_gt.h" 38 39 #include "gt/intel_gt_mcr.h" ··· 125 124 PWM1_GATING_DIS | PWM2_GATING_DIS); 126 125 } 127 126 128 - static void ibx_init_clock_gating(struct drm_i915_private *i915) 129 - { 130 - /* 131 - * On Ibex Peak and Cougar Point, we need to disable clock 132 - * gating for the panel power sequencer or it will fail to 133 - * start up when no ports are active. 134 - */ 135 - intel_uncore_write(&i915->uncore, SOUTH_DSPCLK_GATE_D, PCH_DPLSUNIT_CLOCK_GATE_DISABLE); 136 - } 137 - 138 127 static void g4x_disable_trickle_feed(struct drm_i915_private *dev_priv) 139 128 { 140 129 struct intel_display *display = dev_priv->display; ··· 193 202 194 203 g4x_disable_trickle_feed(i915); 195 204 196 - ibx_init_clock_gating(i915); 205 + intel_pch_init_clock_gating(i915->display); 197 206 } 198 207 199 208 static void cpt_init_clock_gating(struct drm_i915_private *i915)