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Merge branch 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 fixes from Ingo Molnar.

* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/smp: Fix topology checks on AMD MCM CPUs
x86/mm: Fix some kernel-doc warnings
x86, um: Correct syscall table type attributes breaking gcc 4.8

+10 -7
+5 -2
arch/x86/kernel/smpboot.c
··· 349 349 350 350 static bool __cpuinit match_mc(struct cpuinfo_x86 *c, struct cpuinfo_x86 *o) 351 351 { 352 - if (c->phys_proc_id == o->phys_proc_id) 353 - return topology_sane(c, o, "mc"); 352 + if (c->phys_proc_id == o->phys_proc_id) { 353 + if (cpu_has(c, X86_FEATURE_AMD_DCM)) 354 + return true; 354 355 356 + return topology_sane(c, o, "mc"); 357 + } 355 358 return false; 356 359 } 357 360
+2 -2
arch/x86/mm/ioremap.c
··· 180 180 181 181 /** 182 182 * ioremap_nocache - map bus memory into CPU space 183 - * @offset: bus address of the memory 183 + * @phys_addr: bus address of the memory 184 184 * @size: size of the resource to map 185 185 * 186 186 * ioremap_nocache performs a platform specific sequence of operations to ··· 217 217 218 218 /** 219 219 * ioremap_wc - map memory into CPU space write combined 220 - * @offset: bus address of the memory 220 + * @phys_addr: bus address of the memory 221 221 * @size: size of the resource to map 222 222 * 223 223 * This version of ioremap ensures that the memory is marked write combining.
+1 -1
arch/x86/mm/pageattr.c
··· 122 122 123 123 /** 124 124 * clflush_cache_range - flush a cache range with clflush 125 - * @addr: virtual start address 125 + * @vaddr: virtual start address 126 126 * @size: number of bytes to flush 127 127 * 128 128 * clflush is an unordered instruction which needs fencing with mfence
+2 -2
arch/x86/um/sys_call_table_32.c
··· 39 39 #undef __SYSCALL_I386 40 40 #define __SYSCALL_I386(nr, sym, compat) [ nr ] = sym, 41 41 42 - typedef void (*sys_call_ptr_t)(void); 42 + typedef asmlinkage void (*sys_call_ptr_t)(void); 43 43 44 - extern void sys_ni_syscall(void); 44 + extern asmlinkage void sys_ni_syscall(void); 45 45 46 46 const sys_call_ptr_t sys_call_table[] __cacheline_aligned = { 47 47 /*