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clk: qcom: gcc-sm8150: Add gcc video resets for sm8150

Add gcc video axic, axi0 and axi1 resets for the global clock
controller on sm8150.

Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240111-sm8150-dfs-support-v2-3-6edb44c83d3b@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>

authored by

Satya Priya Kakitapalli and committed by
Bjorn Andersson c8bf3e08 4b3dbd70

+3
+3
drivers/clk/qcom/gcc-sm8150.c
··· 3778 3778 [GCC_USB30_PRIM_BCR] = { 0xf000 }, 3779 3779 [GCC_USB30_SEC_BCR] = { 0x10000 }, 3780 3780 [GCC_USB_PHY_CFG_AHB2PHY_BCR] = { 0x6a000 }, 3781 + [GCC_VIDEO_AXIC_CLK_BCR] = { 0xb02c, 2 }, 3782 + [GCC_VIDEO_AXI0_CLK_BCR] = { 0xb024, 2 }, 3783 + [GCC_VIDEO_AXI1_CLK_BCR] = { 0xb028, 2 }, 3781 3784 }; 3782 3785 3783 3786 static struct gdsc *gcc_sm8150_gdscs[] = {