···274274 gpio = &irq_desc[pin];275275276276 while (isr) {277277- if (isr & 1)278278- gpio->handle(pin, gpio, regs);277277+ if (isr & 1) {278278+ if (unlikely(gpio->disable_depth)) {279279+ /*280280+ * The core ARM interrupt handler lazily disables IRQs so281281+ * another IRQ must be generated before it actually gets282282+ * here to be disabled on the GPIO controller.283283+ */284284+ gpio_irq_mask(pin);285285+ }286286+ else287287+ gpio->handle(pin, gpio, regs);288288+ }279289 pin++;280290 gpio++;281291 isr >>= 1;