Merge tag 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/rdma/rdma

+2

drivers/infiniband/core/addr.c

··· 269 269 break; 270 270 #endif 271 271 } 272 + if (!ret && dev && is_vlan_dev(dev)) 273 + dev = vlan_dev_real_dev(dev); 272 274 return ret ? ERR_PTR(ret) : dev; 273 275 } 274 276

+2

drivers/infiniband/core/nldev.c

··· 2816 2816 nlh = nlmsg_put(skb, 0, 0, 2817 2817 RDMA_NL_GET_TYPE(RDMA_NL_NLDEV, RDMA_NLDEV_CMD_MONITOR), 2818 2818 0, 0); 2819 + if (!nlh) 2820 + goto err_free; 2819 2821 2820 2822 switch (type) { 2821 2823 case RDMA_REGISTER_EVENT:

+1 -1

drivers/infiniband/hw/bnxt_re/hw_counters.c

··· 366 366 goto done; 367 367 } 368 368 } 369 - if (rdev->pacing.dbr_pacing) 369 + if (rdev->pacing.dbr_pacing && bnxt_qplib_is_chip_gen_p5_p7(rdev->chip_ctx)) 370 370 bnxt_re_copy_db_pacing_stats(rdev, stats); 371 371 } 372 372

+5 -1

drivers/infiniband/hw/bnxt_re/ib_verbs.c

··· 1307 1307 0 : BNXT_QPLIB_RESERVED_QP_WRS; 1308 1308 entries = bnxt_re_init_depth(entries + diff + 1, uctx); 1309 1309 sq->max_wqe = min_t(u32, entries, dev_attr->max_qp_wqes + diff + 1); 1310 - sq->max_sw_wqe = bnxt_qplib_get_depth(sq, qplqp->wqe_mode, true); 1310 + if (qplqp->wqe_mode == BNXT_QPLIB_WQE_MODE_VARIABLE) 1311 + sq->max_sw_wqe = bnxt_qplib_get_depth(sq, qplqp->wqe_mode, true); 1312 + else 1313 + sq->max_sw_wqe = sq->max_wqe; 1314 + 1311 1315 } 1312 1316 sq->q_full_delta = diff + 1; 1313 1317 /*

+25 -22

drivers/infiniband/hw/bnxt_re/main.c

··· 188 188 189 189 bnxt_re_set_db_offset(rdev); 190 190 rc = bnxt_qplib_map_db_bar(&rdev->qplib_res); 191 - if (rc) 191 + if (rc) { 192 + kfree(rdev->chip_ctx); 193 + rdev->chip_ctx = NULL; 192 194 return rc; 195 + } 193 196 194 197 if (bnxt_qplib_determine_atomics(en_dev->pdev)) 195 198 ibdev_info(&rdev->ibdev, ··· 534 531 static void __wait_for_fifo_occupancy_below_th(struct bnxt_re_dev *rdev) 535 532 { 536 533 struct bnxt_qplib_db_pacing_data *pacing_data = rdev->qplib_res.pacing_data; 534 + u32 retry_fifo_check = 1000; 537 535 u32 fifo_occup; 538 536 539 537 /* loop shouldn't run infintely as the occupancy usually goes ··· 548 544 549 545 if (fifo_occup < pacing_data->pacing_th) 550 546 break; 547 + if (!retry_fifo_check--) { 548 + dev_info_once(rdev_to_dev(rdev), 549 + "%s: fifo_occup = 0x%xfifo_max_depth = 0x%x pacing_th = 0x%x\n", 550 + __func__, fifo_occup, pacing_data->fifo_max_depth, 551 + pacing_data->pacing_th); 552 + break; 553 + } 554 + 551 555 } 552 556 } 553 557 ··· 969 957 return ib_register_device(ibdev, "bnxt_re%d", &rdev->en_dev->pdev->dev); 970 958 } 971 959 972 - static struct bnxt_re_dev *bnxt_re_dev_add(struct bnxt_aux_priv *aux_priv, 960 + static struct bnxt_re_dev *bnxt_re_dev_add(struct auxiliary_device *adev, 973 961 struct bnxt_en_dev *en_dev) 974 962 { 975 963 struct bnxt_re_dev *rdev; ··· 985 973 rdev->nb.notifier_call = NULL; 986 974 rdev->netdev = en_dev->net; 987 975 rdev->en_dev = en_dev; 976 + rdev->adev = adev; 988 977 rdev->id = rdev->en_dev->pdev->devfn; 989 978 INIT_LIST_HEAD(&rdev->qp_list); 990 979 mutex_init(&rdev->qp_lock); ··· 1038 1025 static int bnxt_re_handle_qp_async_event(struct creq_qp_event *qp_event, 1039 1026 struct bnxt_re_qp *qp) 1040 1027 { 1041 - struct bnxt_re_srq *srq = container_of(qp->qplib_qp.srq, struct bnxt_re_srq, 1042 - qplib_srq); 1043 1028 struct creq_qp_error_notification *err_event; 1029 + struct bnxt_re_srq *srq = NULL; 1044 1030 struct ib_event event = {}; 1045 1031 unsigned int flags; 1032 + 1033 + if (qp->qplib_qp.srq) 1034 + srq = container_of(qp->qplib_qp.srq, struct bnxt_re_srq, 1035 + qplib_srq); 1046 1036 1047 1037 if (qp->qplib_qp.state == CMDQ_MODIFY_QP_NEW_STATE_ERR && 1048 1038 rdma_is_kernel_res(&qp->ib_qp.res)) { ··· 1274 1258 { 1275 1259 struct bnxt_re_cq *cq = container_of(handle, struct bnxt_re_cq, 1276 1260 qplib_cq); 1277 - u32 *cq_ptr; 1278 1261 1279 - if (cq->ib_cq.comp_handler) { 1280 - if (cq->uctx_cq_page) { 1281 - cq_ptr = (u32 *)cq->uctx_cq_page; 1282 - *cq_ptr = cq->qplib_cq.toggle; 1283 - } 1262 + if (cq->ib_cq.comp_handler) 1284 1263 (*cq->ib_cq.comp_handler)(&cq->ib_cq, cq->ib_cq.cq_context); 1285 - } 1286 1264 1287 1265 return 0; 1288 1266 } ··· 1833 1823 */ 1834 1824 rtnl_lock(); 1835 1825 en_info->rdev = rdev; 1836 - rdev->adev = adev; 1837 1826 rtnl_unlock(); 1838 1827 } 1839 1828 ··· 1849 1840 en_dev = en_info->en_dev; 1850 1841 1851 1842 1852 - rdev = bnxt_re_dev_add(aux_priv, en_dev); 1843 + rdev = bnxt_re_dev_add(adev, en_dev); 1853 1844 if (!rdev || !rdev_to_dev(rdev)) { 1854 1845 rc = -ENOMEM; 1855 1846 goto exit; ··· 1874 1865 rdev->nb.notifier_call = NULL; 1875 1866 pr_err("%s: Cannot register to netdevice_notifier", 1876 1867 ROCE_DRV_MODULE_NAME); 1877 - return rc; 1868 + goto re_dev_unreg; 1878 1869 } 1879 1870 bnxt_re_setup_cc(rdev, true); 1880 1871 1881 1872 return 0; 1882 1873 1874 + re_dev_unreg: 1875 + ib_unregister_device(&rdev->ibdev); 1883 1876 re_dev_uninit: 1884 1877 bnxt_re_update_en_info_rdev(NULL, en_info, adev); 1885 1878 bnxt_re_dev_uninit(rdev, BNXT_RE_COMPLETE_REMOVE); ··· 2025 2014 auxiliary_set_drvdata(adev, en_info); 2026 2015 2027 2016 rc = bnxt_re_add_device(adev, BNXT_RE_COMPLETE_INIT); 2028 - if (rc) 2029 - goto err; 2030 2017 mutex_unlock(&bnxt_re_mutex); 2031 - return 0; 2032 - 2033 - err: 2034 - mutex_unlock(&bnxt_re_mutex); 2035 - bnxt_re_remove(adev); 2036 - 2037 2018 return rc; 2038 2019 } 2039 2020

+5

drivers/infiniband/hw/bnxt_re/qplib_fp.c

··· 327 327 case NQ_BASE_TYPE_CQ_NOTIFICATION: 328 328 { 329 329 struct nq_cn *nqcne = (struct nq_cn *)nqe; 330 + struct bnxt_re_cq *cq_p; 330 331 331 332 q_handle = le32_to_cpu(nqcne->cq_handle_low); 332 333 q_handle |= (u64)le32_to_cpu(nqcne->cq_handle_high) ··· 338 337 cq->toggle = (le16_to_cpu(nqe->info10_type) & 339 338 NQ_CN_TOGGLE_MASK) >> NQ_CN_TOGGLE_SFT; 340 339 cq->dbinfo.toggle = cq->toggle; 340 + cq_p = container_of(cq, struct bnxt_re_cq, qplib_cq); 341 + if (cq_p->uctx_cq_page) 342 + *((u32 *)cq_p->uctx_cq_page) = cq->toggle; 343 + 341 344 bnxt_qplib_armen_db(&cq->dbinfo, 342 345 DBC_DBC_TYPE_CQ_ARMENA); 343 346 spin_lock_bh(&cq->compl_lock);

+1 -1

drivers/infiniband/hw/bnxt_re/qplib_fp.h

··· 170 170 }; 171 171 u32 q_key; 172 172 u32 dst_qp; 173 - u16 avid; 173 + u32 avid; 174 174 } send; 175 175 176 176 /* Send Raw Ethernet and QP1 */

+1 -1

drivers/infiniband/hw/bnxt_re/qplib_rcfw.c

··· 525 525 /* failed with status */ 526 526 dev_err(&rcfw->pdev->dev, "cmdq[%#x]=%#x status %#x\n", 527 527 cookie, opcode, evnt->status); 528 - rc = -EFAULT; 528 + rc = -EIO; 529 529 } 530 530 531 531 return rc;

+5 -16

drivers/infiniband/hw/bnxt_re/qplib_res.c

··· 244 244 sginfo.pgsize = npde * pg_size; 245 245 sginfo.npages = 1; 246 246 rc = __alloc_pbl(res, &hwq->pbl[PBL_LVL_0], &sginfo); 247 + if (rc) 248 + goto fail; 247 249 248 250 /* Alloc PBL pages */ 249 251 sginfo.npages = npbl; ··· 257 255 dst_virt_ptr = 258 256 (dma_addr_t **)hwq->pbl[PBL_LVL_0].pg_arr; 259 257 src_phys_ptr = hwq->pbl[PBL_LVL_1].pg_map_arr; 260 - if (hwq_attr->type == HWQ_TYPE_MR) { 261 - /* For MR it is expected that we supply only 1 contigous 262 - * page i.e only 1 entry in the PDL that will contain 263 - * all the PBLs for the user supplied memory region 264 - */ 265 - for (i = 0; i < hwq->pbl[PBL_LVL_1].pg_count; 266 - i++) 267 - dst_virt_ptr[0][i] = src_phys_ptr[i] | 268 - flag; 269 - } else { 270 - for (i = 0; i < hwq->pbl[PBL_LVL_1].pg_count; 271 - i++) 272 - dst_virt_ptr[PTR_PG(i)][PTR_IDX(i)] = 273 - src_phys_ptr[i] | 274 - PTU_PDE_VALID; 275 - } 258 + for (i = 0; i < hwq->pbl[PBL_LVL_1].pg_count; i++) 259 + dst_virt_ptr[0][i] = src_phys_ptr[i] | flag; 260 + 276 261 /* Alloc or init PTEs */ 277 262 rc = __alloc_pbl(res, &hwq->pbl[PBL_LVL_2], 278 263 hwq_attr->sginfo);

+10 -1

drivers/infiniband/hw/bnxt_re/qplib_sp.c

··· 140 140 min_t(u32, sb->max_sge_var_wqe, BNXT_VAR_MAX_SGE) : 6; 141 141 attr->max_cq = le32_to_cpu(sb->max_cq); 142 142 attr->max_cq_wqes = le32_to_cpu(sb->max_cqe); 143 + if (!bnxt_qplib_is_chip_gen_p7(rcfw->res->cctx)) 144 + attr->max_cq_wqes = min_t(u32, BNXT_QPLIB_MAX_CQ_WQES, attr->max_cq_wqes); 143 145 attr->max_cq_sges = attr->max_qp_sges; 144 146 attr->max_mr = le32_to_cpu(sb->max_mr); 145 147 attr->max_mw = le32_to_cpu(sb->max_mw); ··· 159 157 if (!bnxt_qplib_is_chip_gen_p7(rcfw->res->cctx)) 160 158 attr->l2_db_size = (sb->l2_db_space_size + 1) * 161 159 (0x01 << RCFW_DBR_BASE_PAGE_SHIFT); 162 - attr->max_sgid = BNXT_QPLIB_NUM_GIDS_SUPPORTED; 160 + /* 161 + * Read the max gid supported by HW. 162 + * For each entry in HW GID in HW table, we consume 2 163 + * GID entries in the kernel GID table. So max_gid reported 164 + * to stack can be up to twice the value reported by the HW, up to 256 gids. 165 + */ 166 + attr->max_sgid = le32_to_cpu(sb->max_gid); 167 + attr->max_sgid = min_t(u32, BNXT_QPLIB_NUM_GIDS_SUPPORTED, 2 * attr->max_sgid); 163 168 attr->dev_cap_flags = le16_to_cpu(sb->dev_cap_flags); 164 169 attr->dev_cap_flags2 = le16_to_cpu(sb->dev_cap_ext_flags_2); 165 170

+1

drivers/infiniband/hw/bnxt_re/qplib_sp.h

··· 56 56 u32 max_qp_wqes; 57 57 u32 max_qp_sges; 58 58 u32 max_cq; 59 + #define BNXT_QPLIB_MAX_CQ_WQES 0xfffff 59 60 u32 max_cq_wqes; 60 61 u32 max_cq_sges; 61 62 u32 max_mr;

+4 -5

drivers/infiniband/hw/cxgb4/cm.c

··· 2086 2086 err = -ENOMEM; 2087 2087 if (n->dev->flags & IFF_LOOPBACK) { 2088 2088 if (iptype == 4) 2089 - pdev = ip_dev_find(&init_net, *(__be32 *)peer_ip); 2089 + pdev = __ip_dev_find(&init_net, *(__be32 *)peer_ip, false); 2090 2090 else if (IS_ENABLED(CONFIG_IPV6)) 2091 2091 for_each_netdev(&init_net, pdev) { 2092 2092 if (ipv6_chk_addr(&init_net, ··· 2101 2101 err = -ENODEV; 2102 2102 goto out; 2103 2103 } 2104 + if (is_vlan_dev(pdev)) 2105 + pdev = vlan_dev_real_dev(pdev); 2104 2106 ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t, 2105 2107 n, pdev, rt_tos2priority(tos)); 2106 - if (!ep->l2t) { 2107 - dev_put(pdev); 2108 + if (!ep->l2t) 2108 2109 goto out; 2109 - } 2110 2110 ep->mtu = pdev->mtu; 2111 2111 ep->tx_chan = cxgb4_port_chan(pdev); 2112 2112 ep->smac_idx = ((struct port_info *)netdev_priv(pdev))->smt_idx; ··· 2119 2119 ep->rss_qid = cdev->rdev.lldi.rxq_ids[ 2120 2120 cxgb4_port_idx(pdev) * step]; 2121 2121 set_tcp_window(ep, (struct port_info *)netdev_priv(pdev)); 2122 - dev_put(pdev); 2123 2122 } else { 2124 2123 pdev = get_real_dev(n->dev); 2125 2124 ep->l2t = cxgb4_l2t_get(cdev->rdev.lldi.l2t,

+1 -1

drivers/infiniband/hw/irdma/cm.c

··· 3631 3631 /** 3632 3632 * irdma_accept - registered call for connection to be accepted 3633 3633 * @cm_id: cm information for passive connection 3634 - * @conn_param: accpet parameters 3634 + * @conn_param: accept parameters 3635 3635 */ 3636 3636 int irdma_accept(struct iw_cm_id *cm_id, struct iw_cm_conn_param *conn_param) 3637 3637 {

+2

drivers/infiniband/sw/siw/siw_qp_tx.c

··· 331 331 msg.msg_flags &= ~MSG_MORE; 332 332 333 333 tcp_rate_check_app_limited(sk); 334 + if (!sendpage_ok(page[i])) 335 + msg.msg_flags &= ~MSG_SPLICE_PAGES; 334 336 bvec_set_page(&bvec, page[i], bytes, offset); 335 337 iov_iter_bvec(&msg.msg_iter, ITER_SOURCE, &bvec, 1, size); 336 338

+68 -12

drivers/infiniband/ulp/srpt/ib_srpt.c

··· 68 68 static u64 srpt_service_guid; 69 69 static DEFINE_SPINLOCK(srpt_dev_lock); /* Protects srpt_dev_list. */ 70 70 static LIST_HEAD(srpt_dev_list); /* List of srpt_device structures. */ 71 + static DEFINE_MUTEX(srpt_mc_mutex); /* Protects srpt_memory_caches. */ 72 + static DEFINE_XARRAY(srpt_memory_caches); /* See also srpt_memory_cache_entry */ 71 73 72 74 static unsigned srp_max_req_size = DEFAULT_MAX_REQ_SIZE; 73 75 module_param(srp_max_req_size, int, 0444); ··· 106 104 static void srpt_recv_done(struct ib_cq *cq, struct ib_wc *wc); 107 105 static void srpt_send_done(struct ib_cq *cq, struct ib_wc *wc); 108 106 static void srpt_process_wait_list(struct srpt_rdma_ch *ch); 107 + 108 + /* Type of the entries in srpt_memory_caches. */ 109 + struct srpt_memory_cache_entry { 110 + refcount_t ref; 111 + struct kmem_cache *c; 112 + }; 113 + 114 + static struct kmem_cache *srpt_cache_get(unsigned int object_size) 115 + { 116 + struct srpt_memory_cache_entry *e; 117 + char name[32]; 118 + void *res; 119 + 120 + guard(mutex)(&srpt_mc_mutex); 121 + e = xa_load(&srpt_memory_caches, object_size); 122 + if (e) { 123 + refcount_inc(&e->ref); 124 + return e->c; 125 + } 126 + snprintf(name, sizeof(name), "srpt-%u", object_size); 127 + e = kmalloc(sizeof(*e), GFP_KERNEL); 128 + if (!e) 129 + return NULL; 130 + refcount_set(&e->ref, 1); 131 + e->c = kmem_cache_create(name, object_size, /*align=*/512, 0, NULL); 132 + if (!e->c) 133 + goto free_entry; 134 + res = xa_store(&srpt_memory_caches, object_size, e, GFP_KERNEL); 135 + if (xa_is_err(res)) 136 + goto destroy_cache; 137 + return e->c; 138 + 139 + destroy_cache: 140 + kmem_cache_destroy(e->c); 141 + 142 + free_entry: 143 + kfree(e); 144 + return NULL; 145 + } 146 + 147 + static void srpt_cache_put(struct kmem_cache *c) 148 + { 149 + struct srpt_memory_cache_entry *e = NULL; 150 + unsigned long object_size; 151 + 152 + guard(mutex)(&srpt_mc_mutex); 153 + xa_for_each(&srpt_memory_caches, object_size, e) 154 + if (e->c == c) 155 + break; 156 + if (WARN_ON_ONCE(!e)) 157 + return; 158 + if (!refcount_dec_and_test(&e->ref)) 159 + return; 160 + WARN_ON_ONCE(xa_erase(&srpt_memory_caches, object_size) != e); 161 + kmem_cache_destroy(e->c); 162 + kfree(e); 163 + } 109 164 110 165 /* 111 166 * The only allowed channel state changes are those that change the channel ··· 2178 2119 ch->sport->sdev, ch->rq_size, 2179 2120 ch->rsp_buf_cache, DMA_TO_DEVICE); 2180 2121 2181 - kmem_cache_destroy(ch->rsp_buf_cache); 2122 + srpt_cache_put(ch->rsp_buf_cache); 2182 2123 2183 2124 srpt_free_ioctx_ring((struct srpt_ioctx **)ch->ioctx_recv_ring, 2184 2125 sdev, ch->rq_size, 2185 2126 ch->req_buf_cache, DMA_FROM_DEVICE); 2186 2127 2187 - kmem_cache_destroy(ch->req_buf_cache); 2128 + srpt_cache_put(ch->req_buf_cache); 2188 2129 2189 2130 kref_put(&ch->kref, srpt_free_ch); 2190 2131 } ··· 2304 2245 INIT_LIST_HEAD(&ch->cmd_wait_list); 2305 2246 ch->max_rsp_size = ch->sport->port_attrib.srp_max_rsp_size; 2306 2247 2307 - ch->rsp_buf_cache = kmem_cache_create("srpt-rsp-buf", ch->max_rsp_size, 2308 - 512, 0, NULL); 2248 + ch->rsp_buf_cache = srpt_cache_get(ch->max_rsp_size); 2309 2249 if (!ch->rsp_buf_cache) 2310 2250 goto free_ch; 2311 2251 ··· 2338 2280 alignment_offset = round_up(imm_data_offset, 512) - 2339 2281 imm_data_offset; 2340 2282 req_sz = alignment_offset + imm_data_offset + srp_max_req_size; 2341 - ch->req_buf_cache = kmem_cache_create("srpt-req-buf", req_sz, 2342 - 512, 0, NULL); 2283 + ch->req_buf_cache = srpt_cache_get(req_sz); 2343 2284 if (!ch->req_buf_cache) 2344 2285 goto free_rsp_ring; 2345 2286 ··· 2535 2478 ch->req_buf_cache, DMA_FROM_DEVICE); 2536 2479 2537 2480 free_recv_cache: 2538 - kmem_cache_destroy(ch->req_buf_cache); 2481 + srpt_cache_put(ch->req_buf_cache); 2539 2482 2540 2483 free_rsp_ring: 2541 2484 srpt_free_ioctx_ring((struct srpt_ioctx **)ch->ioctx_ring, ··· 2543 2486 ch->rsp_buf_cache, DMA_TO_DEVICE); 2544 2487 2545 2488 free_rsp_cache: 2546 - kmem_cache_destroy(ch->rsp_buf_cache); 2489 + srpt_cache_put(ch->rsp_buf_cache); 2547 2490 2548 2491 free_ch: 2549 2492 if (rdma_cm_id) ··· 3112 3055 srpt_free_ioctx_ring((struct srpt_ioctx **)sdev->ioctx_ring, sdev, 3113 3056 sdev->srq_size, sdev->req_buf_cache, 3114 3057 DMA_FROM_DEVICE); 3115 - kmem_cache_destroy(sdev->req_buf_cache); 3058 + srpt_cache_put(sdev->req_buf_cache); 3116 3059 sdev->srq = NULL; 3117 3060 } 3118 3061 ··· 3139 3082 pr_debug("create SRQ #wr= %d max_allow=%d dev= %s\n", sdev->srq_size, 3140 3083 sdev->device->attrs.max_srq_wr, dev_name(&device->dev)); 3141 3084 3142 - sdev->req_buf_cache = kmem_cache_create("srpt-srq-req-buf", 3143 - srp_max_req_size, 0, 0, NULL); 3085 + sdev->req_buf_cache = srpt_cache_get(srp_max_req_size); 3144 3086 if (!sdev->req_buf_cache) 3145 3087 goto free_srq; 3146 3088 ··· 3161 3105 return 0; 3162 3106 3163 3107 free_cache: 3164 - kmem_cache_destroy(sdev->req_buf_cache); 3108 + srpt_cache_put(sdev->req_buf_cache); 3165 3109 3166 3110 free_srq: 3167 3111 ib_destroy_srq(srq);

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