Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
phy: qcom-qmp-pcie: rename the sm8450 gen3 PHY config tables
SM8350 PHY config tables are mostly the same as SM8450 gen3 PHY config
tables. Rename generic tables to remove x1 suffix.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20221118233242.2904088-6-dmitry.baryshkov@linaro.org
Signed-off-by: Vinod Koul <vkoul@kernel.org>
authored by
Dmitry Baryshkov
and committed by
Vinod Koul
c99649c3
d8de49e9
+9
-9
+9
-9
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
+9
-9
drivers/phy/qualcomm/phy-qcom-qmp-pcie.c
···
1216
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QMP_PHY_INIT_CFG(QPHY_V4_20_PCS_LANE1_INSIG_MX_CTRL2, 0x00),
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1217
};
1218
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1219
-
static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_serdes_tbl[] = {
1219
+
static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_serdes_tbl[] = {
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QMP_PHY_INIT_CFG(QSERDES_V5_COM_SYSCLK_EN_SEL, 0x08),
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QMP_PHY_INIT_CFG(QSERDES_V5_COM_CLK_SELECT, 0x34),
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QMP_PHY_INIT_CFG(QSERDES_V5_COM_CORECLK_DIV_MODE1, 0x08),
···
1272
1272
QMP_PHY_INIT_CFG(QSERDES_V5_TX_RES_CODE_LANE_OFFSET_RX, 0x04),
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1273
};
1274
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1275
-
static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_rx_tbl[] = {
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+
static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_rx_tbl[] = {
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QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_LOW, 0x7f),
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QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH, 0xff),
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QMP_PHY_INIT_CFG(QSERDES_V5_RX_RX_MODE_00_HIGH4, 0xd8),
···
1300
1300
QMP_PHY_INIT_CFG(QSERDES_V5_RX_UCDR_SO_GAIN, 0x05),
1301
1301
};
1302
1302
1303
-
static const struct qmp_phy_init_tbl sm8450_qmp_gen3x1_pcie_pcs_tbl[] = {
1303
+
static const struct qmp_phy_init_tbl sm8450_qmp_gen3_pcie_pcs_tbl[] = {
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QMP_PHY_INIT_CFG(QPHY_V5_PCS_RX_SIGDET_LVL, 0x77),
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QMP_PHY_INIT_CFG(QPHY_V5_PCS_RATE_SLEW_CNTRL1, 0x0b),
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QMP_PHY_INIT_CFG(QPHY_V5_PCS_REFGEN_REQ_CONFIG1, 0x05),
···
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2025
.lanes = 1,
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.tbls = {
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-
.serdes = sm8450_qmp_gen3x1_pcie_serdes_tbl,
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-
.serdes_num = ARRAY_SIZE(sm8450_qmp_gen3x1_pcie_serdes_tbl),
2028
+
.serdes = sm8450_qmp_gen3_pcie_serdes_tbl,
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+
.serdes_num = ARRAY_SIZE(sm8450_qmp_gen3_pcie_serdes_tbl),
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.tx = sm8450_qmp_gen3x1_pcie_tx_tbl,
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.tx_num = ARRAY_SIZE(sm8450_qmp_gen3x1_pcie_tx_tbl),
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-
.rx = sm8450_qmp_gen3x1_pcie_rx_tbl,
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-
.rx_num = ARRAY_SIZE(sm8450_qmp_gen3x1_pcie_rx_tbl),
2034
-
.pcs = sm8450_qmp_gen3x1_pcie_pcs_tbl,
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-
.pcs_num = ARRAY_SIZE(sm8450_qmp_gen3x1_pcie_pcs_tbl),
2032
+
.rx = sm8450_qmp_gen3_pcie_rx_tbl,
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+
.rx_num = ARRAY_SIZE(sm8450_qmp_gen3_pcie_rx_tbl),
2034
+
.pcs = sm8450_qmp_gen3_pcie_pcs_tbl,
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+
.pcs_num = ARRAY_SIZE(sm8450_qmp_gen3_pcie_pcs_tbl),
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.pcs_misc = sm8450_qmp_gen3x1_pcie_pcs_misc_tbl,
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.pcs_misc_num = ARRAY_SIZE(sm8450_qmp_gen3x1_pcie_pcs_misc_tbl),
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},