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dt-bindings: soc: fsl: cpm_qe: convert network.txt to yaml
Convert binding doc newwork.txt to yaml format.
HDLC part:
- Convert to "fsl,ucc-hdlc.yaml".
- Add missed reg and interrupt property.
- Update example to pass build.
ethernet part:
- Convert to net/fsl,cpm-enet.yaml
- Add 0x in example, which should be hex value
- Add ref to ethernet-controller.yaml
mdio part:
- Convert to net/fsl,cpm-mdio.yaml
- Add 0x in example, which should be hex value
- Add ref to mdio.yaml
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Jakub Kicinski <kuba@kernel.org>
Link: https://lore.kernel.org/r/20240812165041.3815525-1-Frank.Li@nxp.com
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
authored by
Frank Li
and committed by
Rob Herring (Arm)
ca35f283
3496d2d0
+254
-130
+59
Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml
+59
Documentation/devicetree/bindings/net/fsl,cpm-enet.yaml
···
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+
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,cpm-enet.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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7
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title: Network for cpm enet
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+
9
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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+
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properties:
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compatible:
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oneOf:
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- enum:
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- fsl,cpm1-scc-enet
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+
- fsl,cpm2-scc-enet
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+
- fsl,cpm1-fec-enet
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+
- fsl,cpm2-fcc-enet
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- fsl,qe-enet
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+
- items:
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+
- enum:
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- fsl,mpc8272-fcc-enet
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+
- const: fsl,cpm2-fcc-enet
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+
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reg:
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minItems: 1
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+
maxItems: 3
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+
30
+
interrupts:
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maxItems: 1
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fsl,cpm-command:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: cpm command
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+
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required:
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- compatible
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- reg
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- interrupts
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+
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allOf:
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- $ref: ethernet-controller.yaml
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+
unevaluatedProperties: false
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+
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examples:
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- |
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ethernet@11300 {
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compatible = "fsl,mpc8272-fcc-enet",
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"fsl,cpm2-fcc-enet";
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reg = <0x11300 0x20 0x8400 0x100 0x11390 1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
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interrupts = <20 8>;
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+
interrupt-parent = <&pic>;
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+
phy-handle = <&phy0>;
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+
fsl,cpm-command = <0x12000300>;
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};
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+55
Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml
+55
Documentation/devicetree/bindings/net/fsl,cpm-mdio.yaml
···
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/net/fsl,cpm-mdio.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Freescale CPM MDIO Device
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+
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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+
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properties:
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compatible:
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oneOf:
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+
- enum:
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- fsl,pq1-fec-mdio
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+
- fsl,cpm2-mdio-bitbang
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+
- items:
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- const: fsl,mpc8272ads-mdio-bitbang
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- const: fsl,mpc8272-mdio-bitbang
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- const: fsl,cpm2-mdio-bitbang
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+
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reg:
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maxItems: 1
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+
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fsl,mdio-pin:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: pin of port C controlling mdio data
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+
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fsl,mdc-pin:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: pin of port C controlling mdio clock
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+
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required:
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- compatible
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- reg
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+
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allOf:
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- $ref: mdio.yaml#
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unevaluatedProperties: false
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+
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examples:
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- |
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mdio@10d40 {
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compatible = "fsl,mpc8272ads-mdio-bitbang",
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"fsl,mpc8272-mdio-bitbang",
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"fsl,cpm2-mdio-bitbang";
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reg = <0x10d40 0x14>;
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+
#address-cells = <1>;
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+
#size-cells = <0>;
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+
fsl,mdio-pin = <12>;
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+
fsl,mdc-pin = <13>;
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+
};
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+
+140
Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml
+140
Documentation/devicetree/bindings/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml
···
1
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/soc/fsl/cpm_qe/fsl,ucc-hdlc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: High-Level Data Link Control(HDLC)
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description: HDLC part in Universal communication controllers (UCCs)
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+
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maintainers:
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- Frank Li <Frank.Li@nxp.com>
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+
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properties:
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compatible:
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const: fsl,ucc-hdlc
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+
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reg:
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maxItems: 1
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+
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interrupts:
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maxItems: 1
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+
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cell-index:
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$ref: /schemas/types.yaml#/definitions/uint32
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+
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rx-clock-name:
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$ref: /schemas/types.yaml#/definitions/string
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oneOf:
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- pattern: "^brg([0-9]|1[0-6])$"
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- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
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+
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tx-clock-name:
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$ref: /schemas/types.yaml#/definitions/string
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oneOf:
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- pattern: "^brg([0-9]|1[0-6])$"
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- pattern: "^clk([0-9]|1[0-9]|2[0-4])$"
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+
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fsl,tdm-interface:
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$ref: /schemas/types.yaml#/definitions/flag
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description: Specify that hdlc is based on tdm-interface
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+
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fsl,rx-sync-clock:
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$ref: /schemas/types.yaml#/definitions/string
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description: rx-sync
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enum:
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- none
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- rsync_pin
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+
- brg9
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+
- brg10
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- brg11
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+
- brg13
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- brg14
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- brg15
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+
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fsl,tx-sync-clock:
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$ref: /schemas/types.yaml#/definitions/string
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description: tx-sync
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enum:
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- none
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- tsync_pin
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- brg9
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+
- brg10
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- brg11
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- brg13
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+
- brg14
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- brg15
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+
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fsl,tdm-framer-type:
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$ref: /schemas/types.yaml#/definitions/string
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description: required for tdm interface
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enum: [e1, t1]
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+
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fsl,tdm-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: number of TDM ID
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+
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+
fsl,tx-timeslot-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface.
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time slot mask for TDM operation. Indicates which time
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slots used for transmitting and receiving.
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+
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fsl,rx-timeslot-mask:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface.
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time slot mask for TDM operation. Indicates which time
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slots used for transmitting and receiving.
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+
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fsl,siram-entry-id:
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$ref: /schemas/types.yaml#/definitions/uint32
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description:
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required for tdm interface
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Must be 0,2,4...64. the number of TDM entry.
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+
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fsl,tdm-internal-loopback:
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$ref: /schemas/types.yaml#/definitions/flag
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description:
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optional for tdm interface
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Internal loopback connecting on TDM layer.
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+
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fsl,hmask:
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$ref: /schemas/types.yaml#/definitions/uint16
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description: |
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HDLC address recognition. Set to zero to disable
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address filtering of packets:
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fsl,hmask = /bits/ 16 <0x0000>;
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required:
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- compatible
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- reg
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additionalProperties: false
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examples:
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- |
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communication@2000 {
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compatible = "fsl,ucc-hdlc";
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reg = <0x2000 0x200>;
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rx-clock-name = "clk8";
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+
tx-clock-name = "clk9";
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+
fsl,rx-sync-clock = "rsync_pin";
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+
fsl,tx-sync-clock = "tsync_pin";
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fsl,tx-timeslot-mask = <0xfffffffe>;
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+
fsl,rx-timeslot-mask = <0xfffffffe>;
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+
fsl,tdm-framer-type = "e1";
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+
fsl,tdm-id = <0>;
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+
fsl,siram-entry-id = <0>;
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fsl,tdm-interface;
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};
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- |
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communication@2000 {
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compatible = "fsl,ucc-hdlc";
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reg = <0x2000 0x200>;
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rx-clock-name = "brg1";
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+
tx-clock-name = "brg1";
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+
};
-130
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
-130
Documentation/devicetree/bindings/soc/fsl/cpm_qe/network.txt
···
1
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* Network
2
-
3
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Currently defined compatibles:
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- fsl,cpm1-scc-enet
5
-
- fsl,cpm2-scc-enet
6
-
- fsl,cpm1-fec-enet
7
-
- fsl,cpm2-fcc-enet (third resource is GFEMR)
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- fsl,qe-enet
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-
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Example:
11
-
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ethernet@11300 {
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compatible = "fsl,mpc8272-fcc-enet",
14
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"fsl,cpm2-fcc-enet";
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reg = <11300 20 8400 100 11390 1>;
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local-mac-address = [ 00 00 00 00 00 00 ];
17
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interrupts = <20 8>;
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interrupt-parent = <&PIC>;
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-
phy-handle = <&PHY0>;
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-
fsl,cpm-command = <12000300>;
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};
22
-
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* MDIO
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-
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Currently defined compatibles:
26
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fsl,pq1-fec-mdio (reg is same as first resource of FEC device)
27
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fsl,cpm2-mdio-bitbang (reg is port C registers)
28
-
29
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Properties for fsl,cpm2-mdio-bitbang:
30
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fsl,mdio-pin : pin of port C controlling mdio data
31
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fsl,mdc-pin : pin of port C controlling mdio clock
32
-
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Example:
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mdio@10d40 {
35
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compatible = "fsl,mpc8272ads-mdio-bitbang",
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"fsl,mpc8272-mdio-bitbang",
37
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"fsl,cpm2-mdio-bitbang";
38
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reg = <10d40 14>;
39
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#address-cells = <1>;
40
-
#size-cells = <0>;
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fsl,mdio-pin = <12>;
42
-
fsl,mdc-pin = <13>;
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};
44
-
45
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* HDLC
46
-
47
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Currently defined compatibles:
48
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- fsl,ucc-hdlc
49
-
50
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Properties for fsl,ucc-hdlc:
51
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- rx-clock-name
52
-
- tx-clock-name
53
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Usage: required
54
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Value type: <string>
55
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Definition : Must be "brg1"-"brg16" for internal clock source,
56
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Must be "clk1"-"clk24" for external clock source.
57
-
58
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- fsl,tdm-interface
59
-
Usage: optional
60
-
Value type: <empty>
61
-
Definition : Specify that hdlc is based on tdm-interface
62
-
63
-
The property below is dependent on fsl,tdm-interface:
64
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- fsl,rx-sync-clock
65
-
Usage: required
66
-
Value type: <string>
67
-
Definition : Must be "none", "rsync_pin", "brg9-11" and "brg13-15".
68
-
69
-
- fsl,tx-sync-clock
70
-
Usage: required
71
-
Value type: <string>
72
-
Definition : Must be "none", "tsync_pin", "brg9-11" and "brg13-15".
73
-
74
-
- fsl,tdm-framer-type
75
-
Usage: required for tdm interface
76
-
Value type: <string>
77
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Definition : "e1" or "t1".Now e1 and t1 are used, other framer types
78
-
are not supported.
79
-
80
-
- fsl,tdm-id
81
-
Usage: required for tdm interface
82
-
Value type: <u32>
83
-
Definition : number of TDM ID
84
-
85
-
- fsl,tx-timeslot-mask
86
-
- fsl,rx-timeslot-mask
87
-
Usage: required for tdm interface
88
-
Value type: <u32>
89
-
Definition : time slot mask for TDM operation. Indicates which time
90
-
slots used for transmitting and receiving.
91
-
92
-
- fsl,siram-entry-id
93
-
Usage: required for tdm interface
94
-
Value type: <u32>
95
-
Definition : Must be 0,2,4...64. the number of TDM entry.
96
-
97
-
- fsl,tdm-internal-loopback
98
-
usage: optional for tdm interface
99
-
value type: <empty>
100
-
Definition : Internal loopback connecting on TDM layer.
101
-
- fsl,hmask
102
-
usage: optional
103
-
Value type: <u16>
104
-
Definition: HDLC address recognition. Set to zero to disable
105
-
address filtering of packets:
106
-
fsl,hmask = /bits/ 16 <0x0000>;
107
-
108
-
Example for tdm interface:
109
-
110
-
ucc@2000 {
111
-
compatible = "fsl,ucc-hdlc";
112
-
rx-clock-name = "clk8";
113
-
tx-clock-name = "clk9";
114
-
fsl,rx-sync-clock = "rsync_pin";
115
-
fsl,tx-sync-clock = "tsync_pin";
116
-
fsl,tx-timeslot-mask = <0xfffffffe>;
117
-
fsl,rx-timeslot-mask = <0xfffffffe>;
118
-
fsl,tdm-framer-type = "e1";
119
-
fsl,tdm-id = <0>;
120
-
fsl,siram-entry-id = <0>;
121
-
fsl,tdm-interface;
122
-
};
123
-
124
-
Example for hdlc without tdm interface:
125
-
126
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ucc@2000 {
127
-
compatible = "fsl,ucc-hdlc";
128
-
rx-clock-name = "brg1";
129
-
tx-clock-name = "brg1";
130
-
};