tjh.dev / kernel
Linux kernel mirror (for testing) git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel os linux
1
fork

Configure Feed

Select the types of activity you want to include in your feed.

i3c: mipi-i3c-hci: Refactor PIO register initialization

Move the PIO register setup logic out of hci_pio_init() into a new
helper, __hci_pio_init(). This refactoring prepares for Runtime PM
support by allowing PIO registers to be reinitialized independently
after resume.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Frank Li <Frank.Li@nxp.com>
Link: https://patch.msgid.link/20260113072702.16268-13-adrian.hunter@intel.com
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>

authored by

Adrian Hunter and committed by
Alexandre Belloni ca4d4682 81695872

+28 -17
+28 -17
drivers/i3c/master/mipi-i3c-hci/pio.c
··· 135 135 u32 enabled_irqs; 136 136 }; 137 137 138 - static int hci_pio_init(struct i3c_hci *hci) 138 + static void __hci_pio_init(struct i3c_hci *hci, u32 *size_val_ptr) 139 139 { 140 - struct hci_pio_data *pio; 141 140 u32 val, size_val, rx_thresh, tx_thresh, ibi_val; 142 - 143 - pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL); 144 - if (!pio) 145 - return -ENOMEM; 146 - 147 - hci->io_data = pio; 148 - spin_lock_init(&pio->lock); 141 + struct hci_pio_data *pio = hci->io_data; 149 142 150 143 size_val = pio_reg_read(QUEUE_SIZE); 151 - dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n", 152 - FIELD_GET(CR_QUEUE_SIZE, size_val)); 153 - dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n", 154 - 4 * FIELD_GET(IBI_STATUS_SIZE, size_val)); 155 - dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n", 156 - 4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val))); 157 - dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n", 158 - 4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val))); 144 + if (size_val_ptr) 145 + *size_val_ptr = size_val; 159 146 160 147 /* 161 148 * Let's initialize data thresholds to half of the actual FIFO size. ··· 188 201 189 202 /* Always accept error interrupts (will be activated on first xfer) */ 190 203 pio->enabled_irqs = STAT_ALL_ERRORS; 204 + } 205 + 206 + static int hci_pio_init(struct i3c_hci *hci) 207 + { 208 + struct hci_pio_data *pio; 209 + u32 size_val; 210 + 211 + pio = devm_kzalloc(hci->master.dev.parent, sizeof(*pio), GFP_KERNEL); 212 + if (!pio) 213 + return -ENOMEM; 214 + 215 + hci->io_data = pio; 216 + spin_lock_init(&pio->lock); 217 + 218 + __hci_pio_init(hci, &size_val); 219 + 220 + dev_dbg(&hci->master.dev, "CMD/RESP FIFO = %ld entries\n", 221 + FIELD_GET(CR_QUEUE_SIZE, size_val)); 222 + dev_dbg(&hci->master.dev, "IBI FIFO = %ld bytes\n", 223 + 4 * FIELD_GET(IBI_STATUS_SIZE, size_val)); 224 + dev_dbg(&hci->master.dev, "RX data FIFO = %d bytes\n", 225 + 4 * (2 << FIELD_GET(RX_DATA_BUFFER_SIZE, size_val))); 226 + dev_dbg(&hci->master.dev, "TX data FIFO = %d bytes\n", 227 + 4 * (2 << FIELD_GET(TX_DATA_BUFFER_SIZE, size_val))); 191 228 192 229 return 0; 193 230 }