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genirq: mark io_apic level interrupts to avoid resend

Level type interrupts do not need to be resent. It was also found that
some chipsets get confused in case of the resend.

Mark the ioapic level type interrupts as such to avoid the resend
functionality in the generic irq code.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>

authored by

Thomas Gleixner and committed by
Linus Torvalds
cc75b92d 2464286a

+10 -4
+5 -2
arch/i386/kernel/io_apic.c
··· 1256 1256 static void ioapic_register_intr(int irq, int vector, unsigned long trigger) 1257 1257 { 1258 1258 if ((trigger == IOAPIC_AUTO && IO_APIC_irq_trigger(irq)) || 1259 - trigger == IOAPIC_LEVEL) 1259 + trigger == IOAPIC_LEVEL) { 1260 + irq_desc[irq].status |= IRQ_LEVEL; 1260 1261 set_irq_chip_and_handler_name(irq, &ioapic_chip, 1261 1262 handle_fasteoi_irq, "fasteoi"); 1262 - else 1263 + } else { 1264 + irq_desc[irq].status &= ~IRQ_LEVEL; 1263 1265 set_irq_chip_and_handler_name(irq, &ioapic_chip, 1264 1266 handle_edge_irq, "edge"); 1267 + } 1265 1268 set_intr_gate(vector, interrupt[irq]); 1266 1269 } 1267 1270
+5 -2
arch/x86_64/kernel/io_apic.c
··· 800 800 801 801 static void ioapic_register_intr(int irq, unsigned long trigger) 802 802 { 803 - if (trigger) 803 + if (trigger) { 804 + irq_desc[irq].status |= IRQ_LEVEL; 804 805 set_irq_chip_and_handler_name(irq, &ioapic_chip, 805 806 handle_fasteoi_irq, "fasteoi"); 806 - else 807 + } else { 808 + irq_desc[irq].status &= ~IRQ_LEVEL; 807 809 set_irq_chip_and_handler_name(irq, &ioapic_chip, 808 810 handle_edge_irq, "edge"); 811 + } 809 812 } 810 813 811 814 static void setup_IO_APIC_irq(int apic, int pin, unsigned int irq,