Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'for-linus-20150310' of git://git.infradead.org/linux-mtd
Pull MTD fixes from Brian Norris:
* pxa3xx_nand
- fix timeout issues when draining the FIFO (BCH only)
- don't crash when no chip-selects are used
* hisi504_nand
- depend on HAS_DMA, to fix compile errors
* tag 'for-linus-20150310' of git://git.infradead.org/linux-mtd:
mtd: nand: MTD_NAND_HISI504 should depend on HAS_DMA
mtd: pxa3xx_nand: fix driver when num_cs is 0
mtd: nand: pxa3xx: Fix PIO FIFO draining
+45
-6
+1
drivers/mtd/nand/Kconfig
+1
drivers/mtd/nand/Kconfig
+44
-6
drivers/mtd/nand/pxa3xx_nand.c
+44
-6
drivers/mtd/nand/pxa3xx_nand.c
···
480
480
nand_writel(info, NDCR, ndcr | int_mask);
481
481
}
482
482
483
+
static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
484
+
{
485
+
if (info->ecc_bch) {
486
+
int timeout;
487
+
488
+
/*
489
+
* According to the datasheet, when reading from NDDB
490
+
* with BCH enabled, after each 32 bytes reads, we
491
+
* have to make sure that the NDSR.RDDREQ bit is set.
492
+
*
493
+
* Drain the FIFO 8 32 bits reads at a time, and skip
494
+
* the polling on the last read.
495
+
*/
496
+
while (len > 8) {
497
+
__raw_readsl(info->mmio_base + NDDB, data, 8);
498
+
499
+
for (timeout = 0;
500
+
!(nand_readl(info, NDSR) & NDSR_RDDREQ);
501
+
timeout++) {
502
+
if (timeout >= 5) {
503
+
dev_err(&info->pdev->dev,
504
+
"Timeout on RDDREQ while draining the FIFO\n");
505
+
return;
506
+
}
507
+
508
+
mdelay(1);
509
+
}
510
+
511
+
data += 32;
512
+
len -= 8;
513
+
}
514
+
}
515
+
516
+
__raw_readsl(info->mmio_base + NDDB, data, len);
517
+
}
518
+
483
519
static void handle_data_pio(struct pxa3xx_nand_info *info)
484
520
{
485
521
unsigned int do_bytes = min(info->data_size, info->chunk_size);
···
532
496
DIV_ROUND_UP(info->oob_size, 4));
533
497
break;
534
498
case STATE_PIO_READING:
535
-
__raw_readsl(info->mmio_base + NDDB,
536
-
info->data_buff + info->data_buff_pos,
537
-
DIV_ROUND_UP(do_bytes, 4));
499
+
drain_fifo(info,
500
+
info->data_buff + info->data_buff_pos,
501
+
DIV_ROUND_UP(do_bytes, 4));
538
502
539
503
if (info->oob_size > 0)
540
-
__raw_readsl(info->mmio_base + NDDB,
541
-
info->oob_buff + info->oob_buff_pos,
542
-
DIV_ROUND_UP(info->oob_size, 4));
504
+
drain_fifo(info,
505
+
info->oob_buff + info->oob_buff_pos,
506
+
DIV_ROUND_UP(info->oob_size, 4));
543
507
break;
544
508
default:
545
509
dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
···
1608
1572
int ret, irq, cs;
1609
1573
1610
1574
pdata = dev_get_platdata(&pdev->dev);
1575
+
if (pdata->num_cs <= 0)
1576
+
return -ENODEV;
1611
1577
info = devm_kzalloc(&pdev->dev, sizeof(*info) + (sizeof(*mtd) +
1612
1578
sizeof(*host)) * pdata->num_cs, GFP_KERNEL);
1613
1579
if (!info)