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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net: (47 commits)
tg3: Fix single-vector MSI-X code
openvswitch: Fix multipart datapath dumps.
ipv6: fix per device IP snmp counters
inetpeer: initialize ->redirect_genid in inet_getpeer()
net: fix NULL-deref in WARN() in skb_gso_segment()
net: WARN if skb_checksum_help() is called on skb requiring segmentation
caif: Remove bad WARN_ON in caif_dev
caif: Fix typo in Vendor/Product-ID for CAIF modems
bnx2x: Disable AN KR work-around for BCM57810
bnx2x: Remove AutoGrEEEn for BCM84833
bnx2x: Remove 100Mb force speed for BCM84833
bnx2x: Fix PFC setting on BCM57840
bnx2x: Fix Super-Isolate mode for BCM84833
net: fix some sparse errors
net: kill duplicate included header
net: sh-eth: Fix build error by the value which is not defined
net: Use device model to get driver name in skb_gso_segment()
bridge: BH already disabled in br_fdb_cleanup()
net: move sock_update_memcg outside of CONFIG_INET
mwl8k: Fixing Sparse ENDIAN CHECK warning
...

+437 -388
+3
Documentation/devices.txt
··· 447 447 234 = /dev/btrfs-control Btrfs control device 448 448 235 = /dev/autofs Autofs control device 449 449 236 = /dev/mapper/control Device-Mapper control device 450 + 237 = /dev/loop-control Loopback control device 451 + 238 = /dev/vhost-net Host kernel accelerator for virtio net 452 + 450 453 240-254 Reserved for local use 451 454 255 Reserved for MISC_DYNAMIC_MINOR 452 455
+8 -7
MAINTAINERS
··· 1412 1412 B43 WIRELESS DRIVER 1413 1413 M: Stefano Brivio <stefano.brivio@polimi.it> 1414 1414 L: linux-wireless@vger.kernel.org 1415 + L: b43-dev@lists.infradead.org (moderated for non-subscribers) 1415 1416 W: http://linuxwireless.org/en/users/Drivers/b43 1416 1417 S: Maintained 1417 1418 F: drivers/net/wireless/b43/ ··· 1588 1587 L: linux-scsi@vger.kernel.org 1589 1588 S: Supported 1590 1589 F: drivers/scsi/bnx2fc/ 1590 + 1591 + BROADCOM SPECIFIC AMBA DRIVER (BCMA) 1592 + M: Rafał Miłecki <zajec5@gmail.com> 1593 + L: linux-wireless@vger.kernel.org 1594 + S: Maintained 1595 + F: drivers/bcma/ 1596 + F: include/linux/bcma/ 1591 1597 1592 1598 BROCADE BFA FC SCSI DRIVER 1593 1599 M: Jing Huang <huangj@brocade.com> ··· 6124 6116 S: Maintained 6125 6117 F: drivers/ssb/ 6126 6118 F: include/linux/ssb/ 6127 - 6128 - BROADCOM SPECIFIC AMBA DRIVER (BCMA) 6129 - M: Rafał Miłecki <zajec5@gmail.com> 6130 - L: linux-wireless@vger.kernel.org 6131 - S: Maintained 6132 - F: drivers/bcma/ 6133 - F: include/linux/bcma/ 6134 6119 6135 6120 SONY VAIO CONTROL DEVICE DRIVER 6136 6121 M: Mattia Dongili <malattia@linux.it>
+1
drivers/bcma/bcma_private.h
··· 19 19 struct bcma_device *core_cc, 20 20 struct bcma_device *core_mips); 21 21 #ifdef CONFIG_PM 22 + int bcma_bus_suspend(struct bcma_bus *bus); 22 23 int bcma_bus_resume(struct bcma_bus *bus); 23 24 #endif 24 25
+19 -26
drivers/bcma/host_pci.c
··· 235 235 } 236 236 237 237 #ifdef CONFIG_PM 238 - static int bcma_host_pci_suspend(struct pci_dev *dev, pm_message_t state) 238 + static int bcma_host_pci_suspend(struct device *dev) 239 239 { 240 - /* Host specific */ 241 - pci_save_state(dev); 242 - pci_disable_device(dev); 243 - pci_set_power_state(dev, pci_choose_state(dev, state)); 240 + struct pci_dev *pdev = to_pci_dev(dev); 241 + struct bcma_bus *bus = pci_get_drvdata(pdev); 244 242 245 - return 0; 243 + bus->mapped_core = NULL; 244 + 245 + return bcma_bus_suspend(bus); 246 246 } 247 247 248 - static int bcma_host_pci_resume(struct pci_dev *dev) 248 + static int bcma_host_pci_resume(struct device *dev) 249 249 { 250 - struct bcma_bus *bus = pci_get_drvdata(dev); 251 - int err; 250 + struct pci_dev *pdev = to_pci_dev(dev); 251 + struct bcma_bus *bus = pci_get_drvdata(pdev); 252 252 253 - /* Host specific */ 254 - pci_set_power_state(dev, 0); 255 - err = pci_enable_device(dev); 256 - if (err) 257 - return err; 258 - pci_restore_state(dev); 259 - 260 - /* Bus specific */ 261 - err = bcma_bus_resume(bus); 262 - if (err) 263 - return err; 264 - 265 - return 0; 253 + return bcma_bus_resume(bus); 266 254 } 255 + 256 + static SIMPLE_DEV_PM_OPS(bcma_pm_ops, bcma_host_pci_suspend, 257 + bcma_host_pci_resume); 258 + #define BCMA_PM_OPS (&bcma_pm_ops) 259 + 267 260 #else /* CONFIG_PM */ 268 - # define bcma_host_pci_suspend NULL 269 - # define bcma_host_pci_resume NULL 261 + 262 + #define BCMA_PM_OPS NULL 263 + 270 264 #endif /* CONFIG_PM */ 271 265 272 266 static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = { ··· 278 284 .id_table = bcma_pci_bridge_tbl, 279 285 .probe = bcma_host_pci_probe, 280 286 .remove = bcma_host_pci_remove, 281 - .suspend = bcma_host_pci_suspend, 282 - .resume = bcma_host_pci_resume, 287 + .driver.pm = BCMA_PM_OPS, 283 288 }; 284 289 285 290 int __init bcma_host_pci_init(void)
+24
drivers/bcma/main.c
··· 241 241 } 242 242 243 243 #ifdef CONFIG_PM 244 + int bcma_bus_suspend(struct bcma_bus *bus) 245 + { 246 + struct bcma_device *core; 247 + 248 + list_for_each_entry(core, &bus->cores, list) { 249 + struct device_driver *drv = core->dev.driver; 250 + if (drv) { 251 + struct bcma_driver *adrv = container_of(drv, struct bcma_driver, drv); 252 + if (adrv->suspend) 253 + adrv->suspend(core); 254 + } 255 + } 256 + return 0; 257 + } 258 + 244 259 int bcma_bus_resume(struct bcma_bus *bus) 245 260 { 246 261 struct bcma_device *core; ··· 265 250 if (core) { 266 251 bus->drv_cc.setup_done = false; 267 252 bcma_core_chipcommon_init(&bus->drv_cc); 253 + } 254 + 255 + list_for_each_entry(core, &bus->cores, list) { 256 + struct device_driver *drv = core->dev.driver; 257 + if (drv) { 258 + struct bcma_driver *adrv = container_of(drv, struct bcma_driver, drv); 259 + if (adrv->resume) 260 + adrv->resume(core); 261 + } 268 262 } 269 263 270 264 return 0;
+6 -1
drivers/net/ethernet/broadcom/bnx2x/bnx2x_ethtool.c
··· 365 365 DP(NETIF_MSG_LINK, "cfg_idx = %x\n", cfg_idx); 366 366 367 367 if (cmd->autoneg == AUTONEG_ENABLE) { 368 + u32 an_supported_speed = bp->port.supported[cfg_idx]; 369 + if (bp->link_params.phy[EXT_PHY1].type == 370 + PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) 371 + an_supported_speed |= (SUPPORTED_100baseT_Half | 372 + SUPPORTED_100baseT_Full); 368 373 if (!(bp->port.supported[cfg_idx] & SUPPORTED_Autoneg)) { 369 374 DP(NETIF_MSG_LINK, "Autoneg not supported\n"); 370 375 return -EINVAL; 371 376 } 372 377 373 378 /* advertise the requested speed and duplex if supported */ 374 - if (cmd->advertising & ~(bp->port.supported[cfg_idx])) { 379 + if (cmd->advertising & ~an_supported_speed) { 375 380 DP(NETIF_MSG_LINK, "Advertisement parameters " 376 381 "are not supported\n"); 377 382 return -EINVAL;
+176 -136
drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c
··· 2502 2502 struct bnx2x_nig_brb_pfc_port_params *nig_params) 2503 2503 { 2504 2504 u32 xcm_mask = 0, ppp_enable = 0, pause_enable = 0, llfc_out_en = 0; 2505 - u32 llfc_enable = 0, xcm0_out_en = 0, p0_hwpfc_enable = 0; 2505 + u32 llfc_enable = 0, xcm_out_en = 0, hwpfc_enable = 0; 2506 2506 u32 pkt_priority_to_cos = 0; 2507 2507 struct bnx2x *bp = params->bp; 2508 2508 u8 port = params->port; ··· 2516 2516 * MAC control frames (that are not pause packets) 2517 2517 * will be forwarded to the XCM. 2518 2518 */ 2519 - xcm_mask = REG_RD(bp, 2520 - port ? NIG_REG_LLH1_XCM_MASK : 2521 - NIG_REG_LLH0_XCM_MASK); 2519 + xcm_mask = REG_RD(bp, port ? NIG_REG_LLH1_XCM_MASK : 2520 + NIG_REG_LLH0_XCM_MASK); 2522 2521 /* 2523 2522 * nig params will override non PFC params, since it's possible to 2524 2523 * do transition from PFC to SAFC ··· 2532 2533 ppp_enable = 1; 2533 2534 xcm_mask &= ~(port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN : 2534 2535 NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN); 2535 - xcm0_out_en = 0; 2536 - p0_hwpfc_enable = 1; 2536 + xcm_out_en = 0; 2537 + hwpfc_enable = 1; 2537 2538 } else { 2538 2539 if (nig_params) { 2539 2540 llfc_out_en = nig_params->llfc_out_en; ··· 2544 2545 2545 2546 xcm_mask |= (port ? NIG_LLH1_XCM_MASK_REG_LLH1_XCM_MASK_BCN : 2546 2547 NIG_LLH0_XCM_MASK_REG_LLH0_XCM_MASK_BCN); 2547 - xcm0_out_en = 1; 2548 + xcm_out_en = 1; 2548 2549 } 2549 2550 2550 2551 if (CHIP_IS_E3(bp)) ··· 2563 2564 REG_WR(bp, port ? NIG_REG_LLH1_XCM_MASK : 2564 2565 NIG_REG_LLH0_XCM_MASK, xcm_mask); 2565 2566 2566 - REG_WR(bp, NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7); 2567 + REG_WR(bp, port ? NIG_REG_LLFC_EGRESS_SRC_ENABLE_1 : 2568 + NIG_REG_LLFC_EGRESS_SRC_ENABLE_0, 0x7); 2567 2569 2568 2570 /* output enable for RX_XCM # IF */ 2569 - REG_WR(bp, NIG_REG_XCM0_OUT_EN, xcm0_out_en); 2571 + REG_WR(bp, port ? NIG_REG_XCM1_OUT_EN : 2572 + NIG_REG_XCM0_OUT_EN, xcm_out_en); 2570 2573 2571 2574 /* HW PFC TX enable */ 2572 - REG_WR(bp, NIG_REG_P0_HWPFC_ENABLE, p0_hwpfc_enable); 2575 + REG_WR(bp, port ? NIG_REG_P1_HWPFC_ENABLE : 2576 + NIG_REG_P0_HWPFC_ENABLE, hwpfc_enable); 2573 2577 2574 2578 if (nig_params) { 2575 2579 u8 i = 0; ··· 3763 3761 /* Advertise pause */ 3764 3762 bnx2x_ext_phy_set_pause(params, phy, vars); 3765 3763 3766 - vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; 3764 + /* 3765 + * Set KR Autoneg Work-Around flag for Warpcore version older than D108 3766 + */ 3767 + bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 3768 + MDIO_WC_REG_UC_INFO_B1_VERSION, &val16); 3769 + if (val16 < 0xd108) { 3770 + DP(NETIF_MSG_LINK, "Enable AN KR work-around\n"); 3771 + vars->rx_tx_asic_rst = MAX_KR_LINK_RETRY; 3772 + } 3767 3773 3768 3774 bnx2x_cl45_read(bp, phy, MDIO_WC_DEVAD, 3769 3775 MDIO_WC_REG_DIGITAL5_MISC7, &val16); ··· 9276 9266 /* BCM8481/BCM84823/BCM84833 PHY SECTION */ 9277 9267 /******************************************************************/ 9278 9268 static void bnx2x_save_848xx_spirom_version(struct bnx2x_phy *phy, 9279 - struct link_params *params) 9269 + struct bnx2x *bp, 9270 + u8 port) 9280 9271 { 9281 9272 u16 val, fw_ver1, fw_ver2, cnt; 9282 - u8 port; 9283 - struct bnx2x *bp = params->bp; 9284 9273 9285 - port = params->port; 9274 + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9275 + bnx2x_cl45_read(bp, phy, MDIO_CTL_DEVAD, 0x400f, &fw_ver1); 9276 + bnx2x_save_spirom_version(bp, port, 9277 + ((fw_ver1 & 0xf000)>>5) | (fw_ver1 & 0x7f), 9278 + phy->ver_addr); 9279 + } else { 9280 + /* For 32-bit registers in 848xx, access via MDIO2ARM i/f. */ 9281 + /* (1) set reg 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */ 9282 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0014); 9283 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 9284 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B, 0x0000); 9285 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C, 0x0300); 9286 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x0009); 9286 9287 9287 - /* For the 32 bits registers in 848xx, access via MDIO2ARM interface.*/ 9288 - /* (1) set register 0xc200_0014(SPI_BRIDGE_CTRL_2) to 0x03000000 */ 9289 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0014); 9290 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 9291 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81B, 0x0000); 9292 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81C, 0x0300); 9293 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x0009); 9288 + for (cnt = 0; cnt < 100; cnt++) { 9289 + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 9290 + if (val & 1) 9291 + break; 9292 + udelay(5); 9293 + } 9294 + if (cnt == 100) { 9295 + DP(NETIF_MSG_LINK, "Unable to read 848xx " 9296 + "phy fw version(1)\n"); 9297 + bnx2x_save_spirom_version(bp, port, 0, 9298 + phy->ver_addr); 9299 + return; 9300 + } 9294 9301 9295 - for (cnt = 0; cnt < 100; cnt++) { 9296 - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 9297 - if (val & 1) 9298 - break; 9299 - udelay(5); 9300 - } 9301 - if (cnt == 100) { 9302 - DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw version(1)\n"); 9303 - bnx2x_save_spirom_version(bp, port, 0, 9302 + 9303 + /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */ 9304 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); 9305 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 9306 + bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); 9307 + for (cnt = 0; cnt < 100; cnt++) { 9308 + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 9309 + if (val & 1) 9310 + break; 9311 + udelay(5); 9312 + } 9313 + if (cnt == 100) { 9314 + DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw " 9315 + "version(2)\n"); 9316 + bnx2x_save_spirom_version(bp, port, 0, 9317 + phy->ver_addr); 9318 + return; 9319 + } 9320 + 9321 + /* lower 16 bits of the register SPI_FW_STATUS */ 9322 + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B, &fw_ver1); 9323 + /* upper 16 bits of register SPI_FW_STATUS */ 9324 + bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C, &fw_ver2); 9325 + 9326 + bnx2x_save_spirom_version(bp, port, (fw_ver2<<16) | fw_ver1, 9304 9327 phy->ver_addr); 9305 - return; 9306 9328 } 9307 9329 9308 - 9309 - /* 2) read register 0xc200_0000 (SPI_FW_STATUS) */ 9310 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA819, 0x0000); 9311 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA81A, 0xc200); 9312 - bnx2x_cl45_write(bp, phy, MDIO_PMA_DEVAD, 0xA817, 0x000A); 9313 - for (cnt = 0; cnt < 100; cnt++) { 9314 - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA818, &val); 9315 - if (val & 1) 9316 - break; 9317 - udelay(5); 9318 - } 9319 - if (cnt == 100) { 9320 - DP(NETIF_MSG_LINK, "Unable to read 848xx phy fw version(2)\n"); 9321 - bnx2x_save_spirom_version(bp, port, 0, 9322 - phy->ver_addr); 9323 - return; 9324 - } 9325 - 9326 - /* lower 16 bits of the register SPI_FW_STATUS */ 9327 - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81B, &fw_ver1); 9328 - /* upper 16 bits of register SPI_FW_STATUS */ 9329 - bnx2x_cl45_read(bp, phy, MDIO_PMA_DEVAD, 0xA81C, &fw_ver2); 9330 - 9331 - bnx2x_save_spirom_version(bp, port, (fw_ver2<<16) | fw_ver1, 9332 - phy->ver_addr); 9333 9330 } 9334 - 9335 9331 static void bnx2x_848xx_set_led(struct bnx2x *bp, 9336 9332 struct bnx2x_phy *phy) 9337 9333 { ··· 9408 9392 u16 tmp_req_line_speed; 9409 9393 9410 9394 tmp_req_line_speed = phy->req_line_speed; 9411 - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) 9395 + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9412 9396 if (phy->req_line_speed == SPEED_10000) 9413 9397 phy->req_line_speed = SPEED_AUTO_NEG; 9414 - 9398 + } else { 9399 + /* Save spirom version */ 9400 + bnx2x_save_848xx_spirom_version(phy, bp, params->port); 9401 + } 9415 9402 /* 9416 9403 * This phy uses the NIG latch mechanism since link indication 9417 9404 * arrives through its LED4 and not via its LASI signal, so we ··· 9462 9443 an_1000_val); 9463 9444 9464 9445 /* set 100 speed advertisement */ 9465 - if (((phy->req_line_speed == SPEED_AUTO_NEG) && 9446 + if ((phy->req_line_speed == SPEED_AUTO_NEG) && 9466 9447 (phy->speed_cap_mask & 9467 9448 (PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_FULL | 9468 - PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF)) && 9469 - (phy->supported & 9470 - (SUPPORTED_100baseT_Half | 9471 - SUPPORTED_100baseT_Full)))) { 9449 + PORT_HW_CFG_SPEED_CAPABILITY_D0_100M_HALF))) { 9472 9450 an_10_100_val |= (1<<7); 9473 9451 /* Enable autoneg and restart autoneg for legacy speeds */ 9474 9452 autoneg_val |= (1<<9 | 1<<12); ··· 9554 9538 MDIO_AN_DEVAD, 9555 9539 MDIO_AN_REG_8481_10GBASE_T_AN_CTRL, 9556 9540 1); 9557 - 9558 - /* Save spirom version */ 9559 - bnx2x_save_848xx_spirom_version(phy, params); 9560 9541 9561 9542 phy->req_line_speed = tmp_req_line_speed; 9562 9543 ··· 9762 9749 9763 9750 /* Wait for GPHY to come out of reset */ 9764 9751 msleep(50); 9765 - if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9766 - /* Bring PHY out of super isolate mode */ 9767 - bnx2x_cl45_read(bp, phy, 9768 - MDIO_CTL_DEVAD, 9769 - MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); 9770 - val &= ~MDIO_84833_SUPER_ISOLATE; 9771 - bnx2x_cl45_write(bp, phy, 9772 - MDIO_CTL_DEVAD, 9773 - MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); 9774 - bnx2x_84833_pair_swap_cfg(phy, params, vars); 9775 - } else { 9752 + if (phy->type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9776 9753 /* 9777 9754 * BCM84823 requires that XGXS links up first @ 10G for normal 9778 9755 * behavior. ··· 9819 9816 DP(NETIF_MSG_LINK, "Multi_phy config = 0x%x, Media control = 0x%x\n", 9820 9817 params->multi_phy_config, val); 9821 9818 9822 - /* AutogrEEEn */ 9823 - if (params->feature_config_flags & 9824 - FEATURE_CONFIG_AUTOGREEEN_ENABLED) 9825 - cmd_args[0] = 0x2; 9826 - else 9827 - cmd_args[0] = 0x0; 9819 + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9820 + bnx2x_84833_pair_swap_cfg(phy, params, vars); 9828 9821 9829 - cmd_args[1] = 0x0; 9830 - cmd_args[2] = PHY84833_CONSTANT_LATENCY + 1; 9831 - cmd_args[3] = PHY84833_CONSTANT_LATENCY; 9832 - rc = bnx2x_84833_cmd_hdlr(phy, params, 9833 - PHY84833_CMD_SET_EEE_MODE, cmd_args); 9834 - if (rc != 0) 9835 - DP(NETIF_MSG_LINK, "Cfg AutogrEEEn failed.\n"); 9822 + /* Keep AutogrEEEn disabled. */ 9823 + cmd_args[0] = 0x0; 9824 + cmd_args[1] = 0x0; 9825 + cmd_args[2] = PHY84833_CONSTANT_LATENCY + 1; 9826 + cmd_args[3] = PHY84833_CONSTANT_LATENCY; 9827 + rc = bnx2x_84833_cmd_hdlr(phy, params, 9828 + PHY84833_CMD_SET_EEE_MODE, cmd_args); 9829 + if (rc != 0) 9830 + DP(NETIF_MSG_LINK, "Cfg AutogrEEEn failed.\n"); 9831 + } 9836 9832 if (initialize) 9837 9833 rc = bnx2x_848xx_cmn_config_init(phy, params, vars); 9838 9834 else 9839 - bnx2x_save_848xx_spirom_version(phy, params); 9835 + bnx2x_save_848xx_spirom_version(phy, bp, params->port); 9840 9836 /* 84833 PHY has a better feature and doesn't need to support this. */ 9841 9837 if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84823) { 9842 9838 cms_enable = REG_RD(bp, params->shmem_base + ··· 9853 9851 MDIO_CTL_REG_84823_USER_CTRL_REG, val); 9854 9852 } 9855 9853 9854 + if (phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) { 9855 + /* Bring PHY out of super isolate mode as the final step. */ 9856 + bnx2x_cl45_read(bp, phy, 9857 + MDIO_CTL_DEVAD, 9858 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); 9859 + val &= ~MDIO_84833_SUPER_ISOLATE; 9860 + bnx2x_cl45_write(bp, phy, 9861 + MDIO_CTL_DEVAD, 9862 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); 9863 + } 9856 9864 return rc; 9857 9865 } 9858 9866 ··· 10000 9988 } else { 10001 9989 bnx2x_cl45_read(bp, phy, 10002 9990 MDIO_CTL_DEVAD, 10003 - 0x400f, &val16); 9991 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val16); 9992 + val16 |= MDIO_84833_SUPER_ISOLATE; 10004 9993 bnx2x_cl45_write(bp, phy, 10005 - MDIO_PMA_DEVAD, 10006 - MDIO_PMA_REG_CTRL, 0x800); 9994 + MDIO_CTL_DEVAD, 9995 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val16); 10007 9996 } 10008 9997 } 10009 9998 ··· 11529 11516 } 11530 11517 phy->mdio_ctrl = bnx2x_get_emac_base(bp, mdc_mdio_access, port); 11531 11518 11519 + if ((phy->type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833) && 11520 + (phy->ver_addr)) { 11521 + /* 11522 + * Remove 100Mb link supported for BCM84833 when phy fw 11523 + * version lower than or equal to 1.39 11524 + */ 11525 + u32 raw_ver = REG_RD(bp, phy->ver_addr); 11526 + if (((raw_ver & 0x7F) <= 39) && 11527 + (((raw_ver & 0xF80) >> 7) <= 1)) 11528 + phy->supported &= ~(SUPPORTED_100baseT_Half | 11529 + SUPPORTED_100baseT_Full); 11530 + } 11531 + 11532 11532 /* 11533 11533 * In case mdc/mdio_access of the external phy is different than the 11534 11534 * mdc/mdio access of the XGXS, a HW lock must be taken in each access ··· 12359 12333 u32 chip_id) 12360 12334 { 12361 12335 u8 reset_gpios; 12362 - struct bnx2x_phy phy; 12363 - u32 shmem_base, shmem2_base, cnt; 12364 - s8 port = 0; 12365 - u16 val; 12366 - 12367 12336 reset_gpios = bnx2x_84833_get_reset_gpios(bp, shmem_base_path, chip_id); 12368 12337 bnx2x_set_mult_gpio(bp, reset_gpios, MISC_REGISTERS_GPIO_OUTPUT_LOW); 12369 12338 udelay(10); 12370 12339 bnx2x_set_mult_gpio(bp, reset_gpios, MISC_REGISTERS_GPIO_OUTPUT_HIGH); 12371 12340 DP(NETIF_MSG_LINK, "84833 reset pulse on pin values 0x%x\n", 12372 12341 reset_gpios); 12373 - for (port = PORT_MAX - 1; port >= PORT_0; port--) { 12374 - /* This PHY is for E2 and E3. */ 12375 - shmem_base = shmem_base_path[port]; 12376 - shmem2_base = shmem2_base_path[port]; 12377 - /* Extract the ext phy address for the port */ 12378 - if (bnx2x_populate_phy(bp, phy_index, shmem_base, shmem2_base, 12379 - 0, &phy) != 12380 - 0) { 12381 - DP(NETIF_MSG_LINK, "populate_phy failed\n"); 12382 - return -EINVAL; 12383 - } 12384 - 12385 - /* Wait for FW completing its initialization. */ 12386 - for (cnt = 0; cnt < 1000; cnt++) { 12387 - bnx2x_cl45_read(bp, &phy, 12388 - MDIO_PMA_DEVAD, 12389 - MDIO_PMA_REG_CTRL, &val); 12390 - if (!(val & (1<<15))) 12391 - break; 12392 - msleep(1); 12393 - } 12394 - if (cnt >= 1000) 12395 - DP(NETIF_MSG_LINK, 12396 - "84833 Cmn reset timeout (%d)\n", port); 12397 - 12398 - /* Put the port in super isolate mode. */ 12399 - bnx2x_cl45_read(bp, &phy, 12400 - MDIO_CTL_DEVAD, 12401 - MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); 12402 - val |= MDIO_84833_SUPER_ISOLATE; 12403 - bnx2x_cl45_write(bp, &phy, 12404 - MDIO_CTL_DEVAD, 12405 - MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); 12406 - } 12407 - 12408 12342 return 0; 12409 12343 } 12410 12344 12345 + static int bnx2x_84833_pre_init_phy(struct bnx2x *bp, 12346 + struct bnx2x_phy *phy) 12347 + { 12348 + u16 val, cnt; 12349 + /* Wait for FW completing its initialization. */ 12350 + for (cnt = 0; cnt < 1500; cnt++) { 12351 + bnx2x_cl45_read(bp, phy, 12352 + MDIO_PMA_DEVAD, 12353 + MDIO_PMA_REG_CTRL, &val); 12354 + if (!(val & (1<<15))) 12355 + break; 12356 + msleep(1); 12357 + } 12358 + if (cnt >= 1500) { 12359 + DP(NETIF_MSG_LINK, "84833 reset timeout\n"); 12360 + return -EINVAL; 12361 + } 12362 + 12363 + /* Put the port in super isolate mode. */ 12364 + bnx2x_cl45_read(bp, phy, 12365 + MDIO_CTL_DEVAD, 12366 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, &val); 12367 + val |= MDIO_84833_SUPER_ISOLATE; 12368 + bnx2x_cl45_write(bp, phy, 12369 + MDIO_CTL_DEVAD, 12370 + MDIO_84833_TOP_CFG_XGPHY_STRAP1, val); 12371 + 12372 + /* Save spirom version */ 12373 + bnx2x_save_848xx_spirom_version(phy, bp, PORT_0); 12374 + return 0; 12375 + } 12376 + 12377 + int bnx2x_pre_init_phy(struct bnx2x *bp, 12378 + u32 shmem_base, 12379 + u32 shmem2_base, 12380 + u32 chip_id) 12381 + { 12382 + int rc = 0; 12383 + struct bnx2x_phy phy; 12384 + bnx2x_set_mdio_clk(bp, chip_id, PORT_0); 12385 + if (bnx2x_populate_phy(bp, EXT_PHY1, shmem_base, shmem2_base, 12386 + PORT_0, &phy)) { 12387 + DP(NETIF_MSG_LINK, "populate_phy failed\n"); 12388 + return -EINVAL; 12389 + } 12390 + switch (phy.type) { 12391 + case PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM84833: 12392 + rc = bnx2x_84833_pre_init_phy(bp, &phy); 12393 + break; 12394 + default: 12395 + break; 12396 + } 12397 + return rc; 12398 + } 12411 12399 12412 12400 static int bnx2x_ext_phy_common_init(struct bnx2x *bp, u32 shmem_base_path[], 12413 12401 u32 shmem2_base_path[], u8 phy_index,
+1
drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h
··· 2176 2176 * set to 0x345678021. This is a new register (with 2_) added in E3 B0 to 2177 2177 * accommodate the 9 input clients to ETS arbiter. */ 2178 2178 #define NIG_REG_P0_TX_ARB_PRIORITY_CLIENT2_MSB 0x18684 2179 + #define NIG_REG_P1_HWPFC_ENABLE 0x181d0 2179 2180 #define NIG_REG_P1_MAC_IN_EN 0x185c0 2180 2181 /* [RW 1] Output enable for TX MAC interface */ 2181 2182 #define NIG_REG_P1_MAC_OUT_EN 0x185c4
+14 -13
drivers/net/ethernet/broadcom/tg3.c
··· 8846 8846 tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl); 8847 8847 udelay(100); 8848 8848 8849 - if (tg3_flag(tp, USING_MSIX) && tp->irq_cnt > 1) { 8849 + if (tg3_flag(tp, USING_MSIX)) { 8850 8850 val = tr32(MSGINT_MODE); 8851 - val |= MSGINT_MODE_MULTIVEC_EN | MSGINT_MODE_ENABLE; 8851 + val |= MSGINT_MODE_ENABLE; 8852 + if (tp->irq_cnt > 1) 8853 + val |= MSGINT_MODE_MULTIVEC_EN; 8852 8854 if (!tg3_flag(tp, 1SHOT_MSI)) 8853 8855 val |= MSGINT_MODE_ONE_SHOT_DISABLE; 8854 8856 tw32(MSGINT_MODE, val); ··· 9550 9548 9551 9549 static bool tg3_enable_msix(struct tg3 *tp) 9552 9550 { 9553 - int i, rc, cpus = num_online_cpus(); 9551 + int i, rc; 9554 9552 struct msix_entry msix_ent[tp->irq_max]; 9555 9553 9556 - if (cpus == 1) 9557 - /* Just fallback to the simpler MSI mode. */ 9558 - return false; 9559 - 9560 - /* 9561 - * We want as many rx rings enabled as there are cpus. 9562 - * The first MSIX vector only deals with link interrupts, etc, 9563 - * so we add one to the number of vectors we are requesting. 9564 - */ 9565 - tp->irq_cnt = min_t(unsigned, cpus + 1, tp->irq_max); 9554 + tp->irq_cnt = num_online_cpus(); 9555 + if (tp->irq_cnt > 1) { 9556 + /* We want as many rx rings enabled as there are cpus. 9557 + * In multiqueue MSI-X mode, the first MSI-X vector 9558 + * only deals with link interrupts, etc, so we add 9559 + * one to the number of vectors we are requesting. 9560 + */ 9561 + tp->irq_cnt = min_t(unsigned, tp->irq_cnt + 1, tp->irq_max); 9562 + } 9566 9563 9567 9564 for (i = 0; i < tp->irq_max; i++) { 9568 9565 msix_ent[i].entry = i;
+1 -1
drivers/net/ethernet/ibm/ehea/ehea_ethtool.c
··· 263 263 data[i++] = atomic_read(&port->port_res[k].swqe_avail); 264 264 } 265 265 266 - const struct ethtool_ops ehea_ethtool_ops = { 266 + static const struct ethtool_ops ehea_ethtool_ops = { 267 267 .get_settings = ehea_get_settings, 268 268 .get_drvinfo = ehea_get_drvinfo, 269 269 .get_msglevel = ehea_get_msglevel,
+16 -16
drivers/net/ethernet/ibm/ehea/ehea_main.c
··· 94 94 static LIST_HEAD(adapter_list); 95 95 static unsigned long ehea_driver_flags; 96 96 static DEFINE_MUTEX(dlpar_mem_lock); 97 - struct ehea_fw_handle_array ehea_fw_handles; 98 - struct ehea_bcmc_reg_array ehea_bcmc_regs; 97 + static struct ehea_fw_handle_array ehea_fw_handles; 98 + static struct ehea_bcmc_reg_array ehea_bcmc_regs; 99 99 100 100 101 101 static int __devinit ehea_probe_adapter(struct platform_device *dev, ··· 133 133 } 134 134 } 135 135 136 - void ehea_schedule_port_reset(struct ehea_port *port) 136 + static void ehea_schedule_port_reset(struct ehea_port *port) 137 137 { 138 138 if (!test_bit(__EHEA_DISABLE_PORT_RESET, &port->flags)) 139 139 schedule_work(&port->reset_task); ··· 1404 1404 return ret; 1405 1405 } 1406 1406 1407 - int ehea_gen_smrs(struct ehea_port_res *pr) 1407 + static int ehea_gen_smrs(struct ehea_port_res *pr) 1408 1408 { 1409 1409 int ret; 1410 1410 struct ehea_adapter *adapter = pr->port->adapter; ··· 1426 1426 return -EIO; 1427 1427 } 1428 1428 1429 - int ehea_rem_smrs(struct ehea_port_res *pr) 1429 + static int ehea_rem_smrs(struct ehea_port_res *pr) 1430 1430 { 1431 1431 if ((ehea_rem_mr(&pr->send_mr)) || 1432 1432 (ehea_rem_mr(&pr->recv_mr))) ··· 2190 2190 return err; 2191 2191 } 2192 2192 2193 - int ehea_activate_qp(struct ehea_adapter *adapter, struct ehea_qp *qp) 2193 + static int ehea_activate_qp(struct ehea_adapter *adapter, struct ehea_qp *qp) 2194 2194 { 2195 2195 int ret = -EIO; 2196 2196 u64 hret; ··· 2531 2531 } 2532 2532 } 2533 2533 2534 - int ehea_stop_qps(struct net_device *dev) 2534 + static int ehea_stop_qps(struct net_device *dev) 2535 2535 { 2536 2536 struct ehea_port *port = netdev_priv(dev); 2537 2537 struct ehea_adapter *adapter = port->adapter; ··· 2600 2600 return ret; 2601 2601 } 2602 2602 2603 - void ehea_update_rqs(struct ehea_qp *orig_qp, struct ehea_port_res *pr) 2603 + static void ehea_update_rqs(struct ehea_qp *orig_qp, struct ehea_port_res *pr) 2604 2604 { 2605 2605 struct ehea_qp qp = *orig_qp; 2606 2606 struct ehea_qp_init_attr *init_attr = &qp.init_attr; ··· 2633 2633 } 2634 2634 } 2635 2635 2636 - int ehea_restart_qps(struct net_device *dev) 2636 + static int ehea_restart_qps(struct net_device *dev) 2637 2637 { 2638 2638 struct ehea_port *port = netdev_priv(dev); 2639 2639 struct ehea_adapter *adapter = port->adapter; ··· 2824 2824 ehea_schedule_port_reset(port); 2825 2825 } 2826 2826 2827 - int ehea_sense_adapter_attr(struct ehea_adapter *adapter) 2827 + static int ehea_sense_adapter_attr(struct ehea_adapter *adapter) 2828 2828 { 2829 2829 struct hcp_query_ehea *cb; 2830 2830 u64 hret; ··· 2852 2852 return ret; 2853 2853 } 2854 2854 2855 - int ehea_get_jumboframe_status(struct ehea_port *port, int *jumbo) 2855 + static int ehea_get_jumboframe_status(struct ehea_port *port, int *jumbo) 2856 2856 { 2857 2857 struct hcp_ehea_port_cb4 *cb4; 2858 2858 u64 hret; ··· 2966 2966 .ndo_tx_timeout = ehea_tx_watchdog, 2967 2967 }; 2968 2968 2969 - struct ehea_port *ehea_setup_single_port(struct ehea_adapter *adapter, 2969 + static struct ehea_port *ehea_setup_single_port(struct ehea_adapter *adapter, 2970 2970 u32 logical_port_id, 2971 2971 struct device_node *dn) 2972 2972 { ··· 3237 3237 static DEVICE_ATTR(probe_port, S_IWUSR, NULL, ehea_probe_port); 3238 3238 static DEVICE_ATTR(remove_port, S_IWUSR, NULL, ehea_remove_port); 3239 3239 3240 - int ehea_create_device_sysfs(struct platform_device *dev) 3240 + static int ehea_create_device_sysfs(struct platform_device *dev) 3241 3241 { 3242 3242 int ret = device_create_file(&dev->dev, &dev_attr_probe_port); 3243 3243 if (ret) ··· 3248 3248 return ret; 3249 3249 } 3250 3250 3251 - void ehea_remove_device_sysfs(struct platform_device *dev) 3251 + static void ehea_remove_device_sysfs(struct platform_device *dev) 3252 3252 { 3253 3253 device_remove_file(&dev->dev, &dev_attr_probe_port); 3254 3254 device_remove_file(&dev->dev, &dev_attr_remove_port); ··· 3379 3379 return 0; 3380 3380 } 3381 3381 3382 - void ehea_crash_handler(void) 3382 + static void ehea_crash_handler(void) 3383 3383 { 3384 3384 int i; 3385 3385 ··· 3491 3491 static DRIVER_ATTR(capabilities, S_IRUSR | S_IRGRP | S_IROTH, 3492 3492 ehea_show_capabilities, NULL); 3493 3493 3494 - int __init ehea_module_init(void) 3494 + static int __init ehea_module_init(void) 3495 3495 { 3496 3496 int ret; 3497 3497
+6 -8
drivers/net/ethernet/ibm/ehea/ehea_qmr.c
··· 34 34 #include "ehea_phyp.h" 35 35 #include "ehea_qmr.h" 36 36 37 - struct ehea_bmap *ehea_bmap = NULL; 38 - 39 - 37 + static struct ehea_bmap *ehea_bmap; 40 38 41 39 static void *hw_qpageit_get_inc(struct hw_queue *queue) 42 40 { ··· 210 212 return NULL; 211 213 } 212 214 213 - u64 ehea_destroy_cq_res(struct ehea_cq *cq, u64 force) 215 + static u64 ehea_destroy_cq_res(struct ehea_cq *cq, u64 force) 214 216 { 215 217 u64 hret; 216 218 u64 adapter_handle = cq->adapter->handle; ··· 335 337 return eqe; 336 338 } 337 339 338 - u64 ehea_destroy_eq_res(struct ehea_eq *eq, u64 force) 340 + static u64 ehea_destroy_eq_res(struct ehea_eq *eq, u64 force) 339 341 { 340 342 u64 hret; 341 343 unsigned long flags; ··· 379 381 /** 380 382 * allocates memory for a queue and registers pages in phyp 381 383 */ 382 - int ehea_qp_alloc_register(struct ehea_qp *qp, struct hw_queue *hw_queue, 384 + static int ehea_qp_alloc_register(struct ehea_qp *qp, struct hw_queue *hw_queue, 383 385 int nr_pages, int wqe_size, int act_nr_sges, 384 386 struct ehea_adapter *adapter, int h_call_q_selector) 385 387 { ··· 514 516 return NULL; 515 517 } 516 518 517 - u64 ehea_destroy_qp_res(struct ehea_qp *qp, u64 force) 519 + static u64 ehea_destroy_qp_res(struct ehea_qp *qp, u64 force) 518 520 { 519 521 u64 hret; 520 522 struct ehea_qp_init_attr *qp_attr = &qp->init_attr; ··· 974 976 return 0; 975 977 } 976 978 977 - void print_error_data(u64 *data) 979 + static void print_error_data(u64 *data) 978 980 { 979 981 int length; 980 982 u64 type = EHEA_BMASK_GET(ERROR_DATA_TYPE, data[2]);
+1 -1
drivers/net/ethernet/renesas/sh_eth.c
··· 1703 1703 mdp->mii_bus->name = "sh_mii"; 1704 1704 mdp->mii_bus->parent = &ndev->dev; 1705 1705 snprintf(mdp->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x", 1706 - mdp->pdev->name, pdid); 1706 + mdp->pdev->name, id); 1707 1707 1708 1708 /* PHY IRQ */ 1709 1709 mdp->mii_bus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
+3 -2
drivers/net/wireless/ath/ath9k/ar9003_mac.c
··· 557 557 rxs->rs_status |= ATH9K_RXERR_DECRYPT; 558 558 else if (rxsp->status11 & AR_MichaelErr) 559 559 rxs->rs_status |= ATH9K_RXERR_MIC; 560 - if (rxsp->status11 & AR_KeyMiss) 561 - rxs->rs_status |= ATH9K_RXERR_KEYMISS; 562 560 } 561 + 562 + if (rxsp->status11 & AR_KeyMiss) 563 + rxs->rs_status |= ATH9K_RXERR_KEYMISS; 563 564 564 565 return 0; 565 566 }
+3 -2
drivers/net/wireless/ath/ath9k/mac.c
··· 618 618 rs->rs_status |= ATH9K_RXERR_DECRYPT; 619 619 else if (ads.ds_rxstatus8 & AR_MichaelErr) 620 620 rs->rs_status |= ATH9K_RXERR_MIC; 621 - if (ads.ds_rxstatus8 & AR_KeyMiss) 622 - rs->rs_status |= ATH9K_RXERR_KEYMISS; 623 621 } 622 + 623 + if (ads.ds_rxstatus8 & AR_KeyMiss) 624 + rs->rs_status |= ATH9K_RXERR_KEYMISS; 624 625 625 626 return 0; 626 627 }
+4 -1
drivers/net/wireless/b43/main.c
··· 4852 4852 4853 4853 cancel_work_sync(&(wl->beacon_update_trigger)); 4854 4854 4855 + if (!dev) 4856 + goto out; 4857 + 4855 4858 mutex_lock(&wl->mutex); 4856 4859 if (b43_status(dev) >= B43_STAT_STARTED) { 4857 4860 dev = b43_wireless_core_stop(dev); ··· 4866 4863 4867 4864 out_unlock: 4868 4865 mutex_unlock(&wl->mutex); 4869 - 4866 + out: 4870 4867 cancel_work_sync(&(wl->txpower_adjust_work)); 4871 4868 } 4872 4869
+1 -1
drivers/net/wireless/brcm80211/brcmfmac/wl_cfg80211.c
··· 2475 2475 return err; 2476 2476 } 2477 2477 2478 - static void brcmf_delay(u32 ms) 2478 + static __always_inline void brcmf_delay(u32 ms) 2479 2479 { 2480 2480 if (ms < 1000 / HZ) { 2481 2481 cond_resched();
+4 -36
drivers/net/wireless/brcm80211/brcmsmac/mac80211_if.c
··· 1128 1128 return 0; 1129 1129 } 1130 1130 1131 - static int brcms_pci_suspend(struct pci_dev *pdev) 1132 - { 1133 - pci_save_state(pdev); 1134 - pci_disable_device(pdev); 1135 - return pci_set_power_state(pdev, PCI_D3hot); 1136 - } 1137 - 1138 - static int brcms_suspend(struct bcma_device *pdev, pm_message_t state) 1131 + static int brcms_suspend(struct bcma_device *pdev) 1139 1132 { 1140 1133 struct brcms_info *wl; 1141 1134 struct ieee80211_hw *hw; ··· 1146 1153 wl->pub->hw_up = false; 1147 1154 spin_unlock_bh(&wl->lock); 1148 1155 1149 - /* temporarily do suspend ourselves */ 1150 - return brcms_pci_suspend(pdev->bus->host_pci); 1151 - } 1152 - 1153 - static int brcms_pci_resume(struct pci_dev *pdev) 1154 - { 1155 - int err = 0; 1156 - uint val; 1157 - 1158 - err = pci_set_power_state(pdev, PCI_D0); 1159 - if (err) 1160 - return err; 1161 - 1162 - pci_restore_state(pdev); 1163 - 1164 - err = pci_enable_device(pdev); 1165 - if (err) 1166 - return err; 1167 - 1168 - pci_set_master(pdev); 1169 - 1170 - pci_read_config_dword(pdev, 0x40, &val); 1171 - if ((val & 0x0000ff00) != 0) 1172 - pci_write_config_dword(pdev, 0x40, val & 0xffff00ff); 1156 + pr_debug("brcms_suspend ok\n"); 1173 1157 1174 1158 return 0; 1175 1159 } 1176 1160 1177 1161 static int brcms_resume(struct bcma_device *pdev) 1178 1162 { 1179 - /* 1180 - * just do pci resume for now until bcma supports it. 1181 - */ 1182 - return brcms_pci_resume(pdev->bus->host_pci); 1163 + pr_debug("brcms_resume ok\n"); 1164 + return 0; 1183 1165 } 1184 1166 1185 1167 static struct bcma_driver brcms_bcma_driver = {
+2 -2
drivers/net/wireless/ipw2x00/ipw2200.c
··· 7848 7848 * more efficiently than we can parse it. ORDER MATTERS HERE */ 7849 7849 struct ipw_rt_hdr *ipw_rt; 7850 7850 7851 - short len = le16_to_cpu(pkt->u.frame.length); 7851 + unsigned short len = le16_to_cpu(pkt->u.frame.length); 7852 7852 7853 7853 /* We received data from the HW, so stop the watchdog */ 7854 7854 dev->trans_start = jiffies; ··· 8023 8023 s8 signal = frame->rssi_dbm - IPW_RSSI_TO_DBM; 8024 8024 s8 noise = (s8) le16_to_cpu(frame->noise); 8025 8025 u8 rate = frame->rate; 8026 - short len = le16_to_cpu(pkt->u.frame.length); 8026 + unsigned short len = le16_to_cpu(pkt->u.frame.length); 8027 8027 struct sk_buff *skb; 8028 8028 int hdr_only = 0; 8029 8029 u16 filter = priv->prom_priv->filter;
+1 -1
drivers/net/wireless/iwlwifi/iwl-scan.c
··· 569 569 struct iwl_scan_cmd *scan; 570 570 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS]; 571 571 u32 rate_flags = 0; 572 - u16 cmd_len; 572 + u16 cmd_len = 0; 573 573 u16 rx_chain = 0; 574 574 enum ieee80211_band band; 575 575 u8 n_probes = 0;
+2 -2
drivers/net/wireless/mwl8k.c
··· 2777 2777 else if (channel->band == IEEE80211_BAND_5GHZ) 2778 2778 cmd->band = cpu_to_le16(0x4); 2779 2779 2780 - cmd->channel = channel->hw_value; 2780 + cmd->channel = cpu_to_le16(channel->hw_value); 2781 2781 2782 2782 if (conf->channel_type == NL80211_CHAN_NO_HT || 2783 2783 conf->channel_type == NL80211_CHAN_HT20) { ··· 4066 4066 goto done; 4067 4067 4068 4068 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 || 4069 - WLAN_CIPHER_SUITE_WEP104) 4069 + key->cipher == WLAN_CIPHER_SUITE_WEP104) 4070 4070 mwl8k_vif->wep_key_conf[key->keyidx].enabled = 0; 4071 4071 4072 4072 cmd->action = cpu_to_le32(MWL8K_ENCR_REMOVE_KEY);
+8 -20
drivers/net/wireless/rt2x00/rt2800pci.c
··· 422 422 static void rt2800pci_toggle_irq(struct rt2x00_dev *rt2x00dev, 423 423 enum dev_state state) 424 424 { 425 - int mask = (state == STATE_RADIO_IRQ_ON); 426 425 u32 reg; 427 426 unsigned long flags; 428 427 ··· 435 436 } 436 437 437 438 spin_lock_irqsave(&rt2x00dev->irqmask_lock, flags); 438 - rt2x00pci_register_read(rt2x00dev, INT_MASK_CSR, &reg); 439 - rt2x00_set_field32(&reg, INT_MASK_CSR_RXDELAYINT, 0); 440 - rt2x00_set_field32(&reg, INT_MASK_CSR_TXDELAYINT, 0); 441 - rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, mask); 442 - rt2x00_set_field32(&reg, INT_MASK_CSR_AC0_DMA_DONE, 0); 443 - rt2x00_set_field32(&reg, INT_MASK_CSR_AC1_DMA_DONE, 0); 444 - rt2x00_set_field32(&reg, INT_MASK_CSR_AC2_DMA_DONE, 0); 445 - rt2x00_set_field32(&reg, INT_MASK_CSR_AC3_DMA_DONE, 0); 446 - rt2x00_set_field32(&reg, INT_MASK_CSR_HCCA_DMA_DONE, 0); 447 - rt2x00_set_field32(&reg, INT_MASK_CSR_MGMT_DMA_DONE, 0); 448 - rt2x00_set_field32(&reg, INT_MASK_CSR_MCU_COMMAND, 0); 449 - rt2x00_set_field32(&reg, INT_MASK_CSR_RXTX_COHERENT, 0); 450 - rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, mask); 451 - rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, mask); 452 - rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, mask); 453 - rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, mask); 454 - rt2x00_set_field32(&reg, INT_MASK_CSR_GPTIMER, 0); 455 - rt2x00_set_field32(&reg, INT_MASK_CSR_RX_COHERENT, 0); 456 - rt2x00_set_field32(&reg, INT_MASK_CSR_TX_COHERENT, 0); 439 + reg = 0; 440 + if (state == STATE_RADIO_IRQ_ON) { 441 + rt2x00_set_field32(&reg, INT_MASK_CSR_RX_DONE, 1); 442 + rt2x00_set_field32(&reg, INT_MASK_CSR_TBTT, 1); 443 + rt2x00_set_field32(&reg, INT_MASK_CSR_PRE_TBTT, 1); 444 + rt2x00_set_field32(&reg, INT_MASK_CSR_TX_FIFO_STATUS, 1); 445 + rt2x00_set_field32(&reg, INT_MASK_CSR_AUTO_WAKEUP, 1); 446 + } 457 447 rt2x00pci_register_write(rt2x00dev, INT_MASK_CSR, reg); 458 448 spin_unlock_irqrestore(&rt2x00dev->irqmask_lock, flags); 459 449
+5 -3
drivers/vhost/net.c
··· 856 856 }; 857 857 858 858 static struct miscdevice vhost_net_misc = { 859 - MISC_DYNAMIC_MINOR, 860 - "vhost-net", 861 - &vhost_net_fops, 859 + .minor = VHOST_NET_MINOR, 860 + .name = "vhost-net", 861 + .fops = &vhost_net_fops, 862 862 }; 863 863 864 864 static int vhost_net_init(void) ··· 879 879 MODULE_LICENSE("GPL v2"); 880 880 MODULE_AUTHOR("Michael S. Tsirkin"); 881 881 MODULE_DESCRIPTION("Host kernel accelerator for virtio net"); 882 + MODULE_ALIAS_MISCDEV(VHOST_NET_MINOR); 883 + MODULE_ALIAS("devname:vhost-net");
+1 -1
include/linux/bcma/bcma.h
··· 162 162 163 163 int (*probe)(struct bcma_device *dev); 164 164 void (*remove)(struct bcma_device *dev); 165 - int (*suspend)(struct bcma_device *dev, pm_message_t state); 165 + int (*suspend)(struct bcma_device *dev); 166 166 int (*resume)(struct bcma_device *dev); 167 167 void (*shutdown)(struct bcma_device *dev); 168 168
+1
include/linux/miscdevice.h
··· 42 42 #define AUTOFS_MINOR 235 43 43 #define MAPPER_CTRL_MINOR 236 44 44 #define LOOP_CTRL_MINOR 237 45 + #define VHOST_NET_MINOR 238 45 46 #define MISC_DYNAMIC_MINOR 255 46 47 47 48 struct device;
-4
include/linux/netfilter/nf_conntrack_common.h
··· 83 83 /* Conntrack is a fake untracked entry */ 84 84 IPS_UNTRACKED_BIT = 12, 85 85 IPS_UNTRACKED = (1 << IPS_UNTRACKED_BIT), 86 - 87 - /* Conntrack has a userspace helper. */ 88 - IPS_USERSPACE_HELPER_BIT = 13, 89 - IPS_USERSPACE_HELPER = (1 << IPS_USERSPACE_HELPER_BIT), 90 86 }; 91 87 92 88 /* Connection tracking event types */
+1 -2
include/linux/netfilter/xt_CT.h
··· 3 3 4 4 #include <linux/types.h> 5 5 6 - #define XT_CT_NOTRACK 0x1 7 - #define XT_CT_USERSPACE_HELPER 0x2 6 + #define XT_CT_NOTRACK 0x1 8 7 9 8 struct xt_ct_target_info { 10 9 __u16 flags;
+1 -1
include/net/flow.h
··· 78 78 __u32 mark, __u8 tos, __u8 scope, 79 79 __u8 proto, __u8 flags, 80 80 __be32 daddr, __be32 saddr, 81 - __be16 dport, __be32 sport) 81 + __be16 dport, __be16 sport) 82 82 { 83 83 fl4->flowi4_oif = oif; 84 84 fl4->flowi4_iif = 0;
+1 -1
mm/memcontrol.c
··· 373 373 374 374 /* Writing them here to avoid exposing memcg's inner layout */ 375 375 #ifdef CONFIG_CGROUP_MEM_RES_CTLR_KMEM 376 - #ifdef CONFIG_INET 377 376 #include <net/sock.h> 378 377 #include <net/ip.h> 379 378 ··· 419 420 } 420 421 } 421 422 423 + #ifdef CONFIG_INET 422 424 struct cg_proto *tcp_proto_cgroup(struct mem_cgroup *memcg) 423 425 { 424 426 if (!memcg || mem_cgroup_is_root(memcg))
+2 -2
net/bridge/br_fdb.c
··· 146 146 unsigned long next_timer = jiffies + br->ageing_time; 147 147 int i; 148 148 149 - spin_lock_bh(&br->hash_lock); 149 + spin_lock(&br->hash_lock); 150 150 for (i = 0; i < BR_HASH_SIZE; i++) { 151 151 struct net_bridge_fdb_entry *f; 152 152 struct hlist_node *h, *n; ··· 162 162 next_timer = this_timer; 163 163 } 164 164 } 165 - spin_unlock_bh(&br->hash_lock); 165 + spin_unlock(&br->hash_lock); 166 166 167 167 mod_timer(&br->gc_timer, round_jiffies_up(next_timer)); 168 168 }
+9 -7
net/caif/caif_dev.c
··· 146 146 spin_lock_bh(&caifd->flow_lock); 147 147 send_xoff = caifd->xoff; 148 148 caifd->xoff = 0; 149 - if (!WARN_ON(caifd->xoff_skb_dtor == NULL)) { 150 - WARN_ON(caifd->xoff_skb != skb); 151 - dtor = caifd->xoff_skb_dtor; 152 - caifd->xoff_skb = NULL; 153 - caifd->xoff_skb_dtor = NULL; 154 - } 149 + dtor = caifd->xoff_skb_dtor; 150 + 151 + if (WARN_ON(caifd->xoff_skb != skb)) 152 + skb = NULL; 153 + 154 + caifd->xoff_skb = NULL; 155 + caifd->xoff_skb_dtor = NULL; 156 + 155 157 spin_unlock_bh(&caifd->flow_lock); 156 158 157 - if (dtor) 159 + if (dtor && skb) 158 160 dtor(skb); 159 161 160 162 if (send_xoff)
+1 -2
net/caif/caif_usb.c
··· 11 11 #include <linux/module.h> 12 12 #include <linux/netdevice.h> 13 13 #include <linux/slab.h> 14 - #include <linux/netdevice.h> 15 14 #include <linux/mii.h> 16 15 #include <linux/usb.h> 17 16 #include <linux/usb/usbnet.h> ··· 26 27 #define CFUSB_ALIGNMENT 4 /* Number of bytes to align. */ 27 28 #define CFUSB_MAX_HEADLEN (CFUSB_PAD_DESCR_SZ + CFUSB_ALIGNMENT-1) 28 29 #define STE_USB_VID 0x04cc /* USB Product ID for ST-Ericsson */ 29 - #define STE_USB_PID_CAIF 0x2306 /* Product id for CAIF Modems */ 30 + #define STE_USB_PID_CAIF 0x230f /* Product id for CAIF Modems */ 30 31 31 32 struct cfusbl { 32 33 struct cflayer layer;
+20 -12
net/core/dev.c
··· 1887 1887 EXPORT_SYMBOL(skb_set_dev); 1888 1888 #endif /* CONFIG_NET_NS */ 1889 1889 1890 + static void skb_warn_bad_offload(const struct sk_buff *skb) 1891 + { 1892 + static const netdev_features_t null_features = 0; 1893 + struct net_device *dev = skb->dev; 1894 + const char *driver = ""; 1895 + 1896 + if (dev && dev->dev.parent) 1897 + driver = dev_driver_string(dev->dev.parent); 1898 + 1899 + WARN(1, "%s: caps=(%pNF, %pNF) len=%d data_len=%d gso_size=%d " 1900 + "gso_type=%d ip_summed=%d\n", 1901 + driver, dev ? &dev->features : &null_features, 1902 + skb->sk ? &skb->sk->sk_route_caps : &null_features, 1903 + skb->len, skb->data_len, skb_shinfo(skb)->gso_size, 1904 + skb_shinfo(skb)->gso_type, skb->ip_summed); 1905 + } 1906 + 1890 1907 /* 1891 1908 * Invalidate hardware checksum when packet is to be mangled, and 1892 1909 * complete checksum manually on outgoing path. ··· 1917 1900 goto out_set_summed; 1918 1901 1919 1902 if (unlikely(skb_shinfo(skb)->gso_size)) { 1920 - /* Let GSO fix up the checksum. */ 1921 - goto out_set_summed; 1903 + skb_warn_bad_offload(skb); 1904 + return -EINVAL; 1922 1905 } 1923 1906 1924 1907 offset = skb_checksum_start_offset(skb); ··· 1978 1961 __skb_pull(skb, skb->mac_len); 1979 1962 1980 1963 if (unlikely(skb->ip_summed != CHECKSUM_PARTIAL)) { 1981 - struct net_device *dev = skb->dev; 1982 - struct ethtool_drvinfo info = {}; 1983 - 1984 - if (dev && dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) 1985 - dev->ethtool_ops->get_drvinfo(dev, &info); 1986 - 1987 - WARN(1, "%s: caps=(%pNF, %pNF) len=%d data_len=%d ip_summed=%d\n", 1988 - info.driver, dev ? &dev->features : NULL, 1989 - skb->sk ? &skb->sk->sk_route_caps : NULL, 1990 - skb->len, skb->data_len, skb->ip_summed); 1964 + skb_warn_bad_offload(skb); 1991 1965 1992 1966 if (skb_header_cloned(skb) && 1993 1967 (err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC)))
+1 -1
net/core/net-sysfs.c
··· 929 929 } 930 930 931 931 static struct netdev_queue_attribute bql_inflight_attribute = 932 - __ATTR(inflight, S_IRUGO | S_IWUSR, bql_show_inflight, NULL); 932 + __ATTR(inflight, S_IRUGO, bql_show_inflight, NULL); 933 933 934 934 #define BQL_ATTR(NAME, FIELD) \ 935 935 static ssize_t bql_show_ ## NAME(struct netdev_queue *queue, \
+1 -1
net/core/secure_seq.c
··· 46 46 47 47 memcpy(hash, saddr, 16); 48 48 for (i = 0; i < 4; i++) 49 - secret[i] = net_secret[i] + daddr[i]; 49 + secret[i] = net_secret[i] + (__force u32)daddr[i]; 50 50 secret[4] = net_secret[4] + 51 51 (((__force u16)sport << 16) + (__force u16)dport); 52 52 for (i = 5; i < MD5_MESSAGE_BYTES / 4; i++)
+2 -1
net/ipv4/inetpeer.c
··· 136 136 for (i = 0; i < n; i++) { 137 137 if (a->addr.a6[i] == b->addr.a6[i]) 138 138 continue; 139 - if (a->addr.a6[i] < b->addr.a6[i]) 139 + if ((__force u32)a->addr.a6[i] < (__force u32)b->addr.a6[i]) 140 140 return -1; 141 141 return 1; 142 142 } ··· 447 447 p->rate_last = 0; 448 448 p->pmtu_expires = 0; 449 449 p->pmtu_orig = 0; 450 + p->redirect_genid = 0; 450 451 memset(&p->redirect_learned, 0, sizeof(p->redirect_learned)); 451 452 452 453
+4 -4
net/ipv4/ipconfig.c
··· 141 141 __be32 root_server_addr = NONE; /* Address of NFS server */ 142 142 u8 root_server_path[256] = { 0, }; /* Path to mount as root */ 143 143 144 - u32 ic_dev_xid; /* Device under configuration */ 144 + __be32 ic_dev_xid; /* Device under configuration */ 145 145 146 146 /* vendor class identifier */ 147 147 static char vendor_class_identifier[253] __initdata; ··· 859 859 */ 860 860 static void __init ic_do_bootp_ext(u8 *ext) 861 861 { 862 - u8 servers; 863 - int i; 864 - u16 mtu; 862 + u8 servers; 863 + int i; 864 + __be16 mtu; 865 865 866 866 #ifdef IPCONFIG_DEBUG 867 867 u8 *c;
+14 -13
net/ipv4/ping.c
··· 140 140 write_lock_bh(&ping_table.lock); 141 141 hlist_nulls_del(&sk->sk_nulls_node); 142 142 sock_put(sk); 143 - isk->inet_num = isk->inet_sport = 0; 143 + isk->inet_num = 0; 144 + isk->inet_sport = 0; 144 145 sock_prot_inuse_add(sock_net(sk), sk->sk_prot, -1); 145 146 write_unlock_bh(&ping_table.lock); 146 147 } 147 148 } 148 149 149 - static struct sock *ping_v4_lookup(struct net *net, u32 saddr, u32 daddr, 150 + static struct sock *ping_v4_lookup(struct net *net, __be32 saddr, __be32 daddr, 150 151 u16 ident, int dif) 151 152 { 152 153 struct hlist_nulls_head *hslot = ping_hashslot(&ping_table, net, ident); ··· 155 154 struct inet_sock *isk; 156 155 struct hlist_nulls_node *hnode; 157 156 158 - pr_debug("try to find: num = %d, daddr = %ld, dif = %d\n", 159 - (int)ident, (unsigned long)daddr, dif); 157 + pr_debug("try to find: num = %d, daddr = %pI4, dif = %d\n", 158 + (int)ident, &daddr, dif); 160 159 read_lock_bh(&ping_table.lock); 161 160 162 161 ping_portaddr_for_each_entry(sk, hnode, hslot) { 163 162 isk = inet_sk(sk); 164 163 165 - pr_debug("found: %p: num = %d, daddr = %ld, dif = %d\n", sk, 166 - (int)isk->inet_num, (unsigned long)isk->inet_rcv_saddr, 164 + pr_debug("found: %p: num = %d, daddr = %pI4, dif = %d\n", sk, 165 + (int)isk->inet_num, &isk->inet_rcv_saddr, 167 166 sk->sk_bound_dev_if); 168 167 169 168 pr_debug("iterate\n"); ··· 255 254 sk, addr->sin_addr.s_addr, ntohs(addr->sin_port)); 256 255 257 256 chk_addr_ret = inet_addr_type(sock_net(sk), addr->sin_addr.s_addr); 258 - if (addr->sin_addr.s_addr == INADDR_ANY) 257 + if (addr->sin_addr.s_addr == htonl(INADDR_ANY)) 259 258 chk_addr_ret = RTN_LOCAL; 260 259 261 260 if ((sysctl_ip_nonlocal_bind == 0 && ··· 279 278 goto out; 280 279 } 281 280 282 - pr_debug("after bind(): num = %d, daddr = %ld, dif = %d\n", 281 + pr_debug("after bind(): num = %d, daddr = %pI4, dif = %d\n", 283 282 (int)isk->inet_num, 284 - (unsigned long) isk->inet_rcv_saddr, 283 + &isk->inet_rcv_saddr, 285 284 (int)sk->sk_bound_dev_if); 286 285 287 286 err = 0; ··· 408 407 struct pingfakehdr { 409 408 struct icmphdr icmph; 410 409 struct iovec *iov; 411 - u32 wcheck; 410 + __wsum wcheck; 412 411 }; 413 412 414 413 static int ping_getfrag(void *from, char * to, ··· 460 459 struct rtable *rt = NULL; 461 460 struct ip_options_data opt_copy; 462 461 int free = 0; 463 - u32 saddr, daddr, faddr; 462 + __be32 saddr, daddr, faddr; 464 463 u8 tos; 465 464 int err; 466 465 ··· 697 696 struct net *net = dev_net(skb->dev); 698 697 struct iphdr *iph = ip_hdr(skb); 699 698 struct icmphdr *icmph = icmp_hdr(skb); 700 - u32 saddr = iph->saddr; 701 - u32 daddr = iph->daddr; 699 + __be32 saddr = iph->saddr; 700 + __be32 daddr = iph->daddr; 702 701 703 702 /* We assume the packet has already been checked by icmp_rcv */ 704 703
-1
net/ipv4/udp_diag.c
··· 15 15 #include <linux/udp.h> 16 16 #include <net/udp.h> 17 17 #include <net/udplite.h> 18 - #include <linux/inet_diag.h> 19 18 #include <linux/sock_diag.h> 20 19 21 20 static int sk_diag_dump(struct sock *sk, struct sk_buff *skb,
+1 -1
net/ipv6/datagram.c
··· 575 575 } 576 576 if (np->rxopt.bits.rxorigdstaddr) { 577 577 struct sockaddr_in6 sin6; 578 - u16 *ports = (u16 *) skb_transport_header(skb); 578 + __be16 *ports = (__be16 *) skb_transport_header(skb); 579 579 580 580 if (skb_transport_offset(skb) + 4 <= skb->len) { 581 581 /* All current transport protocols have the port numbers in the
+2 -2
net/ipv6/proc.c
··· 237 237 struct inet6_dev *idev = (struct inet6_dev *)seq->private; 238 238 239 239 seq_printf(seq, "%-32s\t%u\n", "ifIndex", idev->dev->ifindex); 240 - snmp6_seq_show_item(seq, (void __percpu **)idev->stats.ipv6, NULL, 241 - snmp6_ipstats_list); 240 + snmp6_seq_show_item64(seq, (void __percpu **)idev->stats.ipv6, 241 + snmp6_ipstats_list, offsetof(struct ipstats_mib, syncp)); 242 242 snmp6_seq_show_item(seq, NULL, idev->stats.icmpv6dev->mibs, 243 243 snmp6_icmp6_list); 244 244 snmp6_seq_show_icmpv6msg(seq, idev->stats.icmpv6msgdev->mibs);
+1
net/ipv6/route.c
··· 1091 1091 else { 1092 1092 neigh = ip6_neigh_lookup(&rt->dst, &fl6->daddr); 1093 1093 if (IS_ERR(neigh)) { 1094 + in6_dev_put(idev); 1094 1095 dst_free(&rt->dst); 1095 1096 return ERR_CAST(neigh); 1096 1097 }
+1 -1
net/mac80211/cfg.c
··· 791 791 if (set & BIT(NL80211_STA_FLAG_AUTHORIZED)) 792 792 ret = sta_info_move_state_checked(sta, 793 793 IEEE80211_STA_AUTHORIZED); 794 - else 794 + else if (test_sta_flag(sta, WLAN_STA_AUTHORIZED)) 795 795 ret = sta_info_move_state_checked(sta, 796 796 IEEE80211_STA_ASSOC); 797 797 if (ret)
+1
net/mac80211/rx.c
··· 1979 1979 mesh_path_error_tx(ifmsh->mshcfg.element_ttl, fwd_hdr->addr3, 1980 1980 0, reason, fwd_hdr->addr2, sdata); 1981 1981 IEEE80211_IFSTA_MESH_CTR_INC(ifmsh, dropped_frames_no_route); 1982 + kfree_skb(fwd_skb); 1982 1983 return RX_DROP_MONITOR; 1983 1984 } 1984 1985
+4 -2
net/mac80211/sta_info.c
··· 238 238 if (sta->dead) 239 239 return; 240 240 241 - if (!test_sta_flag(sta, WLAN_STA_PS_STA)) 241 + if (!test_sta_flag(sta, WLAN_STA_PS_STA)) { 242 + local_bh_disable(); 242 243 ieee80211_sta_ps_deliver_wakeup(sta); 243 - else if (test_and_clear_sta_flag(sta, WLAN_STA_PSPOLL)) { 244 + local_bh_enable(); 245 + } else if (test_and_clear_sta_flag(sta, WLAN_STA_PSPOLL)) { 244 246 clear_sta_flag(sta, WLAN_STA_PS_DRIVER); 245 247 246 248 local_bh_disable();
+1 -9
net/mac80211/tx.c
··· 1001 1001 static ieee80211_tx_result debug_noinline 1002 1002 ieee80211_tx_h_encrypt(struct ieee80211_tx_data *tx) 1003 1003 { 1004 - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(tx->skb); 1005 - 1006 1004 if (!tx->key) 1007 1005 return TX_CONTINUE; 1008 1006 ··· 1015 1017 case WLAN_CIPHER_SUITE_AES_CMAC: 1016 1018 return ieee80211_crypto_aes_cmac_encrypt(tx); 1017 1019 default: 1018 - /* handle hw-only algorithm */ 1019 - if (info->control.hw_key) { 1020 - ieee80211_tx_set_protected(tx); 1021 - return TX_CONTINUE; 1022 - } 1023 - break; 1024 - 1020 + return ieee80211_crypto_hw_encrypt(tx); 1025 1021 } 1026 1022 1027 1023 return TX_DROP;
+19
net/mac80211/wpa.c
··· 643 643 644 644 return RX_CONTINUE; 645 645 } 646 + 647 + ieee80211_tx_result 648 + ieee80211_crypto_hw_encrypt(struct ieee80211_tx_data *tx) 649 + { 650 + struct sk_buff *skb; 651 + struct ieee80211_tx_info *info = NULL; 652 + 653 + skb_queue_walk(&tx->skbs, skb) { 654 + info = IEEE80211_SKB_CB(skb); 655 + 656 + /* handle hw-only algorithm */ 657 + if (!info->control.hw_key) 658 + return TX_DROP; 659 + } 660 + 661 + ieee80211_tx_set_protected(tx); 662 + 663 + return TX_CONTINUE; 664 + }
+2
net/mac80211/wpa.h
··· 32 32 ieee80211_crypto_aes_cmac_encrypt(struct ieee80211_tx_data *tx); 33 33 ieee80211_rx_result 34 34 ieee80211_crypto_aes_cmac_decrypt(struct ieee80211_rx_data *rx); 35 + ieee80211_tx_result 36 + ieee80211_crypto_hw_encrypt(struct ieee80211_tx_data *tx); 35 37 36 38 #endif /* WPA_H */
+27 -10
net/netfilter/ipset/ip_set_core.c
··· 77 77 } 78 78 79 79 /* Unlock, try to load a set type module and lock again */ 80 - static int 81 - try_to_load_type(const char *name) 80 + static bool 81 + load_settype(const char *name) 82 82 { 83 83 nfnl_unlock(); 84 84 pr_debug("try to load ip_set_%s\n", name); 85 85 if (request_module("ip_set_%s", name) < 0) { 86 86 pr_warning("Can't find ip_set type %s\n", name); 87 87 nfnl_lock(); 88 - return -IPSET_ERR_FIND_TYPE; 88 + return false; 89 89 } 90 90 nfnl_lock(); 91 - return -EAGAIN; 91 + return true; 92 92 } 93 93 94 94 /* Find a set type and reference it */ 95 + #define find_set_type_get(name, family, revision, found) \ 96 + __find_set_type_get(name, family, revision, found, false) 97 + 95 98 static int 96 - find_set_type_get(const char *name, u8 family, u8 revision, 97 - struct ip_set_type **found) 99 + __find_set_type_get(const char *name, u8 family, u8 revision, 100 + struct ip_set_type **found, bool retry) 98 101 { 99 102 struct ip_set_type *type; 100 103 int err; 104 + 105 + if (retry && !load_settype(name)) 106 + return -IPSET_ERR_FIND_TYPE; 101 107 102 108 rcu_read_lock(); 103 109 *found = find_set_type(name, family, revision); ··· 111 105 err = !try_module_get((*found)->me) ? -EFAULT : 0; 112 106 goto unlock; 113 107 } 114 - /* Make sure the type is loaded but we don't support the revision */ 108 + /* Make sure the type is already loaded 109 + * but we don't support the revision */ 115 110 list_for_each_entry_rcu(type, &ip_set_type_list, list) 116 111 if (STREQ(type->name, name)) { 117 112 err = -IPSET_ERR_FIND_TYPE; ··· 120 113 } 121 114 rcu_read_unlock(); 122 115 123 - return try_to_load_type(name); 116 + return retry ? -IPSET_ERR_FIND_TYPE : 117 + __find_set_type_get(name, family, revision, found, true); 124 118 125 119 unlock: 126 120 rcu_read_unlock(); ··· 132 124 * If we succeeded, the supported minimal and maximum revisions are 133 125 * filled out. 134 126 */ 127 + #define find_set_type_minmax(name, family, min, max) \ 128 + __find_set_type_minmax(name, family, min, max, false) 129 + 135 130 static int 136 - find_set_type_minmax(const char *name, u8 family, u8 *min, u8 *max) 131 + __find_set_type_minmax(const char *name, u8 family, u8 *min, u8 *max, 132 + bool retry) 137 133 { 138 134 struct ip_set_type *type; 139 135 bool found = false; 136 + 137 + if (retry && !load_settype(name)) 138 + return -IPSET_ERR_FIND_TYPE; 140 139 141 140 *min = 255; *max = 0; 142 141 rcu_read_lock(); ··· 160 145 if (found) 161 146 return 0; 162 147 163 - return try_to_load_type(name); 148 + return retry ? -IPSET_ERR_FIND_TYPE : 149 + __find_set_type_minmax(name, family, min, max, true); 164 150 } 165 151 166 152 #define family_name(f) ((f) == AF_INET ? "inet" : \ ··· 1142 1126 if (ret || !cb->args[2]) { 1143 1127 pr_debug("release set %s\n", ip_set_list[index]->name); 1144 1128 ip_set_put_byindex(index); 1129 + cb->args[2] = 0; 1145 1130 } 1146 1131 out: 1147 1132 if (nlh) {
-12
net/netfilter/nf_conntrack_helper.c
··· 121 121 int ret = 0; 122 122 123 123 if (tmpl != NULL) { 124 - /* we've got a userspace helper. */ 125 - if (tmpl->status & IPS_USERSPACE_HELPER) { 126 - help = nf_ct_helper_ext_add(ct, flags); 127 - if (help == NULL) { 128 - ret = -ENOMEM; 129 - goto out; 130 - } 131 - rcu_assign_pointer(help->helper, NULL); 132 - __set_bit(IPS_USERSPACE_HELPER_BIT, &ct->status); 133 - ret = 0; 134 - goto out; 135 - } 136 124 help = nfct_help(tmpl); 137 125 if (help != NULL) 138 126 helper = help->helper;
-4
net/netfilter/nf_conntrack_netlink.c
··· 2042 2042 } 2043 2043 help = nfct_help(ct); 2044 2044 if (!help) { 2045 - err = -EOPNOTSUPP; 2046 - goto out; 2047 - } 2048 - if (test_bit(IPS_USERSPACE_HELPER_BIT, &ct->status)) { 2049 2045 if (!cda[CTA_EXPECT_TIMEOUT]) { 2050 2046 err = -EINVAL; 2051 2047 goto out;
+3 -5
net/netfilter/xt_CT.c
··· 62 62 int ret = 0; 63 63 u8 proto; 64 64 65 - if (info->flags & ~(XT_CT_NOTRACK | XT_CT_USERSPACE_HELPER)) 66 - return -EOPNOTSUPP; 65 + if (info->flags & ~XT_CT_NOTRACK) 66 + return -EINVAL; 67 67 68 68 if (info->flags & XT_CT_NOTRACK) { 69 69 ct = nf_ct_untracked_get(); ··· 92 92 GFP_KERNEL)) 93 93 goto err3; 94 94 95 - if (info->flags & XT_CT_USERSPACE_HELPER) { 96 - __set_bit(IPS_USERSPACE_HELPER_BIT, &ct->status); 97 - } else if (info->helper[0]) { 95 + if (info->helper[0]) { 98 96 ret = -ENOENT; 99 97 proto = xt_ct_find_proto(par); 100 98 if (!proto) {
+4 -1
net/netfilter/xt_hashlimit.c
··· 445 445 { 446 446 __be16 _ports[2], *ports; 447 447 u8 nexthdr; 448 - __be16 frag_off; 449 448 int poff; 450 449 451 450 memset(dst, 0, sizeof(*dst)); ··· 465 466 break; 466 467 #if IS_ENABLED(CONFIG_IP6_NF_IPTABLES) 467 468 case NFPROTO_IPV6: 469 + { 470 + __be16 frag_off; 471 + 468 472 if (hinfo->cfg.mode & XT_HASHLIMIT_HASH_DIP) { 469 473 memcpy(&dst->ip6.dst, &ipv6_hdr(skb)->daddr, 470 474 sizeof(dst->ip6.dst)); ··· 487 485 if ((int)protoff < 0) 488 486 return -1; 489 487 break; 488 + } 490 489 #endif 491 490 default: 492 491 BUG();
+3 -5
net/openvswitch/datapath.c
··· 1 1 /* 2 - * Copyright (c) 2007-2011 Nicira Networks. 2 + * Copyright (c) 2007-2012 Nicira Networks. 3 3 * 4 4 * This program is free software; you can redistribute it and/or 5 5 * modify it under the terms of version 2 of the GNU General Public ··· 36 36 #include <linux/rcupdate.h> 37 37 #include <linux/tcp.h> 38 38 #include <linux/udp.h> 39 - #include <linux/version.h> 40 39 #include <linux/ethtool.h> 41 40 #include <linux/wait.h> 42 41 #include <asm/system.h> ··· 1396 1397 int i = 0; 1397 1398 1398 1399 list_for_each_entry(dp, &dps, list_node) { 1399 - if (i < skip) 1400 - continue; 1401 - if (ovs_dp_cmd_fill_info(dp, skb, NETLINK_CB(cb->skb).pid, 1400 + if (i >= skip && 1401 + ovs_dp_cmd_fill_info(dp, skb, NETLINK_CB(cb->skb).pid, 1402 1402 cb->nlh->nlmsg_seq, NLM_F_MULTI, 1403 1403 OVS_DP_CMD_NEW) < 0) 1404 1404 break;
-1
net/openvswitch/datapath.h
··· 25 25 #include <linux/netdevice.h> 26 26 #include <linux/skbuff.h> 27 27 #include <linux/u64_stats_sync.h> 28 - #include <linux/version.h> 29 28 30 29 #include "flow.h" 31 30
-1
net/openvswitch/flow.c
··· 32 32 #include <linux/in.h> 33 33 #include <linux/rcupdate.h> 34 34 #include <linux/if_arp.h> 35 - #include <linux/if_ether.h> 36 35 #include <linux/ip.h> 37 36 #include <linux/ipv6.h> 38 37 #include <linux/tcp.h>
-1
net/openvswitch/vport-internal_dev.c
··· 23 23 #include <linux/etherdevice.h> 24 24 #include <linux/ethtool.h> 25 25 #include <linux/skbuff.h> 26 - #include <linux/version.h> 27 26 28 27 #include "datapath.h" 29 28 #include "vport-internal_dev.h"
-1
net/openvswitch/vport.c
··· 27 27 #include <linux/rcupdate.h> 28 28 #include <linux/rtnetlink.h> 29 29 #include <linux/compat.h> 30 - #include <linux/version.h> 31 30 32 31 #include "vport.h" 33 32 #include "vport-internal_dev.h"