Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
drm/mgag200: Only set VIDRST bits in CRTC modesetting
The VRSTEN and HRSTEN bits control whether a CRTC synchronizes its
display signal with an external source on the VIDRST pin. The G200WB
and G200EW3 models synchronize with a BMC chip, but different external
video encoders, such as the Matrox Maven, can also be attached to the
pin.
Only set VRSTEN and HRSTEN bits in the CRTC mode-setting code, so the
bits are independent from the BMC. Add the field set_vidrst to the CRTC
state for this purpose. Off by default, control the CRTC VIDRST setting
from the CRTC's atomic_check helper.
v3:
- don't clear bits unnecessary (Jocelyn)
v2:
- keep logic entirely in CRTC (Jocelyn)
Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>
Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240711072415.11831-2-tzimmermann@suse.de
+15
-13
-5
drivers/gpu/drm/mgag200/mgag200_bmc.c
-5
drivers/gpu/drm/mgag200/mgag200_bmc.c
···
77
77
{
78
78
u8 tmp;
79
79
80
-
/* Ensure that the vrsten and hrsten are set */
81
-
WREG8(MGAREG_CRTCEXT_INDEX, 1);
82
-
tmp = RREG8(MGAREG_CRTCEXT_DATA);
83
-
WREG8(MGAREG_CRTCEXT_DATA, tmp | 0x88);
84
-
85
80
/* Assert rstlvl2 */
86
81
WREG8(DAC_INDEX, MGA1064_REMHEADCTL2);
87
82
tmp = RREG8(DAC_DATA);
+4
-1
drivers/gpu/drm/mgag200/mgag200_drv.h
+4
-1
drivers/gpu/drm/mgag200/mgag200_drv.h
···
179
179
const struct drm_format_info *format;
180
180
181
181
struct mgag200_pll_values pixpllc;
182
+
183
+
bool set_vidrst;
182
184
};
183
185
184
186
static inline struct mgag200_crtc_state *to_mgag200_crtc_state(struct drm_crtc_state *base)
···
432
430
.atomic_duplicate_state = mgag200_crtc_atomic_duplicate_state, \
433
431
.atomic_destroy_state = mgag200_crtc_atomic_destroy_state
434
432
435
-
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode);
433
+
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode,
434
+
bool set_vidrst);
436
435
void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format);
437
436
void mgag200_enable_display(struct mga_device *mdev);
438
437
void mgag200_init_registers(struct mga_device *mdev);
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200er.c
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200er.c
···
195
195
funcs->disable_vidrst(mdev);
196
196
197
197
mgag200_set_format_regs(mdev, format);
198
-
mgag200_set_mode_regs(mdev, adjusted_mode);
198
+
mgag200_set_mode_regs(mdev, adjusted_mode, mgag200_crtc_state->set_vidrst);
199
199
200
200
if (funcs->pixpllc_atomic_update)
201
201
funcs->pixpllc_atomic_update(crtc, old_state);
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200ev.c
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200ev.c
···
196
196
funcs->disable_vidrst(mdev);
197
197
198
198
mgag200_set_format_regs(mdev, format);
199
-
mgag200_set_mode_regs(mdev, adjusted_mode);
199
+
mgag200_set_mode_regs(mdev, adjusted_mode, mgag200_crtc_state->set_vidrst);
200
200
201
201
if (funcs->pixpllc_atomic_update)
202
202
funcs->pixpllc_atomic_update(crtc, old_state);
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200se.c
+1
-1
drivers/gpu/drm/mgag200/mgag200_g200se.c
···
327
327
funcs->disable_vidrst(mdev);
328
328
329
329
mgag200_set_format_regs(mdev, format);
330
-
mgag200_set_mode_regs(mdev, adjusted_mode);
330
+
mgag200_set_mode_regs(mdev, adjusted_mode, mgag200_crtc_state->set_vidrst);
331
331
332
332
if (funcs->pixpllc_atomic_update)
333
333
funcs->pixpllc_atomic_update(crtc, old_state);
+8
-4
drivers/gpu/drm/mgag200/mgag200_mode.c
+8
-4
drivers/gpu/drm/mgag200/mgag200_mode.c
···
201
201
WREG8(MGA_MISC_OUT, misc);
202
202
}
203
203
204
-
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode)
204
+
void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode,
205
+
bool set_vidrst)
205
206
{
206
-
const struct mgag200_device_info *info = mdev->info;
207
207
unsigned int hdisplay, hsyncstart, hsyncend, htotal;
208
208
unsigned int vdisplay, vsyncstart, vsyncend, vtotal;
209
209
u8 misc, crtcext1, crtcext2, crtcext5;
···
238
238
((hdisplay & 0x100) >> 7) |
239
239
((hsyncstart & 0x100) >> 6) |
240
240
(htotal & 0x40);
241
-
if (info->has_vidrst)
241
+
if (set_vidrst)
242
242
crtcext1 |= MGAREG_CRTCEXT1_VRSTEN |
243
243
MGAREG_CRTCEXT1_HRSTEN;
244
244
···
597
597
struct mga_device *mdev = to_mga_device(dev);
598
598
const struct mgag200_device_funcs *funcs = mdev->funcs;
599
599
struct drm_crtc_state *new_crtc_state = drm_atomic_get_new_crtc_state(new_state, crtc);
600
+
struct mgag200_crtc_state *new_mgag200_crtc_state = to_mgag200_crtc_state(new_crtc_state);
600
601
struct drm_property_blob *new_gamma_lut = new_crtc_state->gamma_lut;
601
602
int ret;
602
603
···
607
606
ret = drm_atomic_helper_check_crtc_primary_plane(new_crtc_state);
608
607
if (ret)
609
608
return ret;
609
+
610
+
new_mgag200_crtc_state->set_vidrst = mdev->info->has_vidrst;
610
611
611
612
if (new_crtc_state->mode_changed) {
612
613
if (funcs->pixpllc_atomic_check) {
···
659
656
funcs->disable_vidrst(mdev);
660
657
661
658
mgag200_set_format_regs(mdev, format);
662
-
mgag200_set_mode_regs(mdev, adjusted_mode);
659
+
mgag200_set_mode_regs(mdev, adjusted_mode, mgag200_crtc_state->set_vidrst);
663
660
664
661
if (funcs->pixpllc_atomic_update)
665
662
funcs->pixpllc_atomic_update(crtc, old_state);
···
720
717
new_mgag200_crtc_state->format = mgag200_crtc_state->format;
721
718
memcpy(&new_mgag200_crtc_state->pixpllc, &mgag200_crtc_state->pixpllc,
722
719
sizeof(new_mgag200_crtc_state->pixpllc));
720
+
new_mgag200_crtc_state->set_vidrst = mgag200_crtc_state->set_vidrst;
723
721
724
722
return &new_mgag200_crtc_state->base;
725
723
}