Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge tag 'xtensa-20190201' of git://github.com/jcmvbkbc/linux-xtensa
Pull xtensa fixes from Max Filippov:
- fix ccount_timer_shutdown for secondary CPUs
- fix secondary CPU initialization
- fix secondary CPU reset vector clash with double exception vector
- fix present CPUs when booting with 'maxcpus' parameter
- limit possible CPUs by configured NR_CPUS
- issue a warning if xtensa PIC is asked to retrigger anything other
than software IRQ
- fix masking/unmasking of the first two IRQs on xtensa MX PIC
- fix typo in Kconfig description for user space unaligned access
feature
- fix Kconfig warning for selecting BUILTIN_DTB
* tag 'xtensa-20190201' of git://github.com/jcmvbkbc/linux-xtensa:
xtensa: SMP: limit number of possible CPUs by NR_CPUS
xtensa: rename BUILTIN_DTB to BUILTIN_DTB_SOURCE
xtensa: Fix typo use space=>user space
drivers/irqchip: xtensa-mx: fix mask and unmask
drivers/irqchip: xtensa: add warning to irq_retrigger
xtensa: SMP: mark each possible CPU as present
xtensa: smp_lx200_defconfig: fix vectors clash
xtensa: SMP: fix secondary CPU initialization
xtensa: SMP: fix ccount_timer_shutdown
+73
-42
+2
-2
arch/xtensa/Kconfig
+2
-2
arch/xtensa/Kconfig
···
164
164
If unsure, say N.
165
165
166
166
config XTENSA_UNALIGNED_USER
167
-
bool "Unaligned memory access in use space"
167
+
bool "Unaligned memory access in user space"
168
168
help
169
169
The Xtensa architecture currently does not handle unaligned
170
170
memory accesses in hardware but through an exception handler.
···
451
451
help
452
452
Include support for flattened device tree machine descriptions.
453
453
454
-
config BUILTIN_DTB
454
+
config BUILTIN_DTB_SOURCE
455
455
string "DTB to build into the kernel image"
456
456
depends on OF
457
457
+3
-3
arch/xtensa/boot/dts/Makefile
+3
-3
arch/xtensa/boot/dts/Makefile
···
7
7
#
8
8
#
9
9
10
-
BUILTIN_DTB := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB)).dtb.o
11
-
ifneq ($(CONFIG_BUILTIN_DTB),"")
12
-
obj-$(CONFIG_OF) += $(BUILTIN_DTB)
10
+
BUILTIN_DTB_SOURCE := $(patsubst "%",%,$(CONFIG_BUILTIN_DTB_SOURCE)).dtb.o
11
+
ifneq ($(CONFIG_BUILTIN_DTB_SOURCE),"")
12
+
obj-$(CONFIG_OF) += $(BUILTIN_DTB_SOURCE)
13
13
endif
14
14
15
15
# for CONFIG_OF_ALL_DTBS test
+1
-1
arch/xtensa/configs/audio_kc705_defconfig
+1
-1
arch/xtensa/configs/audio_kc705_defconfig
···
34
34
CONFIG_CMDLINE_BOOL=y
35
35
CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=0x38000000@0"
36
36
CONFIG_USE_OF=y
37
-
CONFIG_BUILTIN_DTB="kc705"
37
+
CONFIG_BUILTIN_DTB_SOURCE="kc705"
38
38
# CONFIG_COMPACTION is not set
39
39
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
40
40
CONFIG_PM=y
+1
-1
arch/xtensa/configs/cadence_csp_defconfig
+1
-1
arch/xtensa/configs/cadence_csp_defconfig
+1
-1
arch/xtensa/configs/generic_kc705_defconfig
+1
-1
arch/xtensa/configs/generic_kc705_defconfig
···
33
33
CONFIG_CMDLINE_BOOL=y
34
34
CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=0x38000000@0"
35
35
CONFIG_USE_OF=y
36
-
CONFIG_BUILTIN_DTB="kc705"
36
+
CONFIG_BUILTIN_DTB_SOURCE="kc705"
37
37
# CONFIG_COMPACTION is not set
38
38
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
39
39
CONFIG_NET=y
+1
-1
arch/xtensa/configs/nommu_kc705_defconfig
+1
-1
arch/xtensa/configs/nommu_kc705_defconfig
···
39
39
CONFIG_CMDLINE_BOOL=y
40
40
CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0x9d050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=256M@0x60000000"
41
41
CONFIG_USE_OF=y
42
-
CONFIG_BUILTIN_DTB="kc705_nommu"
42
+
CONFIG_BUILTIN_DTB_SOURCE="kc705_nommu"
43
43
CONFIG_BINFMT_FLAT=y
44
44
CONFIG_NET=y
45
45
CONFIG_PACKET=y
+2
-1
arch/xtensa/configs/smp_lx200_defconfig
+2
-1
arch/xtensa/configs/smp_lx200_defconfig
···
33
33
CONFIG_HOTPLUG_CPU=y
34
34
# CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is not set
35
35
# CONFIG_PCI is not set
36
+
CONFIG_VECTORS_OFFSET=0x00002000
36
37
CONFIG_XTENSA_PLATFORM_XTFPGA=y
37
38
CONFIG_CMDLINE_BOOL=y
38
39
CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=96M@0"
39
40
CONFIG_USE_OF=y
40
-
CONFIG_BUILTIN_DTB="lx200mx"
41
+
CONFIG_BUILTIN_DTB_SOURCE="lx200mx"
41
42
# CONFIG_COMPACTION is not set
42
43
# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
43
44
CONFIG_NET=y
+4
-1
arch/xtensa/kernel/head.S
+4
-1
arch/xtensa/kernel/head.S
···
276
276
277
277
movi a2, cpu_start_ccount
278
278
1:
279
+
memw
279
280
l32i a3, a2, 0
280
281
beqi a3, 0, 1b
281
282
movi a3, 0
282
283
s32i a3, a2, 0
283
-
memw
284
284
1:
285
+
memw
285
286
l32i a3, a2, 0
286
287
beqi a3, 0, 1b
287
288
wsr a3, ccount
···
318
317
rsr a0, prid
319
318
neg a2, a0
320
319
movi a3, cpu_start_id
320
+
memw
321
321
s32i a2, a3, 0
322
322
#if XCHAL_DCACHE_IS_WRITEBACK
323
323
dhwbi a3, 0
324
324
#endif
325
325
1:
326
+
memw
326
327
l32i a2, a3, 0
327
328
dhi a3, 0
328
329
bne a2, a0, 1b
+27
-14
arch/xtensa/kernel/smp.c
+27
-14
arch/xtensa/kernel/smp.c
···
83
83
{
84
84
unsigned i;
85
85
86
-
for (i = 0; i < max_cpus; ++i)
86
+
for_each_possible_cpu(i)
87
87
set_cpu_present(i, true);
88
88
}
89
89
···
95
95
96
96
pr_info("%s: Core Count = %d\n", __func__, ncpus);
97
97
pr_info("%s: Core Id = %d\n", __func__, core_id);
98
+
99
+
if (ncpus > NR_CPUS) {
100
+
ncpus = NR_CPUS;
101
+
pr_info("%s: limiting core count by %d\n", __func__, ncpus);
102
+
}
98
103
99
104
for (i = 0; i < ncpus; ++i)
100
105
set_cpu_possible(i, true);
···
200
195
int i;
201
196
202
197
#ifdef CONFIG_HOTPLUG_CPU
203
-
cpu_start_id = cpu;
204
-
system_flush_invalidate_dcache_range(
205
-
(unsigned long)&cpu_start_id, sizeof(cpu_start_id));
198
+
WRITE_ONCE(cpu_start_id, cpu);
199
+
/* Pairs with the third memw in the cpu_restart */
200
+
mb();
201
+
system_flush_invalidate_dcache_range((unsigned long)&cpu_start_id,
202
+
sizeof(cpu_start_id));
206
203
#endif
207
204
smp_call_function_single(0, mx_cpu_start, (void *)cpu, 1);
208
205
···
213
206
ccount = get_ccount();
214
207
while (!ccount);
215
208
216
-
cpu_start_ccount = ccount;
209
+
WRITE_ONCE(cpu_start_ccount, ccount);
217
210
218
-
while (time_before(jiffies, timeout)) {
211
+
do {
212
+
/*
213
+
* Pairs with the first two memws in the
214
+
* .Lboot_secondary.
215
+
*/
219
216
mb();
220
-
if (!cpu_start_ccount)
221
-
break;
222
-
}
217
+
ccount = READ_ONCE(cpu_start_ccount);
218
+
} while (ccount && time_before(jiffies, timeout));
223
219
224
-
if (cpu_start_ccount) {
220
+
if (ccount) {
225
221
smp_call_function_single(0, mx_cpu_stop,
226
-
(void *)cpu, 1);
227
-
cpu_start_ccount = 0;
222
+
(void *)cpu, 1);
223
+
WRITE_ONCE(cpu_start_ccount, 0);
228
224
return -EIO;
229
225
}
230
226
}
···
247
237
pr_debug("%s: Calling wakeup_secondary(cpu:%d, idle:%p, sp: %08lx)\n",
248
238
__func__, cpu, idle, start_info.stack);
249
239
240
+
init_completion(&cpu_running);
250
241
ret = boot_secondary(cpu, idle);
251
242
if (ret == 0) {
252
243
wait_for_completion_timeout(&cpu_running,
···
309
298
unsigned long timeout = jiffies + msecs_to_jiffies(1000);
310
299
while (time_before(jiffies, timeout)) {
311
300
system_invalidate_dcache_range((unsigned long)&cpu_start_id,
312
-
sizeof(cpu_start_id));
313
-
if (cpu_start_id == -cpu) {
301
+
sizeof(cpu_start_id));
302
+
/* Pairs with the second memw in the cpu_restart */
303
+
mb();
304
+
if (READ_ONCE(cpu_start_id) == -cpu) {
314
305
platform_cpu_kill(cpu);
315
306
return;
316
307
}
+1
-1
arch/xtensa/kernel/time.c
+1
-1
arch/xtensa/kernel/time.c
+25
-15
drivers/irqchip/irq-xtensa-mx.c
+25
-15
drivers/irqchip/irq-xtensa-mx.c
···
71
71
unsigned int mask = 1u << d->hwirq;
72
72
73
73
if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE |
74
-
XCHAL_INTTYPE_MASK_EXTERN_LEVEL)) {
75
-
set_er(1u << (xtensa_get_ext_irq_no(d->hwirq) -
76
-
HW_IRQ_MX_BASE), MIENG);
77
-
} else {
78
-
mask = __this_cpu_read(cached_irq_mask) & ~mask;
79
-
__this_cpu_write(cached_irq_mask, mask);
80
-
xtensa_set_sr(mask, intenable);
74
+
XCHAL_INTTYPE_MASK_EXTERN_LEVEL)) {
75
+
unsigned int ext_irq = xtensa_get_ext_irq_no(d->hwirq);
76
+
77
+
if (ext_irq >= HW_IRQ_MX_BASE) {
78
+
set_er(1u << (ext_irq - HW_IRQ_MX_BASE), MIENG);
79
+
return;
80
+
}
81
81
}
82
+
mask = __this_cpu_read(cached_irq_mask) & ~mask;
83
+
__this_cpu_write(cached_irq_mask, mask);
84
+
xtensa_set_sr(mask, intenable);
82
85
}
83
86
84
87
static void xtensa_mx_irq_unmask(struct irq_data *d)
···
89
86
unsigned int mask = 1u << d->hwirq;
90
87
91
88
if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE |
92
-
XCHAL_INTTYPE_MASK_EXTERN_LEVEL)) {
93
-
set_er(1u << (xtensa_get_ext_irq_no(d->hwirq) -
94
-
HW_IRQ_MX_BASE), MIENGSET);
95
-
} else {
96
-
mask |= __this_cpu_read(cached_irq_mask);
97
-
__this_cpu_write(cached_irq_mask, mask);
98
-
xtensa_set_sr(mask, intenable);
89
+
XCHAL_INTTYPE_MASK_EXTERN_LEVEL)) {
90
+
unsigned int ext_irq = xtensa_get_ext_irq_no(d->hwirq);
91
+
92
+
if (ext_irq >= HW_IRQ_MX_BASE) {
93
+
set_er(1u << (ext_irq - HW_IRQ_MX_BASE), MIENGSET);
94
+
return;
95
+
}
99
96
}
97
+
mask |= __this_cpu_read(cached_irq_mask);
98
+
__this_cpu_write(cached_irq_mask, mask);
99
+
xtensa_set_sr(mask, intenable);
100
100
}
101
101
102
102
static void xtensa_mx_irq_enable(struct irq_data *d)
···
119
113
120
114
static int xtensa_mx_irq_retrigger(struct irq_data *d)
121
115
{
122
-
xtensa_set_sr(1 << d->hwirq, intset);
116
+
unsigned int mask = 1u << d->hwirq;
117
+
118
+
if (WARN_ON(mask & ~XCHAL_INTTYPE_MASK_SOFTWARE))
119
+
return 0;
120
+
xtensa_set_sr(mask, intset);
123
121
return 1;
124
122
}
125
123
+5
-1
drivers/irqchip/irq-xtensa-pic.c
+5
-1
drivers/irqchip/irq-xtensa-pic.c