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Merge branch 'axienet-coding-style' into main
Radhey Shyam Pandey says:
====================
net: axienet: Fix coding style issues
This patchset replace all occurences of (1<<x) by BIT(x) to get rid
of checkpatch.pl "CHECK" output "Prefer using the BIT macro".
It also removes unnecessary ftrace-like logging, add missing blank line
after declaration and remove unnecessary parentheses around 'ndev->mtu
<= XAE_JUMBO_MTU' and 'ndev->mtu > XAE_MTU'.
Changes for v2:
- Split each coding style change into separate patch.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
+17
-20
+14
-14
drivers/net/ethernet/xilinx/xilinx_axienet.h
+14
-14
drivers/net/ethernet/xilinx/xilinx_axienet.h
···
29
29
/* Configuration options */
30
30
31
31
/* Accept all incoming packets. Default: disabled (cleared) */
32
-
#define XAE_OPTION_PROMISC (1 << 0)
32
+
#define XAE_OPTION_PROMISC BIT(0)
33
33
34
34
/* Jumbo frame support for Tx & Rx. Default: disabled (cleared) */
35
-
#define XAE_OPTION_JUMBO (1 << 1)
35
+
#define XAE_OPTION_JUMBO BIT(1)
36
36
37
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/* VLAN Rx & Tx frame support. Default: disabled (cleared) */
38
-
#define XAE_OPTION_VLAN (1 << 2)
38
+
#define XAE_OPTION_VLAN BIT(2)
39
39
40
40
/* Enable recognition of flow control frames on Rx. Default: enabled (set) */
41
-
#define XAE_OPTION_FLOW_CONTROL (1 << 4)
41
+
#define XAE_OPTION_FLOW_CONTROL BIT(4)
42
42
43
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/* Strip FCS and PAD from incoming frames. Note: PAD from VLAN frames is not
44
44
* stripped. Default: disabled (set)
45
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*/
46
-
#define XAE_OPTION_FCS_STRIP (1 << 5)
46
+
#define XAE_OPTION_FCS_STRIP BIT(5)
47
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/* Generate FCS field and add PAD automatically for outgoing frames.
49
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* Default: enabled (set)
50
50
*/
51
-
#define XAE_OPTION_FCS_INSERT (1 << 6)
51
+
#define XAE_OPTION_FCS_INSERT BIT(6)
52
52
53
53
/* Enable Length/Type error checking for incoming frames. When this option is
54
54
* set, the MAC will filter frames that have a mismatched type/length field
···
56
56
* types of frames are encountered. When this option is cleared, the MAC will
57
57
* allow these types of frames to be received. Default: enabled (set)
58
58
*/
59
-
#define XAE_OPTION_LENTYPE_ERR (1 << 7)
59
+
#define XAE_OPTION_LENTYPE_ERR BIT(7)
60
60
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61
/* Enable the transmitter. Default: enabled (set) */
62
-
#define XAE_OPTION_TXEN (1 << 11)
62
+
#define XAE_OPTION_TXEN BIT(11)
63
63
64
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/* Enable the receiver. Default: enabled (set) */
65
-
#define XAE_OPTION_RXEN (1 << 12)
65
+
#define XAE_OPTION_RXEN BIT(12)
66
66
67
67
/* Default options set when device is initialized or reset */
68
68
#define XAE_OPTION_DEFAULTS \
···
326
326
#define XAE_MULTICAST_CAM_TABLE_NUM 4
327
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328
328
/* Axi Ethernet Synthesis features */
329
-
#define XAE_FEATURE_PARTIAL_RX_CSUM (1 << 0)
330
-
#define XAE_FEATURE_PARTIAL_TX_CSUM (1 << 1)
331
-
#define XAE_FEATURE_FULL_RX_CSUM (1 << 2)
332
-
#define XAE_FEATURE_FULL_TX_CSUM (1 << 3)
333
-
#define XAE_FEATURE_DMA_64BIT (1 << 4)
329
+
#define XAE_FEATURE_PARTIAL_RX_CSUM BIT(0)
330
+
#define XAE_FEATURE_PARTIAL_TX_CSUM BIT(1)
331
+
#define XAE_FEATURE_FULL_RX_CSUM BIT(2)
332
+
#define XAE_FEATURE_FULL_TX_CSUM BIT(3)
333
+
#define XAE_FEATURE_DMA_64BIT BIT(4)
334
334
335
335
#define XAE_NO_CSUM_OFFLOAD 0
336
336
+3
-6
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
+3
-6
drivers/net/ethernet/xilinx/xilinx_axienet_main.c
···
415
415
static int netdev_set_mac_address(struct net_device *ndev, void *p)
416
416
{
417
417
struct sockaddr *addr = p;
418
+
418
419
axienet_set_mac_address(ndev, addr->sa_data);
419
420
return 0;
420
421
}
···
614
613
lp->options |= XAE_OPTION_VLAN;
615
614
lp->options &= (~XAE_OPTION_JUMBO);
616
615
617
-
if ((ndev->mtu > XAE_MTU) &&
618
-
(ndev->mtu <= XAE_JUMBO_MTU)) {
616
+
if (ndev->mtu > XAE_MTU && ndev->mtu <= XAE_JUMBO_MTU) {
619
617
lp->max_frm_size = ndev->mtu + VLAN_ETH_HLEN +
620
618
XAE_TRL_SIZE;
621
619
···
1514
1514
int ret;
1515
1515
struct axienet_local *lp = netdev_priv(ndev);
1516
1516
1517
-
dev_dbg(&ndev->dev, "%s\n", __func__);
1518
-
1519
1517
/* When we do an Axi Ethernet reset, it resets the complete core
1520
1518
* including the MDIO. MDIO must be disabled before resetting.
1521
1519
* Hold MDIO bus lock to avoid MDIO accesses during the reset.
···
1573
1575
{
1574
1576
struct axienet_local *lp = netdev_priv(ndev);
1575
1577
int i;
1576
-
1577
-
dev_dbg(&ndev->dev, "axienet_close()\n");
1578
1578
1579
1579
if (!lp->use_dmaengine) {
1580
1580
napi_disable(&lp->napi_tx);
···
1653
1657
static void axienet_poll_controller(struct net_device *ndev)
1654
1658
{
1655
1659
struct axienet_local *lp = netdev_priv(ndev);
1660
+
1656
1661
disable_irq(lp->tx_irq);
1657
1662
disable_irq(lp->rx_irq);
1658
1663
axienet_rx_irq(lp->tx_irq, ndev);