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Merge tag 'perf-urgent-2020-08-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull x86 perf fix from Thomas Gleixner:
"A single update for perf on x86 which has support for the broken down
bandwith counters"

* tag 'perf-urgent-2020-08-23' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
perf/x86/intel/uncore: Add BW counters for GT, IA and IO breakdown

+49 -3
+49 -3
arch/x86/events/intel/uncore_snb.c
··· 390 390 INTEL_UNCORE_EVENT_DESC(data_writes.scale, "6.103515625e-5"), 391 391 INTEL_UNCORE_EVENT_DESC(data_writes.unit, "MiB"), 392 392 393 + INTEL_UNCORE_EVENT_DESC(gt_requests, "event=0x03"), 394 + INTEL_UNCORE_EVENT_DESC(gt_requests.scale, "6.103515625e-5"), 395 + INTEL_UNCORE_EVENT_DESC(gt_requests.unit, "MiB"), 396 + 397 + INTEL_UNCORE_EVENT_DESC(ia_requests, "event=0x04"), 398 + INTEL_UNCORE_EVENT_DESC(ia_requests.scale, "6.103515625e-5"), 399 + INTEL_UNCORE_EVENT_DESC(ia_requests.unit, "MiB"), 400 + 401 + INTEL_UNCORE_EVENT_DESC(io_requests, "event=0x05"), 402 + INTEL_UNCORE_EVENT_DESC(io_requests.scale, "6.103515625e-5"), 403 + INTEL_UNCORE_EVENT_DESC(io_requests.unit, "MiB"), 404 + 393 405 { /* end: all zeroes */ }, 394 406 }; 395 407 ··· 417 405 #define SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE 0x5054 418 406 #define SNB_UNCORE_PCI_IMC_CTR_BASE SNB_UNCORE_PCI_IMC_DATA_READS_BASE 419 407 408 + /* BW break down- legacy counters */ 409 + #define SNB_UNCORE_PCI_IMC_GT_REQUESTS 0x3 410 + #define SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE 0x5040 411 + #define SNB_UNCORE_PCI_IMC_IA_REQUESTS 0x4 412 + #define SNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE 0x5044 413 + #define SNB_UNCORE_PCI_IMC_IO_REQUESTS 0x5 414 + #define SNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE 0x5048 415 + 420 416 enum perf_snb_uncore_imc_freerunning_types { 421 - SNB_PCI_UNCORE_IMC_DATA = 0, 417 + SNB_PCI_UNCORE_IMC_DATA_READS = 0, 418 + SNB_PCI_UNCORE_IMC_DATA_WRITES, 419 + SNB_PCI_UNCORE_IMC_GT_REQUESTS, 420 + SNB_PCI_UNCORE_IMC_IA_REQUESTS, 421 + SNB_PCI_UNCORE_IMC_IO_REQUESTS, 422 + 422 423 SNB_PCI_UNCORE_IMC_FREERUNNING_TYPE_MAX, 423 424 }; 424 425 425 426 static struct freerunning_counters snb_uncore_imc_freerunning[] = { 426 - [SNB_PCI_UNCORE_IMC_DATA] = { SNB_UNCORE_PCI_IMC_DATA_READS_BASE, 0x4, 0x0, 2, 32 }, 427 + [SNB_PCI_UNCORE_IMC_DATA_READS] = { SNB_UNCORE_PCI_IMC_DATA_READS_BASE, 428 + 0x0, 0x0, 1, 32 }, 429 + [SNB_PCI_UNCORE_IMC_DATA_READS] = { SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE, 430 + 0x0, 0x0, 1, 32 }, 431 + [SNB_PCI_UNCORE_IMC_GT_REQUESTS] = { SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE, 432 + 0x0, 0x0, 1, 32 }, 433 + [SNB_PCI_UNCORE_IMC_IA_REQUESTS] = { SNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE, 434 + 0x0, 0x0, 1, 32 }, 435 + [SNB_PCI_UNCORE_IMC_IO_REQUESTS] = { SNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE, 436 + 0x0, 0x0, 1, 32 }, 427 437 }; 428 438 429 439 static struct attribute *snb_uncore_imc_formats_attr[] = { ··· 559 525 base = SNB_UNCORE_PCI_IMC_DATA_WRITES_BASE; 560 526 idx = UNCORE_PMC_IDX_FREERUNNING; 561 527 break; 528 + case SNB_UNCORE_PCI_IMC_GT_REQUESTS: 529 + base = SNB_UNCORE_PCI_IMC_GT_REQUESTS_BASE; 530 + idx = UNCORE_PMC_IDX_FREERUNNING; 531 + break; 532 + case SNB_UNCORE_PCI_IMC_IA_REQUESTS: 533 + base = SNB_UNCORE_PCI_IMC_IA_REQUESTS_BASE; 534 + idx = UNCORE_PMC_IDX_FREERUNNING; 535 + break; 536 + case SNB_UNCORE_PCI_IMC_IO_REQUESTS: 537 + base = SNB_UNCORE_PCI_IMC_IO_REQUESTS_BASE; 538 + idx = UNCORE_PMC_IDX_FREERUNNING; 539 + break; 562 540 default: 563 541 return -EINVAL; 564 542 } ··· 644 598 645 599 static struct intel_uncore_type snb_uncore_imc = { 646 600 .name = "imc", 647 - .num_counters = 2, 601 + .num_counters = 5, 648 602 .num_boxes = 1, 649 603 .num_freerunning_types = SNB_PCI_UNCORE_IMC_FREERUNNING_TYPE_MAX, 650 604 .mmio_map_size = SNB_UNCORE_PCI_IMC_MAP_SIZE,