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drm/msm/dsi: Add support for RGB101010 pixel format

Add video and command mode destination format mappings for RGB101010,
and extend the VID_CFG0 DST_FORMAT bitfield to 3 bits to accommodate
the new format value.

Make sure this is guarded behind MSM_DSI_6G_VER >= V2.1.0 as anything
older does not support this.

Required for 10 bit panels such as the BOE BF068MWM-TD0 found on the
Nothing Phone (3a).

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Alexander Koskovich <akoskovich@pm.me>
Patchwork: https://patchwork.freedesktop.org/patch/713721/
Link: https://lore.kernel.org/r/20260324-dsi-rgb101010-support-v5-5-ff6afc904115@pm.me
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>

authored by

Alexander Koskovich and committed by
Dmitry Baryshkov cebf747a a65c4d30

+26 -1
+22
drivers/gpu/drm/msm/dsi/dsi_host.c
··· 758 758 dsi_get_vid_fmt(const enum mipi_dsi_pixel_format mipi_fmt) 759 759 { 760 760 switch (mipi_fmt) { 761 + case MIPI_DSI_FMT_RGB101010: return VID_DST_FORMAT_RGB101010; 761 762 case MIPI_DSI_FMT_RGB888: return VID_DST_FORMAT_RGB888; 762 763 case MIPI_DSI_FMT_RGB666: return VID_DST_FORMAT_RGB666_LOOSE; 763 764 case MIPI_DSI_FMT_RGB666_PACKED: return VID_DST_FORMAT_RGB666; ··· 771 770 dsi_get_cmd_fmt(const enum mipi_dsi_pixel_format mipi_fmt) 772 771 { 773 772 switch (mipi_fmt) { 773 + case MIPI_DSI_FMT_RGB101010: return CMD_DST_FORMAT_RGB101010; 774 774 case MIPI_DSI_FMT_RGB888: return CMD_DST_FORMAT_RGB888; 775 775 case MIPI_DSI_FMT_RGB666_PACKED: 776 776 case MIPI_DSI_FMT_RGB666: return CMD_DST_FORMAT_RGB666; ··· 1720 1718 msm_host->mode_flags = dsi->mode_flags; 1721 1719 if (dsi->dsc) 1722 1720 msm_host->dsc = dsi->dsc; 1721 + 1722 + if (msm_host->format == MIPI_DSI_FMT_RGB101010) { 1723 + if (!msm_dsi_host_version_geq(msm_host, MSM_DSI_VER_MAJOR_6G, 1724 + MSM_DSI_6G_VER_MINOR_V2_1_0)) { 1725 + DRM_DEV_ERROR(&msm_host->pdev->dev, 1726 + "RGB101010 not supported on this DSI controller\n"); 1727 + return -EINVAL; 1728 + } 1729 + 1730 + /* 1731 + * Downstream overrides RGB101010 back to RGB888 when DSC is enabled 1732 + * but widebus is not. Using RGB101010 in this case may require some 1733 + * extra changes. 1734 + */ 1735 + if (msm_host->dsc && 1736 + !msm_dsi_host_is_wide_bus_enabled(&msm_host->base)) { 1737 + dev_warn(&msm_host->pdev->dev, 1738 + "RGB101010 with DSC but without widebus, may need extra changes\n"); 1739 + } 1740 + } 1723 1741 1724 1742 ret = dsi_dev_attach(msm_host->pdev); 1725 1743 if (ret)
+4 -1
drivers/gpu/drm/msm/registers/display/dsi.xml
··· 15 15 <value name="VID_DST_FORMAT_RGB666" value="1"/> 16 16 <value name="VID_DST_FORMAT_RGB666_LOOSE" value="2"/> 17 17 <value name="VID_DST_FORMAT_RGB888" value="3"/> 18 + <value name="VID_DST_FORMAT_RGB101010" value="4"/> 18 19 </enum> 19 20 <enum name="dsi_rgb_swap"> 20 21 <value name="SWAP_RGB" value="0"/> ··· 40 39 <value name="CMD_DST_FORMAT_RGB565" value="6"/> 41 40 <value name="CMD_DST_FORMAT_RGB666" value="7"/> 42 41 <value name="CMD_DST_FORMAT_RGB888" value="8"/> 42 + <value name="CMD_DST_FORMAT_RGB101010" value="9"/> 43 43 </enum> 44 44 <enum name="dsi_lane_swap"> 45 45 <value name="LANE_SWAP_0123" value="0"/> ··· 144 142 </reg32> 145 143 <reg32 offset="0x0000c" name="VID_CFG0"> 146 144 <bitfield name="VIRT_CHANNEL" low="0" high="1" type="uint"/> <!-- always zero? --> 147 - <bitfield name="DST_FORMAT" low="4" high="5" type="dsi_vid_dst_format"/> 145 + <!-- high was 5 before DSI 6G 2.1.0 --> 146 + <bitfield name="DST_FORMAT" low="4" high="6" type="dsi_vid_dst_format"/> 148 147 <bitfield name="TRAFFIC_MODE" low="8" high="9" type="dsi_traffic_mode"/> 149 148 <bitfield name="BLLP_POWER_STOP" pos="12" type="boolean"/> 150 149 <bitfield name="EOF_BLLP_POWER_STOP" pos="15" type="boolean"/>