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Merge tag 'fpga-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga into char-misc-next

Moritz writes:

FPGA Manager changes for 5.4-rc1

Here is the first set of changes for the 5.4-rc1 merge window.

They're all more or less cleanup patches:

- Carlos' patch addresses a checkpatch warning
- My first patch changes the return type of a function to align it with
the fact that nothing checks the return value and it uncoditionally
returned 0 anyways
- My second patch somehow fell through the cracks before and cleans up
the FPGA bridge bindings by consolidating them instead of repeating
the same paragraph over and over again.

All of these patches have been in the last few linux-next releases
without issues.

Signed-off-by: Moritz Fischer <mdf@kernel.org>

* tag 'fpga-for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mdf/linux-fpga:
dt-bindings: fpga: Consolidate bridge properties
fpga: altera-pr-ip: Make alt_pr_unregister function void
fpga: altera-cvp: Fix function definition argument

Greg Kroah-Hartman cec2caed f51cf9e2

+25 -24
+1 -4
Documentation/devicetree/bindings/fpga/altera-fpga2sdram-bridge.txt
··· 3 3 Required properties: 4 4 - compatible : Should contain "altr,socfpga-fpga2sdram-bridge" 5 5 6 - Optional properties: 7 - - bridge-enable : 0 if driver should disable bridge at startup 8 - 1 if driver should enable bridge at startup 9 - Default is to leave bridge in current state. 6 + See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 10 7 11 8 Example: 12 9 fpga_bridge3: fpga-bridge@ffc25080 {
+1 -4
Documentation/devicetree/bindings/fpga/altera-freeze-bridge.txt
··· 10 10 - compatible : Should contain "altr,freeze-bridge-controller" 11 11 - regs : base address and size for freeze bridge module 12 12 13 - Optional properties: 14 - - bridge-enable : 0 if driver should disable bridge at startup 15 - 1 if driver should enable bridge at startup 16 - Default is to leave bridge in current state. 13 + See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 17 14 18 15 Example: 19 16 freeze-controller@100000450 {
+1 -4
Documentation/devicetree/bindings/fpga/altera-hps2fpga-bridge.txt
··· 9 9 - resets : Phandle and reset specifier for this bridge's reset 10 10 - clocks : Clocks used by this module. 11 11 12 - Optional properties: 13 - - bridge-enable : 0 if driver should disable bridge at startup. 14 - 1 if driver should enable bridge at startup. 15 - Default is to leave bridge in its current state. 12 + See Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 16 13 17 14 Example: 18 15 fpga_bridge0: fpga-bridge@ff400000 {
+13
Documentation/devicetree/bindings/fpga/fpga-bridge.txt
··· 1 + FPGA Bridge Device Tree Binding 2 + 3 + Optional properties: 4 + - bridge-enable : 0 if driver should disable bridge at startup 5 + 1 if driver should enable bridge at startup 6 + Default is to leave bridge in current state. 7 + 8 + Example: 9 + fpga_bridge3: fpga-bridge@ffc25080 { 10 + compatible = "altr,socfpga-fpga2sdram-bridge"; 11 + reg = <0xffc25080 0x4>; 12 + bridge-enable = <0>; 13 + };
+2 -6
Documentation/devicetree/bindings/fpga/xilinx-pr-decoupler.txt
··· 18 18 - clocks : input clock to IP 19 19 - clock-names : should contain "aclk" 20 20 21 - Optional properties: 22 - - bridge-enable : 0 if driver should disable bridge at startup 23 - 1 if driver should enable bridge at startup 24 - Default is to leave bridge in current state. 25 - 26 - See Documentation/devicetree/bindings/fpga/fpga-region.txt for generic bindings. 21 + See Documentation/devicetree/bindings/fpga/fpga-region.txt and 22 + Documentation/devicetree/bindings/fpga/fpga-bridge.txt for generic bindings. 27 23 28 24 Example: 29 25 fpga-bridge@100000450 {
+2 -1
drivers/fpga/altera-cvp.c
··· 57 57 struct fpga_manager *mgr; 58 58 struct pci_dev *pci_dev; 59 59 void __iomem *map; 60 - void (*write_data)(struct altera_cvp_conf *, u32); 60 + void (*write_data)(struct altera_cvp_conf *conf, 61 + u32 data); 61 62 char mgr_name[64]; 62 63 u8 numclks; 63 64 };
+3 -1
drivers/fpga/altera-pr-ip-core-plat.c
··· 32 32 { 33 33 struct device *dev = &pdev->dev; 34 34 35 - return alt_pr_unregister(dev); 35 + alt_pr_unregister(dev); 36 + 37 + return 0; 36 38 } 37 39 38 40 static const struct of_device_id alt_pr_of_match[] = {
+1 -3
drivers/fpga/altera-pr-ip-core.c
··· 201 201 } 202 202 EXPORT_SYMBOL_GPL(alt_pr_register); 203 203 204 - int alt_pr_unregister(struct device *dev) 204 + void alt_pr_unregister(struct device *dev) 205 205 { 206 206 struct fpga_manager *mgr = dev_get_drvdata(dev); 207 207 208 208 dev_dbg(dev, "%s\n", __func__); 209 209 210 210 fpga_mgr_unregister(mgr); 211 - 212 - return 0; 213 211 } 214 212 EXPORT_SYMBOL_GPL(alt_pr_unregister); 215 213
+1 -1
include/linux/fpga/altera-pr-ip-core.h
··· 13 13 #include <linux/io.h> 14 14 15 15 int alt_pr_register(struct device *dev, void __iomem *reg_base); 16 - int alt_pr_unregister(struct device *dev); 16 + void alt_pr_unregister(struct device *dev); 17 17 18 18 #endif /* _ALT_PR_IP_CORE_H */