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ACPICA: actbl2: Add definitions for RIMT

ACPICA commit 73c32bc89cad64ab19c1231a202361e917e6823c

RISC-V IO Mapping Table (RIMT) is a new static table defined for RISC-V
to communicate IOMMU information to the OS. The specification for RIMT
is available at [1]. Add structure definitions for RIMT.

Link: https://github.com/riscv-non-isa/riscv-acpi-rimt [1]
Link: https://github.com/acpica/acpica/commit/73c32bc8
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Link: https://patch.msgid.link/10665648.nUPlyArG6x@rjwysocki.net

authored by

Sunil V L and committed by
Rafael J. Wysocki ced63370 ec0ed62b

+83
+83
include/acpi/actbl2.h
··· 51 51 #define ACPI_SIG_RAS2 "RAS2" /* RAS2 Feature table */ 52 52 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 53 53 #define ACPI_SIG_RHCT "RHCT" /* RISC-V Hart Capabilities Table */ 54 + #define ACPI_SIG_RIMT "RIMT" /* RISC-V IO Mapping Table */ 54 55 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 55 56 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 56 57 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ ··· 3041 3040 struct acpi_rhct_hart_info { 3042 3041 u16 num_offsets; 3043 3042 u32 uid; /* ACPI processor UID */ 3043 + }; 3044 + 3045 + /******************************************************************************* 3046 + * 3047 + * RIMT - RISC-V IO Remapping Table 3048 + * 3049 + * https://github.com/riscv-non-isa/riscv-acpi-rimt 3050 + * 3051 + ******************************************************************************/ 3052 + 3053 + struct acpi_table_rimt { 3054 + struct acpi_table_header header; /* Common ACPI table header */ 3055 + u32 num_nodes; /* Number of RIMT Nodes */ 3056 + u32 node_offset; /* Offset to RIMT Node Array */ 3057 + u32 reserved; 3058 + }; 3059 + 3060 + struct acpi_rimt_node { 3061 + u8 type; 3062 + u8 revision; 3063 + u16 length; 3064 + u16 reserved; 3065 + u16 id; 3066 + char node_data[]; 3067 + }; 3068 + 3069 + enum acpi_rimt_node_type { 3070 + ACPI_RIMT_NODE_TYPE_IOMMU = 0x0, 3071 + ACPI_RIMT_NODE_TYPE_PCIE_ROOT_COMPLEX = 0x1, 3072 + ACPI_RIMT_NODE_TYPE_PLAT_DEVICE = 0x2, 3073 + }; 3074 + 3075 + struct acpi_rimt_iommu { 3076 + u8 hardware_id[8]; /* Hardware ID */ 3077 + u64 base_address; /* Base Address */ 3078 + u32 flags; /* Flags */ 3079 + u32 proximity_domain; /* Proximity Domain */ 3080 + u16 pcie_segment_number; /* PCIe Segment number */ 3081 + u16 pcie_bdf; /* PCIe B/D/F */ 3082 + u16 num_interrupt_wires; /* Number of interrupt wires */ 3083 + u16 interrupt_wire_offset; /* Interrupt wire array offset */ 3084 + u64 interrupt_wire[]; /* Interrupt wire array */ 3085 + }; 3086 + 3087 + /* IOMMU Node Flags */ 3088 + #define ACPI_RIMT_IOMMU_FLAGS_PCIE (1) 3089 + #define ACPI_RIMT_IOMMU_FLAGS_PXM_VALID (1 << 1) 3090 + 3091 + /* Interrupt Wire Structure */ 3092 + struct acpi_rimt_iommu_wire_gsi { 3093 + u32 irq_num; /* Interrupt Number */ 3094 + u32 flags; /* Flags */ 3095 + }; 3096 + 3097 + /* Interrupt Wire Flags */ 3098 + #define ACPI_RIMT_GSI_LEVEL_TRIGGERRED (1) 3099 + #define ACPI_RIMT_GSI_ACTIVE_HIGH (1 << 1) 3100 + 3101 + struct acpi_rimt_id_mapping { 3102 + u32 source_id_base; /* Source ID Base */ 3103 + u32 num_ids; /* Number of IDs */ 3104 + u32 dest_id_base; /* Destination Device ID Base */ 3105 + u32 dest_offset; /* Destination IOMMU Offset */ 3106 + u32 flags; /* Flags */ 3107 + }; 3108 + 3109 + struct acpi_rimt_pcie_rc { 3110 + u32 flags; /* Flags */ 3111 + u16 reserved; /* Reserved */ 3112 + u16 pcie_segment_number; /* PCIe Segment number */ 3113 + u16 id_mapping_offset; /* ID mapping array offset */ 3114 + u16 num_id_mappings; /* Number of ID mappings */ 3115 + }; 3116 + 3117 + /* PCIe Root Complex Node Flags */ 3118 + #define ACPI_RIMT_PCIE_ATS_SUPPORTED (1) 3119 + #define ACPI_RIMT_PCIE_PRI_SUPPORTED (1 << 1) 3120 + 3121 + struct acpi_rimt_platform_device { 3122 + u16 id_mapping_offset; /* ID Mapping array offset */ 3123 + u16 num_id_mappings; /* Number of ID mappings */ 3124 + char device_name[]; /* Device Object Name */ 3044 3125 }; 3045 3126 3046 3127 /*******************************************************************************