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misc: amd-sbi: Add support for register xfer

- Provide user register access over IOCTL.
Both register read and write are supported.
- APML interface does not provide a synchronization method. By defining,
a register access path, we use APML modules and library for
all APML transactions. Without having to use external tools such as
i2c-tools, which may cause race conditions.

Reviewed-by: Naveen Krishna Chatradhi <naveenkrishna.chatradhi@amd.com>
Signed-off-by: Akshay Gupta <akshay.gupta@amd.com>
Link: https://lore.kernel.org/r/20250428063034.2145566-10-akshay.gupta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

authored by

Akshay Gupta and committed by
Greg Kroah-Hartman
cf141287 69b1ba83

+60
+29
drivers/misc/amd-sbi/rmi-core.c
··· 350 350 return ret; 351 351 } 352 352 353 + static int apml_rmi_reg_xfer(struct sbrmi_data *data, 354 + struct apml_reg_xfer_msg __user *arg) 355 + { 356 + struct apml_reg_xfer_msg msg = { 0 }; 357 + unsigned int data_read; 358 + int ret; 359 + 360 + /* Copy the structure from user */ 361 + if (copy_from_user(&msg, arg, sizeof(struct apml_reg_xfer_msg))) 362 + return -EFAULT; 363 + 364 + mutex_lock(&data->lock); 365 + if (msg.rflag) { 366 + ret = regmap_read(data->regmap, msg.reg_addr, &data_read); 367 + if (!ret) 368 + msg.data_in_out = data_read; 369 + } else { 370 + ret = regmap_write(data->regmap, msg.reg_addr, msg.data_in_out); 371 + } 372 + 373 + mutex_unlock(&data->lock); 374 + 375 + if (msg.rflag && !ret) 376 + return copy_to_user(arg, &msg, sizeof(struct apml_reg_xfer_msg)); 377 + return ret; 378 + } 379 + 353 380 static int apml_mailbox_xfer(struct sbrmi_data *data, struct apml_mbox_msg __user *arg) 354 381 { 355 382 struct apml_mbox_msg msg = { 0 }; ··· 441 414 return apml_cpuid_xfer(data, argp); 442 415 case SBRMI_IOCTL_MCAMSR_CMD: 443 416 return apml_mcamsr_xfer(data, argp); 417 + case SBRMI_IOCTL_REG_XFER_CMD: 418 + return apml_rmi_reg_xfer(data, argp); 444 419 default: 445 420 return -ENOTTY; 446 421 }
+31
include/uapi/misc/amd-apml.h
··· 58 58 __u32 pad; 59 59 }; 60 60 61 + struct apml_reg_xfer_msg { 62 + /* 63 + * RMI register address offset 64 + */ 65 + __u16 reg_addr; 66 + /* 67 + * Register data for read/write 68 + */ 69 + __u8 data_in_out; 70 + /* 71 + * Register read or write 72 + */ 73 + __u8 rflag; 74 + }; 75 + 61 76 /* 62 77 * AMD sideband interface base IOCTL 63 78 */ ··· 132 117 * "-EPROTOTYPE" error is returned to provide additional error details 133 118 */ 134 119 #define SBRMI_IOCTL_MCAMSR_CMD _IOWR(SB_BASE_IOCTL_NR, 2, struct apml_mcamsr_msg) 120 + 121 + /** 122 + * DOC: SBRMI_IOCTL_REG_XFER_CMD 123 + * 124 + * @Parameters 125 + * 126 + * @struct apml_reg_xfer_msg 127 + * Pointer to the &struct apml_reg_xfer_msg that will contain the protocol 128 + * information 129 + * 130 + * @Description 131 + * IOCTL command for APML messages using generic _IOWR 132 + * The IOCTL provides userspace access to AMD sideband register xfer protocol 133 + * - Register xfer protocol to get/set hardware register for given offset 134 + */ 135 + #define SBRMI_IOCTL_REG_XFER_CMD _IOWR(SB_BASE_IOCTL_NR, 3, struct apml_reg_xfer_msg) 135 136 136 137 #endif /*_AMD_APML_H_*/