Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
DRM fixes from Dave Airlie:
intel: fixes for output regression on 965GM, an oops and a machine
hang
radeon: uninitialised var (that gcc didn't warn about for some reason)
+ a couple of correctness fixes.
exynos: fixes for various things, drop some chunks of unused code.
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/radeon/kms/vm: fix possible bug in radeon_vm_bo_rmv()
drm/radeon: fix uninitialized variable
drm/radeon/kms: fix radeon_dp_get_modes for LVDS bridges (v2)
drm/i915: Remove use of the autoreported ringbuffer HEAD position
drm/i915: Prevent a machine hang by checking crtc->active before loading lut
drm/i915: fix operator precedence when enabling RC6p
drm/i915: fix a sprite watermark computation to avoid divide by zero if xpos<0
drm/i915: fix mode set on load pipe. (v2)
drm/exynos: exynos_drm.h header file fixes
drm/exynos: added panel physical size.
drm/exynos: added postclose to release resource.
drm/exynos: removed exynos_drm_fbdev_recreate function.
drm/exynos: fixed page flip issue.
drm/exynos: added possible_clones setup function.
drm/exynos: removed pageflip_event_list init code when closed.
drm/exynos: changed priority of mixer layers.
drm/exynos: Fix typo in exynos_mixer.c
+79
-48
+11
-5
drivers/gpu/drm/exynos/exynos_drm_connector.c
+11
-5
drivers/gpu/drm/exynos/exynos_drm_connector.c
···
28
28
#include "drmP.h"
29
29
#include "drm_crtc_helper.h"
30
30
31
+
#include <drm/exynos_drm.h>
31
32
#include "exynos_drm_drv.h"
32
33
#include "exynos_drm_encoder.h"
33
34
···
45
44
/* convert exynos_video_timings to drm_display_mode */
46
45
static inline void
47
46
convert_to_display_mode(struct drm_display_mode *mode,
48
-
struct fb_videomode *timing)
47
+
struct exynos_drm_panel_info *panel)
49
48
{
49
+
struct fb_videomode *timing = &panel->timing;
50
50
DRM_DEBUG_KMS("%s\n", __FILE__);
51
51
52
52
mode->clock = timing->pixclock / 1000;
···
62
60
mode->vsync_start = mode->vdisplay + timing->upper_margin;
63
61
mode->vsync_end = mode->vsync_start + timing->vsync_len;
64
62
mode->vtotal = mode->vsync_end + timing->lower_margin;
63
+
mode->width_mm = panel->width_mm;
64
+
mode->height_mm = panel->height_mm;
65
65
66
66
if (timing->vmode & FB_VMODE_INTERLACED)
67
67
mode->flags |= DRM_MODE_FLAG_INTERLACE;
···
152
148
connector->display_info.raw_edid = edid;
153
149
} else {
154
150
struct drm_display_mode *mode = drm_mode_create(connector->dev);
155
-
struct fb_videomode *timing;
151
+
struct exynos_drm_panel_info *panel;
156
152
157
-
if (display_ops->get_timing)
158
-
timing = display_ops->get_timing(manager->dev);
153
+
if (display_ops->get_panel)
154
+
panel = display_ops->get_panel(manager->dev);
159
155
else {
160
156
drm_mode_destroy(connector->dev, mode);
161
157
return 0;
162
158
}
163
159
164
-
convert_to_display_mode(mode, timing);
160
+
convert_to_display_mode(mode, panel);
161
+
connector->display_info.width_mm = mode->width_mm;
162
+
connector->display_info.height_mm = mode->height_mm;
165
163
166
164
mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
167
165
drm_mode_set_name(mode);
+2
-2
drivers/gpu/drm/exynos/exynos_drm_drv.h
+2
-2
drivers/gpu/drm/exynos/exynos_drm_drv.h
···
136
136
* @type: one of EXYNOS_DISPLAY_TYPE_LCD and HDMI.
137
137
* @is_connected: check for that display is connected or not.
138
138
* @get_edid: get edid modes from display driver.
139
-
* @get_timing: get timing object from display driver.
139
+
* @get_panel: get panel object from display driver.
140
140
* @check_timing: check if timing is valid or not.
141
141
* @power_on: display device on or off.
142
142
*/
···
145
145
bool (*is_connected)(struct device *dev);
146
146
int (*get_edid)(struct device *dev, struct drm_connector *connector,
147
147
u8 *edid, int len);
148
-
void *(*get_timing)(struct device *dev);
148
+
void *(*get_panel)(struct device *dev);
149
149
int (*check_timing)(struct device *dev, void *timing);
150
150
int (*power_on)(struct device *dev, int mode);
151
151
};
+14
-13
drivers/gpu/drm/exynos/exynos_drm_fimd.c
+14
-13
drivers/gpu/drm/exynos/exynos_drm_fimd.c
···
89
89
bool suspended;
90
90
struct mutex lock;
91
91
92
-
struct fb_videomode *timing;
92
+
struct exynos_drm_panel_info *panel;
93
93
};
94
94
95
95
static bool fimd_display_is_connected(struct device *dev)
···
101
101
return true;
102
102
}
103
103
104
-
static void *fimd_get_timing(struct device *dev)
104
+
static void *fimd_get_panel(struct device *dev)
105
105
{
106
106
struct fimd_context *ctx = get_fimd_context(dev);
107
107
108
108
DRM_DEBUG_KMS("%s\n", __FILE__);
109
109
110
-
return ctx->timing;
110
+
return ctx->panel;
111
111
}
112
112
113
113
static int fimd_check_timing(struct device *dev, void *timing)
···
131
131
static struct exynos_drm_display_ops fimd_display_ops = {
132
132
.type = EXYNOS_DISPLAY_TYPE_LCD,
133
133
.is_connected = fimd_display_is_connected,
134
-
.get_timing = fimd_get_timing,
134
+
.get_panel = fimd_get_panel,
135
135
.check_timing = fimd_check_timing,
136
136
.power_on = fimd_display_power_on,
137
137
};
···
193
193
static void fimd_commit(struct device *dev)
194
194
{
195
195
struct fimd_context *ctx = get_fimd_context(dev);
196
-
struct fb_videomode *timing = ctx->timing;
196
+
struct exynos_drm_panel_info *panel = ctx->panel;
197
+
struct fb_videomode *timing = &panel->timing;
197
198
u32 val;
198
199
199
200
if (ctx->suspended)
···
787
786
struct fimd_context *ctx;
788
787
struct exynos_drm_subdrv *subdrv;
789
788
struct exynos_drm_fimd_pdata *pdata;
790
-
struct fb_videomode *timing;
789
+
struct exynos_drm_panel_info *panel;
791
790
struct resource *res;
792
791
int win;
793
792
int ret = -EINVAL;
···
800
799
return -EINVAL;
801
800
}
802
801
803
-
timing = &pdata->timing;
804
-
if (!timing) {
805
-
dev_err(dev, "timing is null.\n");
802
+
panel = &pdata->panel;
803
+
if (!panel) {
804
+
dev_err(dev, "panel is null.\n");
806
805
return -EINVAL;
807
806
}
808
807
···
864
863
goto err_req_irq;
865
864
}
866
865
867
-
ctx->clkdiv = fimd_calc_clkdiv(ctx, timing);
866
+
ctx->clkdiv = fimd_calc_clkdiv(ctx, &panel->timing);
868
867
ctx->vidcon0 = pdata->vidcon0;
869
868
ctx->vidcon1 = pdata->vidcon1;
870
869
ctx->default_win = pdata->default_win;
871
-
ctx->timing = timing;
870
+
ctx->panel = panel;
872
871
873
-
timing->pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
872
+
panel->timing.pixclock = clk_get_rate(ctx->lcd_clk) / ctx->clkdiv;
874
873
875
874
DRM_DEBUG_KMS("pixel clock = %d, clkdiv = %d\n",
876
-
timing->pixclock, ctx->clkdiv);
875
+
panel->timing.pixclock, ctx->clkdiv);
877
876
878
877
subdrv = &ctx->subdrv;
879
878
+12
-3
drivers/gpu/drm/i915/intel_display.c
+12
-3
drivers/gpu/drm/i915/intel_display.c
···
4680
4680
4681
4681
crtc = intel_get_crtc_for_plane(dev, plane);
4682
4682
clock = crtc->mode.clock;
4683
+
if (!clock) {
4684
+
*sprite_wm = 0;
4685
+
return false;
4686
+
}
4683
4687
4684
4688
line_time_us = (sprite_width * 1000) / clock;
4689
+
if (!line_time_us) {
4690
+
*sprite_wm = 0;
4691
+
return false;
4692
+
}
4693
+
4685
4694
line_count = (latency_ns / line_time_us + 1000) / 1000;
4686
4695
line_size = sprite_width * pixel_size;
4687
4696
···
6184
6175
int i;
6185
6176
6186
6177
/* The clocks have to be on to load the palette. */
6187
-
if (!crtc->enabled)
6178
+
if (!crtc->enabled || !intel_crtc->active)
6188
6179
return;
6189
6180
6190
6181
/* use legacy palette for Ironlake */
···
6570
6561
mode_cmd.height = mode->vdisplay;
6571
6562
mode_cmd.pitches[0] = intel_framebuffer_pitch_for_width(mode_cmd.width,
6572
6563
bpp);
6573
-
mode_cmd.pixel_format = 0;
6564
+
mode_cmd.pixel_format = drm_mode_legacy_fb_format(bpp, depth);
6574
6565
6575
6566
return intel_framebuffer_create(dev, &mode_cmd, obj);
6576
6567
}
···
8194
8185
8195
8186
if (intel_enable_rc6(dev_priv->dev))
8196
8187
rc6_mask = GEN6_RC_CTL_RC6_ENABLE |
8197
-
(IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0;
8188
+
((IS_GEN7(dev_priv->dev)) ? GEN6_RC_CTL_RC6p_ENABLE : 0);
8198
8189
8199
8190
I915_WRITE(GEN6_RC_CONTROL,
8200
8191
rc6_mask |
+1
-13
drivers/gpu/drm/i915/intel_ringbuffer.c
+1
-13
drivers/gpu/drm/i915/intel_ringbuffer.c
···
301
301
302
302
I915_WRITE_CTL(ring,
303
303
((ring->size - PAGE_SIZE) & RING_NR_PAGES)
304
-
| RING_REPORT_64K | RING_VALID);
304
+
| RING_VALID);
305
305
306
306
/* If the head is still not zero, the ring is dead */
307
307
if ((I915_READ_CTL(ring) & RING_VALID) == 0 ||
···
1132
1132
struct drm_device *dev = ring->dev;
1133
1133
struct drm_i915_private *dev_priv = dev->dev_private;
1134
1134
unsigned long end;
1135
-
u32 head;
1136
-
1137
-
/* If the reported head position has wrapped or hasn't advanced,
1138
-
* fallback to the slow and accurate path.
1139
-
*/
1140
-
head = intel_read_status_page(ring, 4);
1141
-
if (head > ring->head) {
1142
-
ring->head = head;
1143
-
ring->space = ring_space(ring);
1144
-
if (ring->space >= n)
1145
-
return 0;
1146
-
}
1147
1135
1148
1136
trace_i915_ring_wait_begin(ring);
1149
1137
if (drm_core_check_feature(dev, DRIVER_GEM))
+1
drivers/gpu/drm/radeon/r600_cs.c
+1
drivers/gpu/drm/radeon/r600_cs.c
+17
-8
drivers/gpu/drm/radeon/radeon_connectors.c
+17
-8
drivers/gpu/drm/radeon/radeon_connectors.c
···
1117
1117
(connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1118
1118
struct drm_display_mode *mode;
1119
1119
1120
-
if (!radeon_dig_connector->edp_on)
1121
-
atombios_set_edp_panel_power(connector,
1122
-
ATOM_TRANSMITTER_ACTION_POWER_ON);
1123
-
ret = radeon_ddc_get_modes(radeon_connector);
1124
-
if (!radeon_dig_connector->edp_on)
1125
-
atombios_set_edp_panel_power(connector,
1126
-
ATOM_TRANSMITTER_ACTION_POWER_OFF);
1120
+
if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1121
+
if (!radeon_dig_connector->edp_on)
1122
+
atombios_set_edp_panel_power(connector,
1123
+
ATOM_TRANSMITTER_ACTION_POWER_ON);
1124
+
ret = radeon_ddc_get_modes(radeon_connector);
1125
+
if (!radeon_dig_connector->edp_on)
1126
+
atombios_set_edp_panel_power(connector,
1127
+
ATOM_TRANSMITTER_ACTION_POWER_OFF);
1128
+
} else {
1129
+
/* need to setup ddc on the bridge */
1130
+
if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1131
+
ENCODER_OBJECT_ID_NONE) {
1132
+
if (encoder)
1133
+
radeon_atom_ext_encoder_setup_ddc(encoder);
1134
+
}
1135
+
ret = radeon_ddc_get_modes(radeon_connector);
1136
+
}
1127
1137
1128
1138
if (ret > 0) {
1129
1139
if (encoder) {
···
1144
1134
return ret;
1145
1135
}
1146
1136
1147
-
encoder = radeon_best_single_encoder(connector);
1148
1137
if (!encoder)
1149
1138
return 0;
1150
1139
+1
-1
drivers/gpu/drm/radeon/radeon_gart.c
+1
-1
drivers/gpu/drm/radeon/radeon_gart.c
···
597
597
if (bo_va == NULL)
598
598
return 0;
599
599
600
-
list_del(&bo_va->bo_list);
601
600
mutex_lock(&vm->mutex);
602
601
radeon_mutex_lock(&rdev->cs_mutex);
603
602
radeon_vm_bo_update_pte(rdev, vm, bo, NULL);
604
603
radeon_mutex_unlock(&rdev->cs_mutex);
605
604
list_del(&bo_va->vm_list);
606
605
mutex_unlock(&vm->mutex);
606
+
list_del(&bo_va->bo_list);
607
607
608
608
kfree(bo_va);
609
609
return 0;
+1
include/drm/Kbuild
+1
include/drm/Kbuild
+19
-3
include/drm/exynos_drm.h
+19
-3
include/drm/exynos_drm.h
···
97
97
#define DRM_IOCTL_EXYNOS_PLANE_SET_ZPOS DRM_IOWR(DRM_COMMAND_BASE + \
98
98
DRM_EXYNOS_PLANE_SET_ZPOS, struct drm_exynos_plane_set_zpos)
99
99
100
+
#ifdef __KERNEL__
101
+
102
+
/**
103
+
* A structure for lcd panel information.
104
+
*
105
+
* @timing: default video mode for initializing
106
+
* @width_mm: physical size of lcd width.
107
+
* @height_mm: physical size of lcd height.
108
+
*/
109
+
struct exynos_drm_panel_info {
110
+
struct fb_videomode timing;
111
+
u32 width_mm;
112
+
u32 height_mm;
113
+
};
114
+
100
115
/**
101
116
* Platform Specific Structure for DRM based FIMD.
102
117
*
103
-
* @timing: default video mode for initializing
118
+
* @panel: default panel info for initializing
104
119
* @default_win: default window layer number to be used for UI.
105
120
* @bpp: default bit per pixel.
106
121
*/
107
122
struct exynos_drm_fimd_pdata {
108
-
struct fb_videomode timing;
123
+
struct exynos_drm_panel_info panel;
109
124
u32 vidcon0;
110
125
u32 vidcon1;
111
126
unsigned int default_win;
···
154
139
unsigned int bpp;
155
140
};
156
141
157
-
#endif
142
+
#endif /* __KERNEL__ */
143
+
#endif /* _EXYNOS_DRM_H_ */