···55// Copyright (C) 2023 Cirrus Logic, Inc. and66// Cirrus Logic International Semiconductor Ltd.7788-#include <linux/acpi.h>98#include <linux/completion.h>109#include <linux/debugfs.h>1110#include <linux/delay.h>···10281029 return 0;10291030}1030103110311031-static int cs35l56_acpi_get_name(struct cs35l56_private *cs35l56)10321032+static int cs35l56_get_firmware_uid(struct cs35l56_private *cs35l56)10321033{10331033- acpi_handle handle = ACPI_HANDLE(cs35l56->base.dev);10341034- const char *sub;10341034+ struct device *dev = cs35l56->base.dev;10351035+ const char *prop;10361036+ int ret;1035103710361036- /* If there is no ACPI_HANDLE, there is no ACPI for this system, return 0 */10371037- if (!handle)10381038+ ret = device_property_read_string(dev, "cirrus,firmware-uid", &prop);10391039+ /* If bad sw node property, return 0 and fallback to legacy firmware path */10401040+ if (ret < 0)10381041 return 0;1039104210401040- sub = acpi_get_subsystem_id(handle);10411041- if (IS_ERR(sub)) {10421042- /* If bad ACPI, return 0 and fallback to legacy firmware path, otherwise fail */10431043- if (PTR_ERR(sub) == -ENODATA)10441044- return 0;10451045- else10461046- return PTR_ERR(sub);10471047- }10431043+ cs35l56->dsp.system_name = devm_kstrdup(dev, prop, GFP_KERNEL);10441044+ if (cs35l56->dsp.system_name == NULL)10451045+ return -ENOMEM;1048104610491049- cs35l56->dsp.system_name = sub;10501050- dev_dbg(cs35l56->base.dev, "Subsystem ID: %s\n", cs35l56->dsp.system_name);10471047+ dev_dbg(dev, "Firmware UID: %s\n", cs35l56->dsp.system_name);1051104810521049 return 0;10531050}···10901095 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 1);10911096 }1092109710931093- ret = cs35l56_acpi_get_name(cs35l56);10981098+ ret = cs35l56_get_firmware_uid(cs35l56);10941099 if (ret != 0)10951100 goto err;10961101···12111216 pm_runtime_disable(cs35l56->base.dev);1212121712131218 regcache_cache_only(cs35l56->base.regmap, true);12141214-12151215- kfree(cs35l56->dsp.system_name);1216121912171220 gpiod_set_value_cansleep(cs35l56->base.reset_gpio, 0);12181221 regulator_bulk_disable(ARRAY_SIZE(cs35l56->supplies), cs35l56->supplies);
+12-1
sound/soc/codecs/rt1308-sdw.c
···5252 case 0x300a:5353 case 0xc000:5454 case 0xc710:5555+ case 0xcf01:5556 case 0xc860 ... 0xc863:5657 case 0xc870 ... 0xc873:5758 return true;···214213{215214 struct rt1308_sdw_priv *rt1308 = dev_get_drvdata(dev);216215 int ret = 0;217217- unsigned int tmp;216216+ unsigned int tmp, hibernation_flag;218217219218 if (rt1308->hw_init)220219 return 0;···231230 pm_runtime_set_active(&slave->dev);232231233232 pm_runtime_get_noresume(&slave->dev);233233+234234+ regmap_read(rt1308->regmap, 0xcf01, &hibernation_flag);235235+ if ((hibernation_flag != 0x00) && rt1308->first_hw_init)236236+ goto _preset_ready_;234237235238 /* sw reset */236239 regmap_write(rt1308->regmap, RT1308_SDW_RESET, 0);···276271 regmap_write(rt1308->regmap, 0xc100, 0xd7);277272 regmap_write(rt1308->regmap, 0xc101, 0xd7);278273274274+ /* apply BQ params */275275+ rt1308_apply_bq_params(rt1308);276276+277277+ regmap_write(rt1308->regmap, 0xcf01, 0x01);278278+279279+_preset_ready_:279280 if (rt1308->first_hw_init) {280281 regcache_cache_bypass(rt1308->regmap, false);281282 regcache_mark_dirty(rt1308->regmap);
+10-9
sound/soc/codecs/tas2781-comlib.c
···57575858 if (client->addr != tasdev->dev_addr) {5959 client->addr = tasdev->dev_addr;6060- if (tasdev->cur_book == book) {6161- ret = regmap_write(map,6262- TASDEVICE_PAGE_SELECT, 0);6363- if (ret < 0) {6464- dev_err(tas_priv->dev, "%s, E=%d\n",6565- __func__, ret);6666- goto out;6767- }6060+ /* All tas2781s share the same regmap, clear the page6161+ * inside regmap once switching to another tas2781.6262+ * Register 0 at any pages and any books inside tas27816363+ * is the same one for page-switching.6464+ */6565+ ret = regmap_write(map, TASDEVICE_PAGE_SELECT, 0);6666+ if (ret < 0) {6767+ dev_err(tas_priv->dev, "%s, E=%d\n",6868+ __func__, ret);6969+ goto out;6870 }6969- goto out;7071 }71727273 if (tasdev->cur_book != book) {
+26-16
sound/soc/meson/axg-tdm-formatter.c
···3030 struct axg_tdm_stream *ts,3131 unsigned int offset)3232{3333- unsigned int val, ch = ts->channels;3434- unsigned long mask;3535- int i, j;3333+ unsigned int ch = ts->channels;3434+ u32 val[AXG_TDM_NUM_LANES];3535+ int i, j, k;3636+3737+ /*3838+ * We need to mimick the slot distribution used by the HW to keep the3939+ * channel placement consistent regardless of the number of channel4040+ * in the stream. This is why the odd algorithm below is used.4141+ */4242+ memset(val, 0, sizeof(*val) * AXG_TDM_NUM_LANES);36433744 /*3845 * Distribute the channels of the stream over the available slots3939- * of each TDM lane4646+ * of each TDM lane. We need to go over the 32 slots ...4047 */4141- for (i = 0; i < AXG_TDM_NUM_LANES; i++) {4242- val = 0;4343- mask = ts->mask[i];4444-4545- for (j = find_first_bit(&mask, 32);4646- (j < 32) && ch;4747- j = find_next_bit(&mask, 32, j + 1)) {4848- val |= 1 << j;4949- ch -= 1;4848+ for (i = 0; (i < 32) && ch; i += 2) {4949+ /* ... of all the lanes ... */5050+ for (j = 0; j < AXG_TDM_NUM_LANES; j++) {5151+ /* ... then distribute the channels in pairs */5252+ for (k = 0; k < 2; k++) {5353+ if ((BIT(i + k) & ts->mask[j]) && ch) {5454+ val[j] |= BIT(i + k);5555+ ch -= 1;5656+ }5757+ }5058 }5151-5252- regmap_write(map, offset, val);5353- offset += regmap_get_reg_stride(map);5459 }55605661 /*···6661 if (WARN_ON(ch != 0)) {6762 pr_err("channel mask error\n");6863 return -EINVAL;6464+ }6565+6666+ for (i = 0; i < AXG_TDM_NUM_LANES; i++) {6767+ regmap_write(map, offset, val[i]);6868+ offset += regmap_get_reg_stride(map);6969 }70707171 return 0;
+3
sound/soc/sof/ipc4-pcm.c
···709709 struct snd_sof_pcm *spcm;710710711711 spcm = snd_sof_find_spcm_dai(component, rtd);712712+ if (!spcm)713713+ return -EINVAL;714714+712715 time_info = spcm->stream[substream->stream].private;713716 /* delay calculation is not supported by current fw_reg ABI */714717 if (!time_info)