Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
Merge branch 'drm-fixes' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie:
"This is made up 4 groups of fixes detailed below.
vgem:
Due to some misgivings about possible bad use cases this allow,
backout a chunk of the interface to stop those use cases for now.
radeon:
Fix for an oops regression in the audio code, and a partial revert
for a fix that was cauing problems.
nouveau:
regression fix for Fermi, and display-less Maxwell boot fixes.
drm core:
a fix for i915 cursor vblank waiting in the atomic helpers"
* 'drm-fixes' of git://people.freedesktop.org/~airlied/linux:
drm/nouveau/gr/gm204: remove a stray printk
drm/nouveau/devinit/gm100-: force devinit table execution on boards without PDISP
drm/nouveau/devinit/gf100: make the force-post condition more obvious
drm/nouveau/gr/gf100-: fix wrong constant definition
drm/radeon: partially revert "fix VM_CONTEXT*_PAGE_TABLE_END_ADDR handling"
drm/radeon/audio: make sure connector is valid in hotplug case
Revert "drm/radeon: only mark audio as connected if the monitor supports it (v3)"
drm/radeon: don't share plls if monitors differ in audio support
drm/vgem: drop DRIVER_PRIME (v2)
drm/plane-helper: Adapt cursor hack to transitional helpers
+42
-152
+3
drivers/gpu/drm/drm_plane_helper.c
+3
drivers/gpu/drm/drm_plane_helper.c
+1
-1
drivers/gpu/drm/nouveau/include/nvif/class.h
+1
-1
drivers/gpu/drm/nouveau/include/nvif/class.h
-1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
-1
drivers/gpu/drm/nouveau/nvkm/engine/gr/gm204.c
···
329
329
nv_mask(priv, 0x419cc0, 0x00000008, 0x00000008);
330
330
331
331
for (gpc = 0; gpc < priv->gpc_nr; gpc++) {
332
-
printk(KERN_ERR "ppc %d %d\n", gpc, priv->ppc_nr[gpc]);
333
332
for (ppc = 0; ppc < priv->ppc_nr[gpc]; ppc++)
334
333
nv_wr32(priv, PPC_UNIT(gpc, ppc, 0x038), 0xc0000000);
335
334
nv_wr32(priv, GPC_UNIT(gpc, 0x0420), 0xc0000000);
+5
-2
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
+5
-2
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c
···
90
90
return disable;
91
91
}
92
92
93
-
static int
93
+
int
94
94
gf100_devinit_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
95
95
struct nvkm_oclass *oclass, void *data, u32 size,
96
96
struct nvkm_object **pobject)
97
97
{
98
+
struct nvkm_devinit_impl *impl = (void *)oclass;
98
99
struct nv50_devinit_priv *priv;
100
+
u64 disable;
99
101
int ret;
100
102
101
103
ret = nvkm_devinit_create(parent, engine, oclass, &priv);
···
105
103
if (ret)
106
104
return ret;
107
105
108
-
if (nv_rd32(priv, 0x022500) & 0x00000001)
106
+
disable = impl->disable(&priv->base);
107
+
if (disable & (1ULL << NVDEV_ENGINE_DISP))
109
108
priv->base.post = true;
110
109
111
110
return 0;
+1
-1
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
+1
-1
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c
···
48
48
gm107_devinit_oclass = &(struct nvkm_devinit_impl) {
49
49
.base.handle = NV_SUBDEV(DEVINIT, 0x07),
50
50
.base.ofuncs = &(struct nvkm_ofuncs) {
51
-
.ctor = nv50_devinit_ctor,
51
+
.ctor = gf100_devinit_ctor,
52
52
.dtor = _nvkm_devinit_dtor,
53
53
.init = nv50_devinit_init,
54
54
.fini = _nvkm_devinit_fini,
+1
-1
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c
+1
-1
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c
···
161
161
gm204_devinit_oclass = &(struct nvkm_devinit_impl) {
162
162
.base.handle = NV_SUBDEV(DEVINIT, 0x07),
163
163
.base.ofuncs = &(struct nvkm_ofuncs) {
164
-
.ctor = nv50_devinit_ctor,
164
+
.ctor = gf100_devinit_ctor,
165
165
.dtor = _nvkm_devinit_dtor,
166
166
.init = nv50_devinit_init,
167
167
.fini = _nvkm_devinit_fini,
+3
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.h
+3
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/nv50.h
···
15
15
16
16
int gt215_devinit_pll_set(struct nvkm_devinit *, u32, u32);
17
17
18
+
int gf100_devinit_ctor(struct nvkm_object *, struct nvkm_object *,
19
+
struct nvkm_oclass *, void *, u32,
20
+
struct nvkm_object **);
18
21
int gf100_devinit_pll_set(struct nvkm_devinit *, u32, u32);
19
22
20
23
u64 gm107_devinit_disable(struct nvkm_devinit *);
+3
-1
drivers/gpu/drm/radeon/atombios_crtc.c
+3
-1
drivers/gpu/drm/radeon/atombios_crtc.c
···
1798
1798
if ((crtc->mode.clock == test_crtc->mode.clock) &&
1799
1799
(adjusted_clock == test_adjusted_clock) &&
1800
1800
(radeon_crtc->ss_enabled == test_radeon_crtc->ss_enabled) &&
1801
-
(test_radeon_crtc->pll_id != ATOM_PPLL_INVALID))
1801
+
(test_radeon_crtc->pll_id != ATOM_PPLL_INVALID) &&
1802
+
(drm_detect_monitor_audio(radeon_connector_edid(test_radeon_crtc->connector)) ==
1803
+
drm_detect_monitor_audio(radeon_connector_edid(radeon_crtc->connector))))
1802
1804
return test_radeon_crtc->pll_id;
1803
1805
}
1804
1806
}
+1
-1
drivers/gpu/drm/radeon/cik.c
+1
-1
drivers/gpu/drm/radeon/cik.c
···
5822
5822
L2_CACHE_BIGK_FRAGMENT_SIZE(4));
5823
5823
/* setup context0 */
5824
5824
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
5825
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
5825
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
5826
5826
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
5827
5827
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
5828
5828
(u32)(rdev->dummy_page.addr >> 12));
+1
-1
drivers/gpu/drm/radeon/evergreen.c
+1
-1
drivers/gpu/drm/radeon/evergreen.c
···
2485
2485
WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
2486
2486
WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
2487
2487
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
2488
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
2488
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
2489
2489
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
2490
2490
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
2491
2491
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
+3
-2
drivers/gpu/drm/radeon/evergreen_hdmi.c
+3
-2
drivers/gpu/drm/radeon/evergreen_hdmi.c
···
400
400
if (enable) {
401
401
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
402
402
403
-
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
403
+
if (connector && drm_detect_monitor_audio(radeon_connector_edid(connector))) {
404
404
WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,
405
405
HDMI_AVI_INFO_SEND | /* enable AVI info frames */
406
406
HDMI_AVI_INFO_CONT | /* required for audio info values to be updated */
···
438
438
if (!dig || !dig->afmt)
439
439
return;
440
440
441
-
if (enable && drm_detect_monitor_audio(radeon_connector_edid(connector))) {
441
+
if (enable && connector &&
442
+
drm_detect_monitor_audio(radeon_connector_edid(connector))) {
442
443
struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
443
444
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
444
445
struct radeon_connector_atom_dig *dig_connector;
+1
-1
drivers/gpu/drm/radeon/ni.c
+1
-1
drivers/gpu/drm/radeon/ni.c
···
1282
1282
L2_CACHE_BIGK_FRAGMENT_SIZE(6));
1283
1283
/* setup context0 */
1284
1284
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
1285
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
1285
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
1286
1286
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
1287
1287
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
1288
1288
(u32)(rdev->dummy_page.addr >> 12));
+1
-1
drivers/gpu/drm/radeon/r600.c
+1
-1
drivers/gpu/drm/radeon/r600.c
···
1112
1112
WREG32(MC_VM_L1_TLB_MCB_RD_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
1113
1113
WREG32(MC_VM_L1_TLB_MCB_WR_SEM_CNTL, tmp | ENABLE_SEMAPHORE_MODE);
1114
1114
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
1115
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
1115
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
1116
1116
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
1117
1117
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
1118
1118
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
+12
-15
drivers/gpu/drm/radeon/radeon_audio.c
+12
-15
drivers/gpu/drm/radeon/radeon_audio.c
···
460
460
if (!connector || !connector->encoder)
461
461
return;
462
462
463
-
if (!radeon_encoder_is_digital(connector->encoder))
464
-
return;
465
-
466
463
rdev = connector->encoder->dev->dev_private;
467
464
468
465
if (!radeon_audio_chipset_supported(rdev))
···
468
471
radeon_encoder = to_radeon_encoder(connector->encoder);
469
472
dig = radeon_encoder->enc_priv;
470
473
471
-
if (!dig->afmt)
472
-
return;
473
-
474
474
if (status == connector_status_connected) {
475
-
struct radeon_connector *radeon_connector = to_radeon_connector(connector);
475
+
struct radeon_connector *radeon_connector;
476
+
int sink_type;
477
+
478
+
if (!drm_detect_monitor_audio(radeon_connector_edid(connector))) {
479
+
radeon_encoder->audio = NULL;
480
+
return;
481
+
}
482
+
483
+
radeon_connector = to_radeon_connector(connector);
484
+
sink_type = radeon_dp_getsinktype(radeon_connector);
476
485
477
486
if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort &&
478
-
radeon_dp_getsinktype(radeon_connector) ==
479
-
CONNECTOR_OBJECT_ID_DISPLAYPORT)
487
+
sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT)
480
488
radeon_encoder->audio = rdev->audio.dp_funcs;
481
489
else
482
490
radeon_encoder->audio = rdev->audio.hdmi_funcs;
483
491
484
492
dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
485
-
if (drm_detect_monitor_audio(radeon_connector_edid(connector))) {
486
-
radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
487
-
} else {
488
-
radeon_audio_enable(rdev, dig->afmt->pin, 0);
489
-
dig->afmt->pin = NULL;
490
-
}
493
+
radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
491
494
} else {
492
495
radeon_audio_enable(rdev, dig->afmt->pin, 0);
493
496
dig->afmt->pin = NULL;
+2
-6
drivers/gpu/drm/radeon/radeon_connectors.c
+2
-6
drivers/gpu/drm/radeon/radeon_connectors.c
···
1379
1379
/* updated in get modes as well since we need to know if it's analog or digital */
1380
1380
radeon_connector_update_scratch_regs(connector, ret);
1381
1381
1382
-
if (radeon_audio != 0) {
1383
-
radeon_connector_get_edid(connector);
1382
+
if (radeon_audio != 0)
1384
1383
radeon_audio_detect(connector, ret);
1385
-
}
1386
1384
1387
1385
exit:
1388
1386
pm_runtime_mark_last_busy(connector->dev->dev);
···
1717
1719
1718
1720
radeon_connector_update_scratch_regs(connector, ret);
1719
1721
1720
-
if (radeon_audio != 0) {
1721
-
radeon_connector_get_edid(connector);
1722
+
if (radeon_audio != 0)
1722
1723
radeon_audio_detect(connector, ret);
1723
-
}
1724
1724
1725
1725
out:
1726
1726
pm_runtime_mark_last_busy(connector->dev->dev);
+1
-1
drivers/gpu/drm/radeon/rv770.c
+1
-1
drivers/gpu/drm/radeon/rv770.c
···
921
921
WREG32(MC_VM_MB_L1_TLB2_CNTL, tmp);
922
922
WREG32(MC_VM_MB_L1_TLB3_CNTL, tmp);
923
923
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
924
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
924
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
925
925
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
926
926
WREG32(VM_CONTEXT0_CNTL, ENABLE_CONTEXT | PAGE_TABLE_DEPTH(0) |
927
927
RANGE_PROTECTION_FAULT_ENABLE_DEFAULT);
+1
-1
drivers/gpu/drm/radeon/si.c
+1
-1
drivers/gpu/drm/radeon/si.c
···
4303
4303
L2_CACHE_BIGK_FRAGMENT_SIZE(4));
4304
4304
/* setup context0 */
4305
4305
WREG32(VM_CONTEXT0_PAGE_TABLE_START_ADDR, rdev->mc.gtt_start >> 12);
4306
-
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, (rdev->mc.gtt_end >> 12) - 1);
4306
+
WREG32(VM_CONTEXT0_PAGE_TABLE_END_ADDR, rdev->mc.gtt_end >> 12);
4307
4307
WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12);
4308
4308
WREG32(VM_CONTEXT0_PROTECTION_FAULT_DEFAULT_ADDR,
4309
4309
(u32)(rdev->dummy_page.addr >> 12));
+1
-1
drivers/gpu/drm/vgem/Makefile
+1
-1
drivers/gpu/drm/vgem/Makefile
-94
drivers/gpu/drm/vgem/vgem_dma_buf.c
-94
drivers/gpu/drm/vgem/vgem_dma_buf.c
···
1
-
/*
2
-
* Copyright © 2012 Intel Corporation
3
-
* Copyright © 2014 The Chromium OS Authors
4
-
*
5
-
* Permission is hereby granted, free of charge, to any person obtaining a
6
-
* copy of this software and associated documentation files (the "Software"),
7
-
* to deal in the Software without restriction, including without limitation
8
-
* the rights to use, copy, modify, merge, publish, distribute, sublicense,
9
-
* and/or sell copies of the Software, and to permit persons to whom the
10
-
* Software is furnished to do so, subject to the following conditions:
11
-
*
12
-
* The above copyright notice and this permission notice (including the next
13
-
* paragraph) shall be included in all copies or substantial portions of the
14
-
* Software.
15
-
*
16
-
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17
-
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18
-
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19
-
* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20
-
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21
-
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
22
-
* IN THE SOFTWARE.
23
-
*
24
-
* Authors:
25
-
* Ben Widawsky <ben@bwidawsk.net>
26
-
*
27
-
*/
28
-
29
-
#include <linux/dma-buf.h>
30
-
#include "vgem_drv.h"
31
-
32
-
struct sg_table *vgem_gem_prime_get_sg_table(struct drm_gem_object *gobj)
33
-
{
34
-
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
35
-
BUG_ON(obj->pages == NULL);
36
-
37
-
return drm_prime_pages_to_sg(obj->pages, obj->base.size / PAGE_SIZE);
38
-
}
39
-
40
-
int vgem_gem_prime_pin(struct drm_gem_object *gobj)
41
-
{
42
-
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
43
-
return vgem_gem_get_pages(obj);
44
-
}
45
-
46
-
void vgem_gem_prime_unpin(struct drm_gem_object *gobj)
47
-
{
48
-
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
49
-
vgem_gem_put_pages(obj);
50
-
}
51
-
52
-
void *vgem_gem_prime_vmap(struct drm_gem_object *gobj)
53
-
{
54
-
struct drm_vgem_gem_object *obj = to_vgem_bo(gobj);
55
-
BUG_ON(obj->pages == NULL);
56
-
57
-
return vmap(obj->pages, obj->base.size / PAGE_SIZE, 0, PAGE_KERNEL);
58
-
}
59
-
60
-
void vgem_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
61
-
{
62
-
vunmap(vaddr);
63
-
}
64
-
65
-
struct drm_gem_object *vgem_gem_prime_import(struct drm_device *dev,
66
-
struct dma_buf *dma_buf)
67
-
{
68
-
struct drm_vgem_gem_object *obj = NULL;
69
-
int ret;
70
-
71
-
obj = kzalloc(sizeof(*obj), GFP_KERNEL);
72
-
if (obj == NULL) {
73
-
ret = -ENOMEM;
74
-
goto fail;
75
-
}
76
-
77
-
ret = drm_gem_object_init(dev, &obj->base, dma_buf->size);
78
-
if (ret) {
79
-
ret = -ENOMEM;
80
-
goto fail_free;
81
-
}
82
-
83
-
get_dma_buf(dma_buf);
84
-
85
-
obj->base.dma_buf = dma_buf;
86
-
obj->use_dma_buf = true;
87
-
88
-
return &obj->base;
89
-
90
-
fail_free:
91
-
kfree(obj);
92
-
fail:
93
-
return ERR_PTR(ret);
94
-
}
+1
-10
drivers/gpu/drm/vgem/vgem_drv.c
+1
-10
drivers/gpu/drm/vgem/vgem_drv.c
···
302
302
};
303
303
304
304
static struct drm_driver vgem_driver = {
305
-
.driver_features = DRIVER_GEM | DRIVER_PRIME,
305
+
.driver_features = DRIVER_GEM,
306
306
.gem_free_object = vgem_gem_free_object,
307
307
.gem_vm_ops = &vgem_gem_vm_ops,
308
308
.ioctls = vgem_ioctls,
309
309
.fops = &vgem_driver_fops,
310
310
.dumb_create = vgem_gem_dumb_create,
311
311
.dumb_map_offset = vgem_gem_dumb_map,
312
-
.prime_handle_to_fd = drm_gem_prime_handle_to_fd,
313
-
.prime_fd_to_handle = drm_gem_prime_fd_to_handle,
314
-
.gem_prime_export = drm_gem_prime_export,
315
-
.gem_prime_import = vgem_gem_prime_import,
316
-
.gem_prime_pin = vgem_gem_prime_pin,
317
-
.gem_prime_unpin = vgem_gem_prime_unpin,
318
-
.gem_prime_get_sg_table = vgem_gem_prime_get_sg_table,
319
-
.gem_prime_vmap = vgem_gem_prime_vmap,
320
-
.gem_prime_vunmap = vgem_gem_prime_vunmap,
321
312
.name = DRIVER_NAME,
322
313
.desc = DRIVER_DESC,
323
314
.date = DRIVER_DATE,
-11
drivers/gpu/drm/vgem/vgem_drv.h
-11
drivers/gpu/drm/vgem/vgem_drv.h
···
43
43
extern void vgem_gem_put_pages(struct drm_vgem_gem_object *obj);
44
44
extern int vgem_gem_get_pages(struct drm_vgem_gem_object *obj);
45
45
46
-
/* vgem_dma_buf.c */
47
-
extern struct sg_table *vgem_gem_prime_get_sg_table(
48
-
struct drm_gem_object *gobj);
49
-
extern int vgem_gem_prime_pin(struct drm_gem_object *gobj);
50
-
extern void vgem_gem_prime_unpin(struct drm_gem_object *gobj);
51
-
extern void *vgem_gem_prime_vmap(struct drm_gem_object *gobj);
52
-
extern void vgem_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
53
-
extern struct drm_gem_object *vgem_gem_prime_import(struct drm_device *dev,
54
-
struct dma_buf *dma_buf);
55
-
56
-
57
46
#endif