Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
ASoC: SOF: amd: Add sof support for vangogh platform
Add pci driver and platform driver to enable SOF support
on ACP5x architecture based Vangogh platform.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
Link: https://lore.kernel.org/r/20230809123534.287707-1-venkataprasad.potturu@amd.com
Signed-off-by: Mark Brown <broonie@kernel.org>
authored by
Venkata Prasad Potturu
and committed by
Mark Brown
d0dab6b7
919a4a94
+290
-4
+11
-1
sound/soc/sof/amd/Kconfig
+11
-1
sound/soc/sof/amd/Kconfig
···
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# This file is provided under a dual BSD/GPLv2 license. When using or
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# redistributing this file, you may do so under either license.
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#
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-
# Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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# Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
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config SND_SOC_SOF_AMD_TOPLEVEL
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tristate "SOF support for AMD audio DSPs"
···
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select SND_SOC_SOF_AMD_COMMON
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help
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Select this option for SOF support on AMD Renoir platform
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+
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config SND_SOC_SOF_AMD_VANGOGH
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tristate "SOF support for VANGOGH"
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depends on SND_SOC_SOF_PCI
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select SND_SOC_SOF_AMD_COMMON
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help
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Select this option for SOF support
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on AMD Vangogh platform.
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Say Y if you want to enable SOF on Vangogh.
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If unsure select "N".
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config SND_SOC_SOF_AMD_REMBRANDT
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tristate "SOF support for REMBRANDT"
+3
-1
sound/soc/sof/amd/Makefile
+3
-1
sound/soc/sof/amd/Makefile
···
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# This file is provided under a dual BSD/GPLv2 license. When using or
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# redistributing this file, you may do so under either license.
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#
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# Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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# Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
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snd-sof-amd-acp-objs := acp.o acp-loader.o acp-ipc.o acp-pcm.o acp-stream.o acp-trace.o acp-common.o
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snd-sof-amd-acp-$(CONFIG_SND_SOC_SOF_ACP_PROBES) = acp-probes.o
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snd-sof-amd-renoir-objs := pci-rn.o renoir.o
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snd-sof-amd-rembrandt-objs := pci-rmb.o rembrandt.o
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snd-sof-amd-vangogh-objs := pci-vangogh.o vangogh.o
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obj-$(CONFIG_SND_SOC_SOF_AMD_COMMON) += snd-sof-amd-acp.o
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obj-$(CONFIG_SND_SOC_SOF_AMD_RENOIR) +=snd-sof-amd-renoir.o
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obj-$(CONFIG_SND_SOC_SOF_AMD_REMBRANDT) +=snd-sof-amd-rembrandt.o
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obj-$(CONFIG_SND_SOC_SOF_AMD_VANGOGH) +=snd-sof-amd-vangogh.o
+7
-1
sound/soc/sof/amd/acp-dsp-offset.h
+7
-1
sound/soc/sof/amd/acp-dsp-offset.h
···
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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-
* Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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* Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
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*/
···
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#define ACP_CONTROL 0x1004
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#define ACP3X_I2S_PIN_CONFIG 0x1400
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#define ACP5X_I2S_PIN_CONFIG 0x1400
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#define ACP6X_I2S_PIN_CONFIG 0x1440
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/* Registers offsets from ACP_PGFSM block */
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#define ACP3X_PGFSM_BASE 0x141C
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#define ACP5X_PGFSM_BASE 0x1424
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#define ACP6X_PGFSM_BASE 0x1024
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#define PGFSM_CONTROL_OFFSET 0x0
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#define PGFSM_STATUS_OFFSET 0x4
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#define ACP3X_CLKMUX_SEL 0x1424
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#define ACP5X_CLKMUX_SEL 0x142C
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#define ACP6X_CLKMUX_SEL 0x102C
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/* Registers from ACP_INTR block */
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#define ACP3X_EXT_INTR_STAT 0x1808
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#define ACP5X_EXT_INTR_STAT 0x1808
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#define ACP6X_EXT_INTR_STAT 0x1A0C
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#define ACP3X_DSP_SW_INTR_BASE 0x1814
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#define ACP5X_DSP_SW_INTR_BASE 0x1814
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#define ACP6X_DSP_SW_INTR_BASE 0x1808
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#define DSP_SW_INTR_CNTL_OFFSET 0x0
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#define DSP_SW_INTR_STAT_OFFSET 0x4
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#define DSP_SW_INTR_TRIG_OFFSET 0x8
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#define ACP_ERROR_STATUS 0x18C4
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#define ACP3X_AXI2DAGB_SEM_0 0x1880
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#define ACP5X_AXI2DAGB_SEM_0 0x1884
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#define ACP6X_AXI2DAGB_SEM_0 0x1874
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/* Registers from ACP_SHA block */
+8
-1
sound/soc/sof/amd/acp.h
+8
-1
sound/soc/sof/amd/acp.h
···
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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-
* Copyright(c) 2021 Advanced Micro Devices, Inc. All rights reserved.
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* Copyright(c) 2021, 2023 Advanced Micro Devices, Inc. All rights reserved.
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*
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* Author: Ajit Kumar Pandey <AjitKumar.Pandey@amd.com>
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*/
···
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#define ACP_DSP_INTR_EN_MASK 0x00000001
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#define ACP3X_SRAM_PTE_OFFSET 0x02050000
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#define ACP5X_SRAM_PTE_OFFSET 0x02050000
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#define ACP6X_SRAM_PTE_OFFSET 0x03800000
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#define PAGE_SIZE_4K_ENABLE 0x2
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#define ACP_PAGE_SIZE 0x1000
···
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#define ACP_DSP_TO_HOST_IRQ 0x04
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#define ACP_RN_PCI_ID 0x01
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#define ACP_VANGOGH_PCI_ID 0x50
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#define ACP_RMB_PCI_ID 0x6F
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#define HOST_BRIDGE_CZN 0x1630
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#define HOST_BRIDGE_VGH 0x1645
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#define HOST_BRIDGE_RMB 0x14B5
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#define ACP_SHA_STAT 0x8000
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#define ACP_PSP_TIMEOUT_US 1000000
···
166
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struct sof_amd_acp_desc {
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unsigned int rev;
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const char *name;
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unsigned int host_bridge_id;
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u32 pgfsm_base;
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u32 ext_intr_stat;
···
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extern struct snd_sof_dsp_ops sof_renoir_ops;
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int sof_renoir_ops_init(struct snd_sof_dev *sdev);
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extern struct snd_sof_dsp_ops sof_vangogh_ops;
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int sof_vangogh_ops_init(struct snd_sof_dev *sdev);
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extern struct snd_sof_dsp_ops sof_rembrandt_ops;
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int sof_rembrandt_ops_init(struct snd_sof_dev *sdev);
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···
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int acp_probes_register(struct snd_sof_dev *sdev);
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void acp_probes_unregister(struct snd_sof_dev *sdev);
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extern struct snd_soc_acpi_mach snd_soc_acpi_amd_vangogh_sof_machines[];
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#endif
+105
sound/soc/sof/amd/pci-vangogh.c
+105
sound/soc/sof/amd/pci-vangogh.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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//
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// This file is provided under a dual BSD/GPLv2 license. When using or
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// redistributing this file, you may do so under either license.
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//
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// Copyright(c) 2023 Advanced Micro Devices, Inc. All rights reserved.
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//
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// Authors: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
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/*.
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* PCI interface for Vangogh ACP device
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/platform_device.h>
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#include <sound/sof.h>
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#include <sound/soc-acpi.h>
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+
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#include "../ops.h"
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#include "../sof-pci-dev.h"
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#include "../../amd/mach-config.h"
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#include "acp.h"
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#include "acp-dsp-offset.h"
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+
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#define ACP5X_FUTURE_REG_ACLK_0 0x1864
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+
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static const struct sof_amd_acp_desc vangogh_chip_info = {
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.rev = 5,
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.name = "vangogh",
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.host_bridge_id = HOST_BRIDGE_VGH,
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.pgfsm_base = ACP5X_PGFSM_BASE,
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.ext_intr_stat = ACP5X_EXT_INTR_STAT,
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.dsp_intr_base = ACP5X_DSP_SW_INTR_BASE,
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.sram_pte_offset = ACP5X_SRAM_PTE_OFFSET,
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.hw_semaphore_offset = ACP5X_AXI2DAGB_SEM_0,
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.acp_clkmux_sel = ACP5X_CLKMUX_SEL,
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.probe_reg_offset = ACP5X_FUTURE_REG_ACLK_0,
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};
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+
41
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static const struct sof_dev_desc vangogh_desc = {
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.machines = snd_soc_acpi_amd_vangogh_sof_machines,
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.resindex_lpe_base = 0,
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.resindex_pcicfg_base = -1,
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.resindex_imr_base = -1,
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.irqindex_host_ipc = -1,
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.chip_info = &vangogh_chip_info,
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.ipc_supported_mask = BIT(SOF_IPC),
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.ipc_default = SOF_IPC,
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.default_fw_path = {
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[SOF_IPC] = "amd/sof",
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},
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.default_tplg_path = {
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[SOF_IPC] = "amd/sof-tplg",
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},
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.default_fw_filename = {
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[SOF_IPC] = "sof-vangogh.ri",
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},
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.nocodec_tplg_filename = "sof-acp.tplg",
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.ops = &sof_vangogh_ops,
61
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.ops_init = sof_vangogh_ops_init,
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};
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+
64
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static int acp_pci_vgh_probe(struct pci_dev *pci, const struct pci_device_id *pci_id)
65
+
{
66
+
unsigned int flag;
67
+
68
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if (pci->revision != ACP_VANGOGH_PCI_ID)
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return -ENODEV;
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+
71
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flag = snd_amd_acp_find_config(pci);
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if (flag != FLAG_AMD_SOF && flag != FLAG_AMD_SOF_ONLY_DMIC)
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return -ENODEV;
74
+
75
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return sof_pci_probe(pci, pci_id);
76
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};
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+
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static void acp_pci_vgh_remove(struct pci_dev *pci)
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{
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sof_pci_remove(pci);
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}
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+
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/* PCI IDs */
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static const struct pci_device_id vgh_pci_ids[] = {
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{ PCI_DEVICE(PCI_VENDOR_ID_AMD, ACP_PCI_DEV_ID),
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.driver_data = (unsigned long)&vangogh_desc},
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{ 0, }
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};
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MODULE_DEVICE_TABLE(pci, vgh_pci_ids);
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+
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/* pci_driver definition */
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static struct pci_driver snd_sof_pci_amd_vgh_driver = {
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.name = KBUILD_MODNAME,
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.id_table = vgh_pci_ids,
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.probe = acp_pci_vgh_probe,
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.remove = acp_pci_vgh_remove,
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.driver = {
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.pm = &sof_pci_pm,
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},
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};
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module_pci_driver(snd_sof_pci_amd_vgh_driver);
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+
103
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MODULE_LICENSE("Dual BSD/GPL");
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MODULE_IMPORT_NS(SND_SOC_SOF_AMD_COMMON);
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MODULE_IMPORT_NS(SND_SOC_SOF_PCI_DEV);
+156
sound/soc/sof/amd/vangogh.c
+156
sound/soc/sof/amd/vangogh.c
···
1
+
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
2
+
//
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// This file is provided under a dual BSD/GPLv2 license. When using or
4
+
// redistributing this file, you may do so under either license.
5
+
//
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// Copyright(c) 2023 Advanced Micro Devices, Inc.
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//
8
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// Authors: Venkata Prasad Potturu <venkataprasad.potturu@amd.com>
9
+
10
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/*
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* Hardware interface for Audio DSP on Vangogh platform
12
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*/
13
+
14
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#include <linux/platform_device.h>
15
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#include <linux/module.h>
16
+
17
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#include "../ops.h"
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#include "../sof-audio.h"
19
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#include "acp.h"
20
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#include "acp-dsp-offset.h"
21
+
22
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#define I2S_HS_INSTANCE 0
23
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#define I2S_BT_INSTANCE 1
24
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#define I2S_SP_INSTANCE 2
25
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#define PDM_DMIC_INSTANCE 3
26
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#define I2S_HS_VIRTUAL_INSTANCE 4
27
+
28
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static struct snd_soc_dai_driver vangogh_sof_dai[] = {
29
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[I2S_HS_INSTANCE] = {
30
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.id = I2S_HS_INSTANCE,
31
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.name = "acp-sof-hs",
32
+
.playback = {
33
+
.rates = SNDRV_PCM_RATE_8000_96000,
34
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
35
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
36
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.channels_min = 2,
37
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.channels_max = 8,
38
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.rate_min = 8000,
39
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.rate_max = 96000,
40
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},
41
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.capture = {
42
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.rates = SNDRV_PCM_RATE_8000_48000,
43
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
44
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
45
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/* Supporting only stereo for I2S HS controller capture */
46
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.channels_min = 2,
47
+
.channels_max = 2,
48
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.rate_min = 8000,
49
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.rate_max = 48000,
50
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},
51
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},
52
+
53
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[I2S_BT_INSTANCE] = {
54
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.id = I2S_BT_INSTANCE,
55
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.name = "acp-sof-bt",
56
+
.playback = {
57
+
.rates = SNDRV_PCM_RATE_8000_96000,
58
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
59
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
60
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.channels_min = 2,
61
+
.channels_max = 8,
62
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.rate_min = 8000,
63
+
.rate_max = 96000,
64
+
},
65
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.capture = {
66
+
.rates = SNDRV_PCM_RATE_8000_48000,
67
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
68
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
69
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/* Supporting only stereo for I2S BT controller capture */
70
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.channels_min = 2,
71
+
.channels_max = 2,
72
+
.rate_min = 8000,
73
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.rate_max = 48000,
74
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},
75
+
},
76
+
77
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[I2S_SP_INSTANCE] = {
78
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.id = I2S_SP_INSTANCE,
79
+
.name = "acp-sof-sp",
80
+
.playback = {
81
+
.rates = SNDRV_PCM_RATE_8000_96000,
82
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
83
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
84
+
.channels_min = 2,
85
+
.channels_max = 8,
86
+
.rate_min = 8000,
87
+
.rate_max = 96000,
88
+
},
89
+
.capture = {
90
+
.rates = SNDRV_PCM_RATE_8000_48000,
91
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
92
+
SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
93
+
/* Supporting only stereo for I2S SP controller capture */
94
+
.channels_min = 2,
95
+
.channels_max = 2,
96
+
.rate_min = 8000,
97
+
.rate_max = 48000,
98
+
},
99
+
},
100
+
101
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[PDM_DMIC_INSTANCE] = {
102
+
.id = PDM_DMIC_INSTANCE,
103
+
.name = "acp-sof-dmic",
104
+
.capture = {
105
+
.rates = SNDRV_PCM_RATE_8000_48000,
106
+
.formats = SNDRV_PCM_FMTBIT_S32_LE,
107
+
.channels_min = 2,
108
+
.channels_max = 4,
109
+
.rate_min = 8000,
110
+
.rate_max = 48000,
111
+
},
112
+
},
113
+
114
+
[I2S_HS_VIRTUAL_INSTANCE] = {
115
+
.id = I2S_HS_VIRTUAL_INSTANCE,
116
+
.name = "acp-sof-hs-virtual",
117
+
.playback = {
118
+
.rates = SNDRV_PCM_RATE_8000_96000,
119
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
120
+
SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
121
+
.channels_min = 2,
122
+
.channels_max = 8,
123
+
.rate_min = 8000,
124
+
.rate_max = 96000,
125
+
},
126
+
.capture = {
127
+
.rates = SNDRV_PCM_RATE_8000_48000,
128
+
.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
129
+
SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S32_LE,
130
+
/* Supporting only stereo for I2S HS-Virtual controller capture */
131
+
.channels_min = 2,
132
+
.channels_max = 2,
133
+
.rate_min = 8000,
134
+
.rate_max = 48000,
135
+
},
136
+
},
137
+
};
138
+
139
+
/* Vangogh ops */
140
+
struct snd_sof_dsp_ops sof_vangogh_ops;
141
+
EXPORT_SYMBOL_NS(sof_vangogh_ops, SND_SOC_SOF_AMD_COMMON);
142
+
143
+
int sof_vangogh_ops_init(struct snd_sof_dev *sdev)
144
+
{
145
+
/* common defaults */
146
+
memcpy(&sof_vangogh_ops, &sof_acp_common_ops, sizeof(struct snd_sof_dsp_ops));
147
+
148
+
sof_vangogh_ops.drv = vangogh_sof_dai;
149
+
sof_vangogh_ops.num_drv = ARRAY_SIZE(vangogh_sof_dai);
150
+
151
+
return 0;
152
+
}
153
+
154
+
MODULE_IMPORT_NS(SND_SOC_SOF_AMD_COMMON);
155
+
MODULE_DESCRIPTION("VANGOGH SOF Driver");
156
+
MODULE_LICENSE("Dual BSD/GPL");