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net: stmmac: Programming sequence for VLAN packets with split header

Currently reset state configuration of split header works fine for
non-tagged packets and we see no corruption in payload of any size

We need additional programming sequence with reset configuration to
handle VLAN tagged packets to avoid corruption in payload for packets
of size greater than 256 bytes.

Without this change ping application complains about corruption
in payload when the size of the VLAN packet exceeds 256 bytes.

With this change tagged and non-tagged packets of any size works fine
and there is no corruption seen.

Current configuration which has the issue for VLAN packet
----------------------------------------------------------

Split happens at the position at Layer 3 header
|MAC-DA|MAC-SA|Vlan Tag|Ether type|IP header|IP data|Rest of the payload|
2 bytes ^
|

With the fix we are making sure that the split happens now at
Layer 2 which is end of ethernet header and start of IP payload

Ip traffic split
-----------------

Bits which take care of this are SPLM and SPLOFST
SPLM = Split mode is set to Layer 2
SPLOFST = These bits indicate the value of offset from the beginning
of Length/Type field at which header split should take place when the
appropriate SPLM is selected. Reset value is 2bytes.

Un-tagged data (without VLAN)
|MAC-DA|MAC-SA|Ether type|IP header|IP data|Rest of the payload|
2bytes ^
|

Tagged data (with VLAN)
|MAC-DA|MAC-SA|VLAN Tag|Ether type|IP header|IP data|Rest of the payload|
2bytes ^
|

Non-IP traffic split such AV packet
------------------------------------

Bits which take care of this are
SAVE = Split AV Enable
SAVO = Split AV Offset, similar to SPLOFST but this is for AVTP
packets.

|Preamble|MAC-DA|MAC-SA|VLAN tag|Ether type|IEEE 1722 payload|CRC|
2bytes ^
|

Signed-off-by: Abhishek Chauhan <quic_abchauha@quicinc.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20241016234313.3992214-1-quic_abchauha@quicinc.com
Signed-off-by: Paolo Abeni <pabeni@redhat.com>

authored by

Abhishek Chauhan and committed by
Paolo Abeni
d10f1a4e d89fa273

+10
+5
drivers/net/ethernet/stmicro/stmmac/dwmac4.h
··· 44 44 #define GMAC_MDIO_DATA 0x00000204 45 45 #define GMAC_GPIO_STATUS 0x0000020C 46 46 #define GMAC_ARP_ADDR 0x00000210 47 + #define GMAC_EXT_CFG1 0x00000238 47 48 #define GMAC_ADDR_HIGH(reg) (0x300 + reg * 8) 48 49 #define GMAC_ADDR_LOW(reg) (0x304 + reg * 8) 49 50 #define GMAC_L3L4_CTRL(reg) (0x900 + (reg) * 0x30) ··· 284 283 #define GMAC_HW_FEAT_FRPSEL BIT(10) 285 284 #define GMAC_HW_FEAT_DVLAN BIT(5) 286 285 #define GMAC_HW_FEAT_NRVF GENMASK(2, 0) 286 + 287 + /* MAC extended config 1 */ 288 + #define GMAC_CONFIG1_SAVE_EN BIT(24) 289 + #define GMAC_CONFIG1_SPLM(v) FIELD_PREP(GENMASK(9, 8), v) 287 290 288 291 /* GMAC GPIO Status reg */ 289 292 #define GMAC_GPO0 BIT(16)
+5
drivers/net/ethernet/stmicro/stmmac/dwmac4_dma.c
··· 526 526 value |= GMAC_CONFIG_HDSMS_256; /* Segment max 256 bytes */ 527 527 writel(value, ioaddr + GMAC_EXT_CONFIG); 528 528 529 + value = readl(ioaddr + GMAC_EXT_CFG1); 530 + value |= GMAC_CONFIG1_SPLM(1); /* Split mode set to L2OFST */ 531 + value |= GMAC_CONFIG1_SAVE_EN; /* Enable Split AV mode */ 532 + writel(value, ioaddr + GMAC_EXT_CFG1); 533 + 529 534 value = readl(ioaddr + DMA_CHAN_CONTROL(dwmac4_addrs, chan)); 530 535 if (en) 531 536 value |= DMA_CONTROL_SPH;