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drm/tidss: Mark AM65x OLDI code separately

The dss dt schema and the tidss driver have kept the single-link OLDI in
AM65x integrated with the parent video-port (VP) from DSS (as the OLDI
configuration happens from the source VP only).
To help configure the dual-lvds modes that the OLDI has to offer in
devices AM62x and later, a new OLDI bridge driver will be introduced.

Mark the existing OLDI code separately by renaming all the current OLDI
identifiers with the 'AM65X_' prefix in tidss driver, to help
distinguish from the upcoming OLDI bridge driver.

Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
Signed-off-by: Aradhya Bhatia <aradhya.bhatia@linux.dev>
Link: https://lore.kernel.org/r/20250528122544.817829-4-aradhya.bhatia@linux.dev
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>

authored by

Aradhya Bhatia and committed by
Tomi Valkeinen
d18bf712 90090f49

+44 -43
+33 -35
drivers/gpu/drm/tidss/tidss_dispc.c
··· 146 146 const struct dispc_features dispc_am65x_feats = { 147 147 .max_pclk_khz = { 148 148 [DISPC_VP_DPI] = 165000, 149 - [DISPC_VP_OLDI] = 165000, 149 + [DISPC_VP_OLDI_AM65X] = 165000, 150 150 }, 151 151 152 152 .scaling = { ··· 176 176 .vp_name = { "vp1", "vp2" }, 177 177 .ovr_name = { "ovr1", "ovr2" }, 178 178 .vpclk_name = { "vp1", "vp2" }, 179 - .vp_bus_type = { DISPC_VP_OLDI, DISPC_VP_DPI }, 179 + .vp_bus_type = { DISPC_VP_OLDI_AM65X, DISPC_VP_DPI }, 180 180 181 181 .vp_feat = { .color = { 182 182 .has_ctm = true, ··· 491 491 void __iomem *base_ovr[TIDSS_MAX_PORTS]; 492 492 void __iomem *base_vp[TIDSS_MAX_PORTS]; 493 493 494 - struct regmap *oldi_io_ctrl; 494 + struct regmap *am65x_oldi_io_ctrl; 495 495 496 496 struct clk *vp_clk[TIDSS_MAX_PORTS]; 497 497 ··· 1016 1016 } 1017 1017 } 1018 1018 1019 - enum dispc_oldi_mode_reg_val { SPWG_18 = 0, JEIDA_24 = 1, SPWG_24 = 2 }; 1020 - 1021 1019 struct dispc_bus_format { 1022 1020 u32 bus_fmt; 1023 1021 u32 data_width; 1024 1022 bool is_oldi_fmt; 1025 - enum dispc_oldi_mode_reg_val oldi_mode_reg_val; 1023 + enum oldi_mode_reg_val am65x_oldi_mode_reg_val; 1026 1024 }; 1027 1025 1028 1026 static const struct dispc_bus_format dispc_bus_formats[] = { ··· 1064 1066 return -EINVAL; 1065 1067 } 1066 1068 1067 - if (dispc->feat->vp_bus_type[hw_videoport] != DISPC_VP_OLDI && 1069 + if (dispc->feat->vp_bus_type[hw_videoport] != DISPC_VP_OLDI_AM65X && 1068 1070 fmt->is_oldi_fmt) { 1069 1071 dev_dbg(dispc->dev, "%s: %s is not OLDI-port\n", 1070 1072 __func__, dispc->feat->vp_name[hw_videoport]); ··· 1074 1076 return 0; 1075 1077 } 1076 1078 1077 - static void dispc_oldi_tx_power(struct dispc_device *dispc, bool power) 1079 + static void dispc_am65x_oldi_tx_power(struct dispc_device *dispc, bool power) 1078 1080 { 1079 - u32 val = power ? 0 : OLDI_PWRDN_TX; 1081 + u32 val = power ? 0 : AM65X_OLDI_PWRDN_TX; 1080 1082 1081 - if (WARN_ON(!dispc->oldi_io_ctrl)) 1083 + if (WARN_ON(!dispc->am65x_oldi_io_ctrl)) 1082 1084 return; 1083 1085 1084 - regmap_update_bits(dispc->oldi_io_ctrl, OLDI_DAT0_IO_CTRL, 1085 - OLDI_PWRDN_TX, val); 1086 - regmap_update_bits(dispc->oldi_io_ctrl, OLDI_DAT1_IO_CTRL, 1087 - OLDI_PWRDN_TX, val); 1088 - regmap_update_bits(dispc->oldi_io_ctrl, OLDI_DAT2_IO_CTRL, 1089 - OLDI_PWRDN_TX, val); 1090 - regmap_update_bits(dispc->oldi_io_ctrl, OLDI_DAT3_IO_CTRL, 1091 - OLDI_PWRDN_TX, val); 1092 - regmap_update_bits(dispc->oldi_io_ctrl, OLDI_CLK_IO_CTRL, 1093 - OLDI_PWRDN_TX, val); 1086 + regmap_update_bits(dispc->am65x_oldi_io_ctrl, AM65X_OLDI_DAT0_IO_CTRL, 1087 + AM65X_OLDI_PWRDN_TX, val); 1088 + regmap_update_bits(dispc->am65x_oldi_io_ctrl, AM65X_OLDI_DAT1_IO_CTRL, 1089 + AM65X_OLDI_PWRDN_TX, val); 1090 + regmap_update_bits(dispc->am65x_oldi_io_ctrl, AM65X_OLDI_DAT2_IO_CTRL, 1091 + AM65X_OLDI_PWRDN_TX, val); 1092 + regmap_update_bits(dispc->am65x_oldi_io_ctrl, AM65X_OLDI_DAT3_IO_CTRL, 1093 + AM65X_OLDI_PWRDN_TX, val); 1094 + regmap_update_bits(dispc->am65x_oldi_io_ctrl, AM65X_OLDI_CLK_IO_CTRL, 1095 + AM65X_OLDI_PWRDN_TX, val); 1094 1096 } 1095 1097 1096 1098 static void dispc_set_num_datalines(struct dispc_device *dispc, ··· 1119 1121 VP_REG_FLD_MOD(dispc, hw_videoport, DISPC_VP_CONTROL, v, 10, 8); 1120 1122 } 1121 1123 1122 - static void dispc_enable_oldi(struct dispc_device *dispc, u32 hw_videoport, 1123 - const struct dispc_bus_format *fmt) 1124 + static void dispc_enable_am65x_oldi(struct dispc_device *dispc, u32 hw_videoport, 1125 + const struct dispc_bus_format *fmt) 1124 1126 { 1125 1127 u32 oldi_cfg = 0; 1126 1128 u32 oldi_reset_bit = BIT(5 + hw_videoport); ··· 1139 1141 1140 1142 oldi_cfg |= BIT(7); /* DEPOL */ 1141 1143 1142 - oldi_cfg = FLD_MOD(oldi_cfg, fmt->oldi_mode_reg_val, 3, 1); 1144 + oldi_cfg = FLD_MOD(oldi_cfg, fmt->am65x_oldi_mode_reg_val, 3, 1); 1143 1145 1144 1146 oldi_cfg |= BIT(12); /* SOFTRST */ 1145 1147 ··· 1168 1170 if (WARN_ON(!fmt)) 1169 1171 return; 1170 1172 1171 - if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) { 1172 - dispc_oldi_tx_power(dispc, true); 1173 + if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI_AM65X) { 1174 + dispc_am65x_oldi_tx_power(dispc, true); 1173 1175 1174 - dispc_enable_oldi(dispc, hw_videoport, fmt); 1176 + dispc_enable_am65x_oldi(dispc, hw_videoport, fmt); 1175 1177 } 1176 1178 } 1177 1179 ··· 1227 1229 align = true; 1228 1230 1229 1231 /* always use DE_HIGH for OLDI */ 1230 - if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) 1232 + if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI_AM65X) 1231 1233 ieo = false; 1232 1234 1233 1235 dispc_vp_write(dispc, hw_videoport, DISPC_VP_POL_FREQ, ··· 1253 1255 1254 1256 void dispc_vp_unprepare(struct dispc_device *dispc, u32 hw_videoport) 1255 1257 { 1256 - if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI) { 1258 + if (dispc->feat->vp_bus_type[hw_videoport] == DISPC_VP_OLDI_AM65X) { 1257 1259 dispc_vp_write(dispc, hw_videoport, DISPC_VP_DSS_OLDI_CFG, 0); 1258 1260 1259 - dispc_oldi_tx_power(dispc, false); 1261 + dispc_am65x_oldi_tx_power(dispc, false); 1260 1262 } 1261 1263 } 1262 1264 ··· 2850 2852 static int dispc_init_am65x_oldi_io_ctrl(struct device *dev, 2851 2853 struct dispc_device *dispc) 2852 2854 { 2853 - dispc->oldi_io_ctrl = 2855 + dispc->am65x_oldi_io_ctrl = 2854 2856 syscon_regmap_lookup_by_phandle(dev->of_node, 2855 2857 "ti,am65x-oldi-io-ctrl"); 2856 - if (PTR_ERR(dispc->oldi_io_ctrl) == -ENODEV) { 2857 - dispc->oldi_io_ctrl = NULL; 2858 - } else if (IS_ERR(dispc->oldi_io_ctrl)) { 2858 + if (PTR_ERR(dispc->am65x_oldi_io_ctrl) == -ENODEV) { 2859 + dispc->am65x_oldi_io_ctrl = NULL; 2860 + } else if (IS_ERR(dispc->am65x_oldi_io_ctrl)) { 2859 2861 dev_err(dev, "%s: syscon_regmap_lookup_by_phandle failed %ld\n", 2860 - __func__, PTR_ERR(dispc->oldi_io_ctrl)); 2861 - return PTR_ERR(dispc->oldi_io_ctrl); 2862 + __func__, PTR_ERR(dispc->am65x_oldi_io_ctrl)); 2863 + return PTR_ERR(dispc->am65x_oldi_io_ctrl); 2862 2864 } 2863 2865 return 0; 2864 2866 }
+1 -1
drivers/gpu/drm/tidss/tidss_dispc.h
··· 58 58 59 59 enum dispc_vp_bus_type { 60 60 DISPC_VP_DPI, /* DPI output */ 61 - DISPC_VP_OLDI, /* OLDI (LVDS) output */ 61 + DISPC_VP_OLDI_AM65X, /* OLDI (LVDS) output for AM65x DSS */ 62 62 DISPC_VP_INTERNAL, /* SoC internal routing */ 63 63 DISPC_VP_TIED_OFF, /* Tied off / Unavailable */ 64 64 DISPC_VP_MAX_BUS_TYPE,
+9 -6
drivers/gpu/drm/tidss/tidss_dispc_regs.h
··· 226 226 #define DISPC_VP_DSS_DMA_THREADSIZE 0x170 /* J721E */ 227 227 #define DISPC_VP_DSS_DMA_THREADSIZE_STATUS 0x174 /* J721E */ 228 228 229 + /* LVDS Format values for OLDI_MAP field in DISPC_VP_OLDI_CFG register */ 230 + enum oldi_mode_reg_val { SPWG_18 = 0, JEIDA_24 = 1, SPWG_24 = 2 }; 231 + 229 232 /* 230 233 * OLDI IO_CTRL register offsets. On AM654 the registers are found 231 234 * from CTRL_MMR0, there the syscon regmap should map 0x14 bytes from 232 235 * CTRLMMR0P1_OLDI_DAT0_IO_CTRL to CTRLMMR0P1_OLDI_CLK_IO_CTRL 233 236 * register range. 234 237 */ 235 - #define OLDI_DAT0_IO_CTRL 0x00 236 - #define OLDI_DAT1_IO_CTRL 0x04 237 - #define OLDI_DAT2_IO_CTRL 0x08 238 - #define OLDI_DAT3_IO_CTRL 0x0C 239 - #define OLDI_CLK_IO_CTRL 0x10 238 + #define AM65X_OLDI_DAT0_IO_CTRL 0x00 239 + #define AM65X_OLDI_DAT1_IO_CTRL 0x04 240 + #define AM65X_OLDI_DAT2_IO_CTRL 0x08 241 + #define AM65X_OLDI_DAT3_IO_CTRL 0x0C 242 + #define AM65X_OLDI_CLK_IO_CTRL 0x10 240 243 241 - #define OLDI_PWRDN_TX BIT(8) 244 + #define AM65X_OLDI_PWRDN_TX BIT(8) 242 245 243 246 #endif /* __TIDSS_DISPC_REGS_H */
+1 -1
drivers/gpu/drm/tidss/tidss_kms.c
··· 144 144 dev_dbg(dev, "Setting up panel for port %d\n", i); 145 145 146 146 switch (feat->vp_bus_type[i]) { 147 - case DISPC_VP_OLDI: 147 + case DISPC_VP_OLDI_AM65X: 148 148 enc_type = DRM_MODE_ENCODER_LVDS; 149 149 conn_type = DRM_MODE_CONNECTOR_LVDS; 150 150 break;