Linux kernel mirror (for testing)
git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
kernel
os
linux
arm64: dts: qcom: sc8180x: Add thermal zones
This patch adds tsens nodes and thermal zones for sc8180x SoC
Co-developed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230530162454.51708-9-vkoul@kernel.org
authored by
Vinod Koul
and committed by
Bjorn Andersson
d1d3ca03
f3be8a11
+415
+415
arch/arm64/boot/dts/qcom/sc8180x.dtsi
+415
arch/arm64/boot/dts/qcom/sc8180x.dtsi
···
11
11
#include <dt-bindings/interrupt-controller/arm-gic.h>
12
12
#include <dt-bindings/power/qcom-rpmpd.h>
13
13
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
14
+
#include <dt-bindings/thermal/thermal.h>
14
15
15
16
/ {
16
17
interrupt-parent = <&intc>;
···
962
961
interrupt-controller;
963
962
};
964
963
964
+
tsens0: thermal-sensor@c263000 {
965
+
compatible = "qcom,sc8180x-tsens", "qcom,tsens-v2";
966
+
reg = <0 0x0c263000 0 0x1ff>, /* TM */
967
+
<0 0x0c222000 0 0x1ff>; /* SROT */
968
+
#qcom,sensors = <16>;
969
+
interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
970
+
<GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
971
+
interrupt-names = "uplow", "critical";
972
+
#thermal-sensor-cells = <1>;
973
+
};
974
+
975
+
tsens1: thermal-sensor@c265000 {
976
+
compatible = "qcom,sc8180x-tsens", "qcom,tsens-v2";
977
+
reg = <0 0x0c265000 0 0x1ff>, /* TM */
978
+
<0 0x0c223000 0 0x1ff>; /* SROT */
979
+
#qcom,sensors = <9>;
980
+
interrupts = <GIC_SPI 507 IRQ_TYPE_LEVEL_HIGH>,
981
+
<GIC_SPI 509 IRQ_TYPE_LEVEL_HIGH>;
982
+
interrupt-names = "uplow", "critical";
983
+
#thermal-sensor-cells = <1>;
984
+
};
985
+
965
986
aoss_qmp: power-controller@c300000 {
966
987
compatible = "qcom,sc8180x-aoss-qmp", "qcom,aoss-qmp";
967
988
reg = <0x0 0x0c300000 0x0 0x100000>;
···
1326
1303
#freq-domain-cells = <1>;
1327
1304
#clock-cells = <1>;
1328
1305
};
1306
+
1307
+
thermal-zones {
1308
+
cpu0-thermal {
1309
+
polling-delay-passive = <250>;
1310
+
polling-delay = <1000>;
1311
+
1312
+
thermal-sensors = <&tsens0 1>;
1313
+
1314
+
trips {
1315
+
cpu-crit {
1316
+
temperature = <110000>;
1317
+
hysteresis = <1000>;
1318
+
type = "critical";
1319
+
};
1320
+
};
1321
+
};
1322
+
1323
+
cpu1-thermal {
1324
+
polling-delay-passive = <250>;
1325
+
polling-delay = <1000>;
1326
+
1327
+
thermal-sensors = <&tsens0 2>;
1328
+
1329
+
trips {
1330
+
cpu-crit {
1331
+
temperature = <110000>;
1332
+
hysteresis = <1000>;
1333
+
type = "critical";
1334
+
};
1335
+
};
1336
+
};
1337
+
1338
+
cpu2-thermal {
1339
+
polling-delay-passive = <250>;
1340
+
polling-delay = <1000>;
1341
+
1342
+
thermal-sensors = <&tsens0 3>;
1343
+
1344
+
trips {
1345
+
cpu-crit {
1346
+
temperature = <110000>;
1347
+
hysteresis = <1000>;
1348
+
type = "critical";
1349
+
};
1350
+
};
1351
+
};
1352
+
1353
+
cpu3-thermal {
1354
+
polling-delay-passive = <250>;
1355
+
polling-delay = <1000>;
1356
+
1357
+
thermal-sensors = <&tsens0 4>;
1358
+
1359
+
trips {
1360
+
cpu-crit {
1361
+
temperature = <110000>;
1362
+
hysteresis = <1000>;
1363
+
type = "critical";
1364
+
};
1365
+
};
1366
+
};
1367
+
1368
+
cpu4-top-thermal {
1369
+
polling-delay-passive = <250>;
1370
+
polling-delay = <1000>;
1371
+
1372
+
thermal-sensors = <&tsens0 7>;
1373
+
1374
+
trips {
1375
+
cpu-crit {
1376
+
temperature = <110000>;
1377
+
hysteresis = <1000>;
1378
+
type = "critical";
1379
+
};
1380
+
};
1381
+
};
1382
+
1383
+
cpu5-top-thermal {
1384
+
polling-delay-passive = <250>;
1385
+
polling-delay = <1000>;
1386
+
1387
+
thermal-sensors = <&tsens0 8>;
1388
+
1389
+
trips {
1390
+
cpu-crit {
1391
+
temperature = <110000>;
1392
+
hysteresis = <1000>;
1393
+
type = "critical";
1394
+
};
1395
+
};
1396
+
};
1397
+
1398
+
cpu6-top-thermal {
1399
+
polling-delay-passive = <250>;
1400
+
polling-delay = <1000>;
1401
+
1402
+
thermal-sensors = <&tsens0 9>;
1403
+
1404
+
trips {
1405
+
cpu-crit {
1406
+
temperature = <110000>;
1407
+
hysteresis = <1000>;
1408
+
type = "critical";
1409
+
};
1410
+
};
1411
+
};
1412
+
1413
+
cpu7-top-thermal {
1414
+
polling-delay-passive = <250>;
1415
+
polling-delay = <1000>;
1416
+
1417
+
thermal-sensors = <&tsens0 10>;
1418
+
1419
+
trips {
1420
+
cpu-crit {
1421
+
temperature = <110000>;
1422
+
hysteresis = <1000>;
1423
+
type = "critical";
1424
+
};
1425
+
};
1426
+
};
1427
+
1428
+
cpu4-bottom-thermal {
1429
+
polling-delay-passive = <250>;
1430
+
polling-delay = <1000>;
1431
+
1432
+
thermal-sensors = <&tsens0 11>;
1433
+
1434
+
trips {
1435
+
cpu-crit {
1436
+
temperature = <110000>;
1437
+
hysteresis = <1000>;
1438
+
type = "critical";
1439
+
};
1440
+
};
1441
+
};
1442
+
1443
+
cpu5-bottom-thermal {
1444
+
polling-delay-passive = <250>;
1445
+
polling-delay = <1000>;
1446
+
1447
+
thermal-sensors = <&tsens0 12>;
1448
+
1449
+
trips {
1450
+
cpu-crit {
1451
+
temperature = <110000>;
1452
+
hysteresis = <1000>;
1453
+
type = "critical";
1454
+
};
1455
+
};
1456
+
};
1457
+
1458
+
cpu6-bottom-thermal {
1459
+
polling-delay-passive = <250>;
1460
+
polling-delay = <1000>;
1461
+
1462
+
thermal-sensors = <&tsens0 13>;
1463
+
1464
+
trips {
1465
+
cpu-crit {
1466
+
temperature = <110000>;
1467
+
hysteresis = <1000>;
1468
+
type = "critical";
1469
+
};
1470
+
};
1471
+
};
1472
+
1473
+
cpu7-bottom-thermal {
1474
+
polling-delay-passive = <250>;
1475
+
polling-delay = <1000>;
1476
+
1477
+
thermal-sensors = <&tsens0 14>;
1478
+
1479
+
trips {
1480
+
cpu-crit {
1481
+
temperature = <110000>;
1482
+
hysteresis = <1000>;
1483
+
type = "critical";
1484
+
};
1485
+
};
1486
+
};
1487
+
1488
+
aoss0-thermal {
1489
+
polling-delay-passive = <250>;
1490
+
polling-delay = <1000>;
1491
+
1492
+
thermal-sensors = <&tsens0 0>;
1493
+
1494
+
trips {
1495
+
trip-point0 {
1496
+
temperature = <90000>;
1497
+
hysteresis = <2000>;
1498
+
type = "hot";
1499
+
};
1500
+
};
1501
+
};
1502
+
1503
+
cluster0-thermal {
1504
+
polling-delay-passive = <250>;
1505
+
polling-delay = <1000>;
1506
+
1507
+
thermal-sensors = <&tsens0 5>;
1508
+
1509
+
trips {
1510
+
cluster-crit {
1511
+
temperature = <110000>;
1512
+
hysteresis = <2000>;
1513
+
type = "critical";
1514
+
};
1515
+
};
1516
+
};
1517
+
1518
+
cluster1-thermal {
1519
+
polling-delay-passive = <250>;
1520
+
polling-delay = <1000>;
1521
+
1522
+
thermal-sensors = <&tsens0 6>;
1523
+
1524
+
trips {
1525
+
cluster-crit {
1526
+
temperature = <110000>;
1527
+
hysteresis = <2000>;
1528
+
type = "critical";
1529
+
};
1530
+
};
1531
+
};
1532
+
1533
+
gpu-thermal-top {
1534
+
polling-delay-passive = <250>;
1535
+
polling-delay = <1000>;
1536
+
1537
+
thermal-sensors = <&tsens0 15>;
1538
+
1539
+
trips {
1540
+
trip-point0 {
1541
+
temperature = <90000>;
1542
+
hysteresis = <2000>;
1543
+
type = "hot";
1544
+
};
1545
+
};
1546
+
};
1547
+
1548
+
aoss1-thermal {
1549
+
polling-delay-passive = <250>;
1550
+
polling-delay = <1000>;
1551
+
1552
+
thermal-sensors = <&tsens1 0>;
1553
+
1554
+
trips {
1555
+
trip-point0 {
1556
+
temperature = <90000>;
1557
+
hysteresis = <2000>;
1558
+
type = "hot";
1559
+
};
1560
+
};
1561
+
};
1562
+
1563
+
wlan-thermal {
1564
+
polling-delay-passive = <250>;
1565
+
polling-delay = <1000>;
1566
+
1567
+
thermal-sensors = <&tsens1 1>;
1568
+
1569
+
trips {
1570
+
trip-point0 {
1571
+
temperature = <90000>;
1572
+
hysteresis = <2000>;
1573
+
type = "hot";
1574
+
};
1575
+
};
1576
+
};
1577
+
1578
+
video-thermal {
1579
+
polling-delay-passive = <250>;
1580
+
polling-delay = <1000>;
1581
+
1582
+
thermal-sensors = <&tsens1 2>;
1583
+
1584
+
trips {
1585
+
trip-point0 {
1586
+
temperature = <90000>;
1587
+
hysteresis = <2000>;
1588
+
type = "hot";
1589
+
};
1590
+
};
1591
+
};
1592
+
1593
+
mem-thermal {
1594
+
polling-delay-passive = <250>;
1595
+
polling-delay = <1000>;
1596
+
1597
+
thermal-sensors = <&tsens1 3>;
1598
+
1599
+
trips {
1600
+
trip-point0 {
1601
+
temperature = <90000>;
1602
+
hysteresis = <2000>;
1603
+
type = "hot";
1604
+
};
1605
+
};
1606
+
};
1607
+
1608
+
q6-hvx-thermal {
1609
+
polling-delay-passive = <250>;
1610
+
polling-delay = <1000>;
1611
+
1612
+
thermal-sensors = <&tsens1 4>;
1613
+
1614
+
trips {
1615
+
trip-point0 {
1616
+
temperature = <90000>;
1617
+
hysteresis = <2000>;
1618
+
type = "hot";
1619
+
};
1620
+
};
1621
+
};
1622
+
1623
+
camera-thermal {
1624
+
polling-delay-passive = <250>;
1625
+
polling-delay = <1000>;
1626
+
1627
+
thermal-sensors = <&tsens1 5>;
1628
+
1629
+
trips {
1630
+
trip-point0 {
1631
+
temperature = <90000>;
1632
+
hysteresis = <2000>;
1633
+
type = "hot";
1634
+
};
1635
+
};
1636
+
};
1637
+
1638
+
compute-thermal {
1639
+
polling-delay-passive = <250>;
1640
+
polling-delay = <1000>;
1641
+
1642
+
thermal-sensors = <&tsens1 6>;
1643
+
1644
+
trips {
1645
+
trip-point0 {
1646
+
temperature = <90000>;
1647
+
hysteresis = <2000>;
1648
+
type = "hot";
1649
+
};
1650
+
};
1651
+
};
1652
+
1653
+
mdm-dsp-thermal {
1654
+
polling-delay-passive = <250>;
1655
+
polling-delay = <1000>;
1656
+
1657
+
thermal-sensors = <&tsens1 7>;
1658
+
1659
+
trips {
1660
+
trip-point0 {
1661
+
temperature = <90000>;
1662
+
hysteresis = <2000>;
1663
+
type = "hot";
1664
+
};
1665
+
};
1666
+
};
1667
+
1668
+
npu-thermal {
1669
+
polling-delay-passive = <250>;
1670
+
polling-delay = <1000>;
1671
+
1672
+
thermal-sensors = <&tsens1 8>;
1673
+
1674
+
trips {
1675
+
trip-point0 {
1676
+
temperature = <90000>;
1677
+
hysteresis = <2000>;
1678
+
type = "hot";
1679
+
};
1680
+
};
1681
+
};
1682
+
1683
+
gpu-thermal-bottom {
1684
+
polling-delay-passive = <250>;
1685
+
polling-delay = <1000>;
1686
+
1687
+
thermal-sensors = <&tsens1 11>;
1688
+
1689
+
trips {
1690
+
trip-point0 {
1691
+
temperature = <90000>;
1692
+
hysteresis = <2000>;
1693
+
type = "hot";
1694
+
};
1695
+
};
1696
+
};
1697
+
};
1329
1698
1330
1699
timer {
1331
1700
compatible = "arm,armv8-timer";